gem5  v21.1.0.2
mc146818.hh
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28 
29 #ifndef __DEV_MC146818_HH__
30 #define __DEV_MC146818_HH__
31 
32 #include "base/bitunion.hh"
33 #include "base/logging.hh"
34 #include "sim/core.hh"
35 #include "sim/eventq.hh"
36 
37 namespace gem5
38 {
39 
41 class MC146818 : public EventManager
42 {
43  protected:
44  virtual void handleEvent()
45  {
46  warn("No RTC event handler defined.\n");
47  }
48 
49  private:
51  struct RTCEvent : public Event
52  {
56 
57  RTCEvent(MC146818 * _parent, Tick i);
58 
60  void scheduleIntr();
61 
63  virtual void process();
64 
66  virtual const char *description() const;
67  };
68 
70  struct RTCTickEvent : public Event
71  {
74 
75  RTCTickEvent(MC146818 * _parent) :
76  parent(_parent), offset(sim_clock::as_int::s)
77  {}
78 
80  void process();
81 
83  const char *description() const;
84  };
85 
86  private:
87  std::string _name;
88  const std::string &name() const { return _name; }
89 
92 
95 
97  union
98  {
99  uint8_t clock_data[10];
100 
101  struct
102  {
103  uint8_t sec;
104  uint8_t sec_alrm;
105  uint8_t min;
106  uint8_t min_alrm;
107  uint8_t hour;
108  uint8_t hour_alrm;
109  uint8_t wday;
110  uint8_t mday;
111  uint8_t mon;
112  uint8_t year;
113  };
114  };
115 
116  struct tm curTime;
117 
118  void setTime(const struct tm time);
119 
120  BitUnion8(RtcRegA)
121  Bitfield<7> uip;
122  Bitfield<6, 4> dv;
123 
132  Bitfield<3, 0> rs;
133  EndBitUnion(RtcRegA)
134 
135 
136  static inline bool rega_dv_disabled(const RtcRegA &reg);
137 
138  BitUnion8(RtcRegB)
139  Bitfield<7> set;
140  Bitfield<6> pie;
141  Bitfield<5> aie;
142  Bitfield<4> uie;
143  Bitfield<3> sqwe;
144  Bitfield<2> dm;
145  Bitfield<1> format24h;
146  Bitfield<0> dse;
147  EndBitUnion(RtcRegB)
148 
149 
150  RtcRegA stat_regA;
151 
153  RtcRegB stat_regB;
154 
155  public:
156  MC146818(EventManager *em, const std::string &name, const struct tm time,
157  bool bcd, Tick frequency);
158  virtual ~MC146818();
159 
161  virtual void startup();
162 
164  void writeData(const uint8_t addr, const uint8_t data);
165 
167  uint8_t readData(const uint8_t addr);
168 
169  void tickClock();
170 
176  void serialize(const std::string &base, CheckpointOut &cp) const;
177 
184  void unserialize(const std::string &base, CheckpointIn &cp);
185 };
186 
187 } // namespace gem5
188 
189 #endif // __DEV_MC146818_HH__
gem5::MC146818::uie
Bitfield< 4 > uie
1 = enable alarm interrupt
Definition: mc146818.hh:142
warn
#define warn(...)
Definition: logging.hh:245
data
const char data[]
Definition: circlebuf.test.cc:48
gem5::MC146818::RTCEvent::offset
Tick offset
Definition: mc146818.hh:55
gem5::MC146818::aie
Bitfield< 5 > aie
1 = enable periodic clock interrupt
Definition: mc146818.hh:141
gem5::MC146818::RTCEvent::parent
MC146818 * parent
Definition: mc146818.hh:53
gem5::MC146818::RTCTickEvent::parent
MC146818 * parent
Definition: mc146818.hh:72
gem5::MC146818::setTime
void setTime(const struct tm time)
Definition: mc146818.cc:64
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::MC146818::RTCTickEvent::RTCTickEvent
RTCTickEvent(MC146818 *_parent)
Definition: mc146818.hh:75
gem5::MC146818::event
RTCEvent event
RTC periodic interrupt event.
Definition: mc146818.hh:91
gem5::MC146818::RTCTickEvent::offset
Tick offset
Definition: mc146818.hh:73
gem5::MC146818::curTime
struct tm curTime
Definition: mc146818.hh:116
gem5::MC146818::MC146818
MC146818(EventManager *em, const std::string &name, const struct tm time, bool bcd, Tick frequency)
Definition: mc146818.cc:91
gem5::MC146818::RTCEvent
Event for RTC periodic interrupt.
Definition: mc146818.hh:51
gem5::X86ISA::base
Bitfield< 51, 12 > base
Definition: pagetable.hh:141
gem5::MC146818::RTCEvent::RTCEvent
RTCEvent(MC146818 *_parent, Tick i)
Definition: mc146818.cc:309
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:66
gem5::MC146818::sec
uint8_t sec
Definition: mc146818.hh:103
gem5::MC146818::pie
Bitfield< 6 > pie
stop clock updates
Definition: mc146818.hh:140
gem5::MC146818::format24h
Bitfield< 1 > format24h
0 = BCD, 1 = Binary coded time
Definition: mc146818.hh:145
gem5::MC146818::handleEvent
virtual void handleEvent()
Definition: mc146818.hh:44
gem5::X86ISA::em
Bitfield< 2 > em
Definition: misc.hh:608
gem5::EventManager
Definition: eventq.hh:987
gem5::MC146818::RTCTickEvent
Event for RTC periodic interrupt.
Definition: mc146818.hh:70
gem5::MC146818::_name
std::string _name
Definition: mc146818.hh:87
gem5::MC146818::name
const std::string & name() const
Definition: mc146818.hh:88
gem5::MC146818::~MC146818
virtual ~MC146818()
Definition: mc146818.cc:110
gem5::MC146818::stat_regB
RtcRegB stat_regB
RTC status register B.
Definition: mc146818.hh:153
gem5::MC146818::clock_data
uint8_t clock_data[10]
Definition: mc146818.hh:99
gem5::Event
Definition: eventq.hh:251
gem5::MC146818::startup
virtual void startup()
Start ticking.
Definition: mc146818.cc:124
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::MC146818::wday
uint8_t wday
Definition: mc146818.hh:109
bitunion.hh
gem5::ArmISA::s
Bitfield< 4 > s
Definition: misc_types.hh:561
gem5::MC146818::rs
Bitfield< 3, 0 > rs
Divider configuration.
Definition: mc146818.hh:132
gem5::MC146818::tickClock
void tickClock()
Definition: mc146818.cc:254
gem5::MC146818::hour_alrm
uint8_t hour_alrm
Definition: mc146818.hh:108
gem5::MC146818::RTCEvent::description
virtual const char * description() const
Event description.
Definition: mc146818.cc:330
gem5::MC146818::min
uint8_t min
Definition: mc146818.hh:105
gem5::PowerISA::tm
Bitfield< 32 > tm
Definition: misc.hh:107
gem5::MC146818::writeData
void writeData(const uint8_t addr, const uint8_t data)
RTC write data.
Definition: mc146818.cc:136
gem5::MC146818::RTCEvent::process
virtual void process()
Event process to occur at interrupt.
Definition: mc146818.cc:322
core.hh
gem5::MC146818::RTCTickEvent::process
void process()
Event process to occur at interrupt.
Definition: mc146818.cc:336
gem5::MC146818::RTCTickEvent::description
const char * description() const
Event description.
Definition: mc146818.cc:344
gem5::MC146818::hour
uint8_t hour
Definition: mc146818.hh:107
gem5::X86ISA::reg
Bitfield< 5, 3 > reg
Definition: types.hh:92
gem5::MC146818::serialize
void serialize(const std::string &base, CheckpointOut &cp) const
Serialize this object to the given output stream.
Definition: mc146818.cc:266
gem5::MC146818::min_alrm
uint8_t min_alrm
Definition: mc146818.hh:106
gem5::MC146818::dse
Bitfield< 0 > dse
0 = 12 hours, 1 = 24 hours
Definition: mc146818.hh:146
gem5::MC146818::mon
uint8_t mon
Definition: mc146818.hh:111
logging.hh
gem5::MC146818::RTCEvent::scheduleIntr
void scheduleIntr()
Schedule the RTC periodic interrupt.
Definition: mc146818.cc:316
gem5::MC146818::BitUnion8
BitUnion8(RtcRegA) Bitfield< 7 > uip
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::MC146818::RTCEvent::interval
Tick interval
Definition: mc146818.hh:54
gem5::MC146818::sqwe
Bitfield< 3 > sqwe
1 = enable update-ended interrupt
Definition: mc146818.hh:143
gem5::MC146818::dm
Bitfield< 2 > dm
1 = output sqare wave at SQW pin
Definition: mc146818.hh:144
gem5::MC146818::year
uint8_t year
Definition: mc146818.hh:112
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::MC146818::mday
uint8_t mday
Definition: mc146818.hh:110
gem5::MC146818::sec_alrm
uint8_t sec_alrm
Definition: mc146818.hh:104
gem5::MC146818::unserialize
void unserialize(const std::string &base, CheckpointIn &cp)
Reconstruct the state of this object from a checkpoint.
Definition: mc146818.cc:286
gem5::MC146818::readData
uint8_t readData(const uint8_t addr)
RTC read data.
Definition: mc146818.cc:229
gem5::MC146818::dv
Bitfield< 6, 4 > dv
1 = date and time update in progress
Definition: mc146818.hh:122
gem5::MC146818::tickEvent
RTCTickEvent tickEvent
RTC tick event.
Definition: mc146818.hh:94
gem5::MC146818
Real-Time Clock (MC146818)
Definition: mc146818.hh:41
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84
gem5::MC146818::EndBitUnion
EndBitUnion(RtcRegA) static inline bool rega_dv_disabled(const RtcRegA &reg)
Is the DV field in regA set to disabled?
eventq.hh

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