gem5 v24.0.0.0
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scoreboard.hh
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1/*
2 * Copyright (c) 2013-2014, 2016-2017 ARM Limited
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37
44#ifndef __CPU_MINOR_SCOREBOARD_HH__
45#define __CPU_MINOR_SCOREBOARD_HH__
46
47#include <vector>
48
49#include "base/named.hh"
50#include "base/types.hh"
51#include "cpu/minor/cpu.hh"
52#include "cpu/minor/dyn_inst.hh"
53#include "cpu/minor/trace.hh"
54#include "cpu/reg_class.hh"
55
56namespace gem5
57{
58
59namespace minor
60{
61
65class Scoreboard : public Named
66{
67 public:
69
70 const unsigned intRegOffset;
71 const unsigned floatRegOffset;
72 const unsigned ccRegOffset;
73 const unsigned vecRegOffset;
74 const unsigned vecRegElemOffset;
75 const unsigned vecPredRegOffset;
76 const unsigned matRegOffset;
77
84 const unsigned numRegs;
85
87 typedef unsigned short int Index;
88
92
95
98 static constexpr int invalidFUIndex = -1;
99
105
109
110 public:
111 Scoreboard(const std::string &name,
112 const BaseISA::RegClasses& reg_classes) :
113 Named(name),
114 regClasses(reg_classes),
115 intRegOffset(0),
118 vecRegOffset(ccRegOffset + reg_classes.at(CCRegClass)->numRegs()),
121 reg_classes.at(VecElemClass)->numRegs()),
123 reg_classes.at(VecPredRegClass)->numRegs()),
124 numRegs(matRegOffset + reg_classes.at(MatRegClass)->numRegs()),
130 { }
131
132 public:
136 bool findIndex(const RegId& reg, Index &scoreboard_index);
137
142 void markupInstDests(MinorDynInstPtr inst, Cycles retire_time,
143 ThreadContext *thread_context, bool mark_unpredictable);
144
147 void clearInstDests(MinorDynInstPtr inst, bool clear_unpredictable);
148
154 ThreadContext *thread_context);
155
159 const std::vector<Cycles> *src_reg_relative_latencies,
160 const std::vector<bool> *cant_forward_from_fu_indices,
161 Cycles now, ThreadContext *thread_context);
162
164 void minorTrace() const;
165};
166
167} // namespace minor
168} // namespace gem5
169
170#endif /* __CPU_MINOR_SCOREBOARD_HH__ */
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
Cycles is a wrapper class for representing cycle counts, i.e.
Definition types.hh:79
Interface for things with names.
Definition named.hh:39
virtual std::string name() const
Definition named.hh:47
Register ID: describe an architectural register with its class and index.
Definition reg_class.hh:94
ThreadContext is the external interface to all thread state for anything outside of the CPU.
A scoreboard of register dependencies including, for each register: The number of in-flight instructi...
Definition scoreboard.hh:66
std::vector< Index > numUnpredictableResults
Count of the number of results which can't be predicted.
Definition scoreboard.hh:94
void clearInstDests(MinorDynInstPtr inst, bool clear_unpredictable)
Clear down the dependencies for this instruction.
std::vector< Cycles > returnCycle
The estimated cycle number that the result will be presented.
static constexpr int invalidFUIndex
Definition scoreboard.hh:98
Scoreboard(const std::string &name, const BaseISA::RegClasses &reg_classes)
const unsigned intRegOffset
Definition scoreboard.hh:70
const unsigned floatRegOffset
Definition scoreboard.hh:71
bool canInstIssue(MinorDynInstPtr inst, const std::vector< Cycles > *src_reg_relative_latencies, const std::vector< bool > *cant_forward_from_fu_indices, Cycles now, ThreadContext *thread_context)
Can this instruction be issued.
InstSeqNum execSeqNumToWaitFor(MinorDynInstPtr inst, ThreadContext *thread_context)
Returns the exec sequence number of the most recent inst on which the given inst depends.
const BaseISA::RegClasses regClasses
Definition scoreboard.hh:68
const unsigned matRegOffset
Definition scoreboard.hh:76
const unsigned vecRegOffset
Definition scoreboard.hh:73
unsigned short int Index
Type to use when indexing numResults.
Definition scoreboard.hh:87
const unsigned ccRegOffset
Definition scoreboard.hh:72
std::vector< Index > numResults
Count of the number of in-flight instructions that have results for each register.
Definition scoreboard.hh:91
std::vector< int > fuIndices
Index of the FU generating this result.
Definition scoreboard.hh:97
const unsigned vecRegElemOffset
Definition scoreboard.hh:74
const unsigned vecPredRegOffset
Definition scoreboard.hh:75
bool findIndex(const RegId &reg, Index &scoreboard_index)
Sets scoreboard_index to the index into numResults of the given register index.
Definition scoreboard.cc:51
void markupInstDests(MinorDynInstPtr inst, Cycles retire_time, ThreadContext *thread_context, bool mark_unpredictable)
Mark up an instruction's effects by incrementing numResults counts.
Definition scoreboard.cc:99
std::vector< InstSeqNum > writingInst
The execute sequence number of the most recent inst to generate this register value.
void minorTrace() const
MinorTraceIF interface.
const unsigned numRegs
The number of registers in the Scoreboard.
Definition scoreboard.hh:84
Top level definition of the Minor in-order CPU model.
This file contains miscellaneous classes and functions for formatting general trace information and a...
The dynamic instruction and instruction/line id (sequence numbers) definition for Minor.
Bitfield< 35, 32 > at
Bitfield< 5, 3 > reg
Definition types.hh:92
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint64_t InstSeqNum
Definition inst_seq.hh:40
@ VecPredRegClass
Definition reg_class.hh:67
@ MatRegClass
Matrix Register.
Definition reg_class.hh:68
@ FloatRegClass
Floating-point register.
Definition reg_class.hh:62
@ CCRegClass
Condition-code register.
Definition reg_class.hh:69
@ VecRegClass
Vector Register.
Definition reg_class.hh:64
@ IntRegClass
Integer register.
Definition reg_class.hh:61
@ VecElemClass
Vector Register Native Elem lane.
Definition reg_class.hh:66
Minor contains all the definitions within the MinorCPU apart from the CPU class itself.

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