gem5 v24.0.0.0
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Enumerations | |
enum | : RegIndex { _R0Idx , _R1Idx , _R2Idx , _R3Idx , _R4Idx , _R5Idx , _R6Idx , _R7Idx , _R8Idx , _R9Idx , _R10Idx , _R11Idx , _R12Idx , _R13Idx , _R14Idx , _R15Idx , _R16Idx , _R17Idx , _R18Idx , _R19Idx , _R20Idx , _R21Idx , _R22Idx , _R23Idx , _R24Idx , _R25Idx , _R26Idx , _R27Idx , _R28Idx , _R29Idx , _R30Idx , _R31Idx , NumArchRegs , _CrIdx = NumArchRegs , _XerIdx , _LrIdx , _CtrIdx , _TarIdx , _FpscrIdx , _MsrIdx , _RsvIdx , _RsvLenIdx , _RsvAddrIdx , NumRegs } |
anonymous enum : RegIndex |
RegId gem5::PowerISA::int_reg::Cr = intRegClass[_CrIdx] |
Definition at line 138 of file int.hh.
Referenced by gem5::guest_abi::Result< PowerISA::SEWorkload::SyscallABI, SyscallReturn >::store().
RegId gem5::PowerISA::int_reg::Ctr = intRegClass[_CtrIdx] |
RegId gem5::PowerISA::int_reg::Fpscr = intRegClass[_FpscrIdx] |
RegId gem5::PowerISA::int_reg::Lr = intRegClass[_LrIdx] |
RegId gem5::PowerISA::int_reg::Msr = intRegClass[_MsrIdx] |
Definition at line 144 of file int.hh.
Referenced by gem5::PowerProcess::argsInit(), gem5::PowerISA::BranchDispCondOp::branchTarget(), gem5::PowerISA::BranchOp::branchTarget(), and gem5::PowerISA::BranchRegCondOp::branchTarget().
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inlineconstexpr |
Definition at line 105 of file int.hh.
Referenced by gem5::PowerISA::EmuLinux::syscall().
RegId gem5::PowerISA::int_reg::R1 = intRegClass[_R1Idx] |
RegId gem5::PowerISA::int_reg::R10 = intRegClass[_R10Idx] |
RegId gem5::PowerISA::int_reg::R11 = intRegClass[_R11Idx] |
RegId gem5::PowerISA::int_reg::R12 = intRegClass[_R12Idx] |
RegId gem5::PowerISA::int_reg::R13 = intRegClass[_R13Idx] |
RegId gem5::PowerISA::int_reg::R14 = intRegClass[_R14Idx] |
RegId gem5::PowerISA::int_reg::R15 = intRegClass[_R15Idx] |
RegId gem5::PowerISA::int_reg::R16 = intRegClass[_R16Idx] |
RegId gem5::PowerISA::int_reg::R17 = intRegClass[_R17Idx] |
RegId gem5::PowerISA::int_reg::R18 = intRegClass[_R18Idx] |
RegId gem5::PowerISA::int_reg::R19 = intRegClass[_R19Idx] |
RegId gem5::PowerISA::int_reg::R2 = intRegClass[_R2Idx] |
RegId gem5::PowerISA::int_reg::R20 = intRegClass[_R20Idx] |
RegId gem5::PowerISA::int_reg::R21 = intRegClass[_R21Idx] |
RegId gem5::PowerISA::int_reg::R22 = intRegClass[_R22Idx] |
RegId gem5::PowerISA::int_reg::R23 = intRegClass[_R23Idx] |
RegId gem5::PowerISA::int_reg::R24 = intRegClass[_R24Idx] |
RegId gem5::PowerISA::int_reg::R25 = intRegClass[_R25Idx] |
RegId gem5::PowerISA::int_reg::R26 = intRegClass[_R26Idx] |
RegId gem5::PowerISA::int_reg::R27 = intRegClass[_R27Idx] |
RegId gem5::PowerISA::int_reg::R28 = intRegClass[_R28Idx] |
RegId gem5::PowerISA::int_reg::R29 = intRegClass[_R29Idx] |
RegId gem5::PowerISA::int_reg::R3 = intRegClass[_R3Idx] |
RegId gem5::PowerISA::int_reg::R30 = intRegClass[_R30Idx] |
RegId gem5::PowerISA::int_reg::R31 = intRegClass[_R31Idx] |
RegId gem5::PowerISA::int_reg::R4 = intRegClass[_R4Idx] |
RegId gem5::PowerISA::int_reg::R5 = intRegClass[_R5Idx] |
RegId gem5::PowerISA::int_reg::R6 = intRegClass[_R6Idx] |
RegId gem5::PowerISA::int_reg::R7 = intRegClass[_R7Idx] |
RegId gem5::PowerISA::int_reg::R8 = intRegClass[_R8Idx] |
RegId gem5::PowerISA::int_reg::R9 = intRegClass[_R9Idx] |
RegId gem5::PowerISA::int_reg::Rsv = intRegClass[_RsvIdx] |
RegId gem5::PowerISA::int_reg::RsvAddr = intRegClass[_RsvAddrIdx] |
RegId gem5::PowerISA::int_reg::RsvLen = intRegClass[_RsvLenIdx] |
RegId gem5::PowerISA::int_reg::Tar = intRegClass[_TarIdx] |
RegId gem5::PowerISA::int_reg::Xer = intRegClass[_XerIdx] |