gem5 v24.0.0.0
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vec_reg.hh
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1/*
2 * Copyright (c) 2015-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
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8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
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11 * unmodified and in its entirety in all distributions of the software,
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13 *
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15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
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23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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36 */
37
97#ifndef __ARCH_GENERIC_VEC_REG_HH__
98#define __ARCH_GENERIC_VEC_REG_HH__
99
100#include <array>
101#include <cstdint>
102#include <iomanip>
103#include <iostream>
104#include <sstream>
105#include <string>
106
107#include "base/cprintf.hh"
108#include "base/logging.hh"
109#include "base/types.hh"
111
112namespace gem5
113{
114
115constexpr unsigned MaxVecRegLenInBytes = 1ULL << 16; // 2^16 bytes
116
124template <size_t SIZE>
126{
127 private:
128 static_assert(SIZE > 0,
129 "Cannot create Vector Register Container of zero size");
130 static_assert(SIZE <= MaxVecRegLenInBytes,
131 "Vector Register size limit exceeded");
132 public:
133 static constexpr inline size_t size() { return SIZE; };
134 using Container = std::array<uint8_t, SIZE>;
135 private:
136 // 16-byte aligned to support 128bit element view
137 alignas(16) Container container;
138
139 public:
142
144 void zero() { memset(container.data(), 0, SIZE); }
145
151 {
152 if (&that != this)
153 std::memcpy(container.data(), that.container.data(), SIZE);
154 return *this;
155 }
161 template<size_t S2>
162 inline bool
164 {
165 return SIZE == S2 &&
166 !memcmp(container.data(), that.container.data(), SIZE);
167 }
171 template<size_t S2>
172 bool
174 {
175 return !operator==(that);
176 }
177
189 template <typename VecElem>
190 VecElem *
192 {
193 static_assert(SIZE % sizeof(VecElem) == 0,
194 "VecElem does not evenly divide the register size");
195 return (VecElem *)container.data();
196 }
197
198 template <typename VecElem>
199 const VecElem *
200 as() const
201 {
202 static_assert(SIZE % sizeof(VecElem) == 0,
203 "VecElem does not evenly divide the register size");
204 return (VecElem *)container.data();
205 }
206
207 friend std::ostream&
208 operator<<(std::ostream& os, const VecRegContainer<SIZE>& v)
209 {
210 // When printing for human consumption, break into 4 byte chunks.
211 ccprintf(os, "[");
212 size_t count = 0;
213 for (auto& b: v.container) {
214 if (count && (count % 4) == 0)
215 os << "_";
216 ccprintf(os, "%02x", b);
217 count++;
218 }
219 ccprintf(os, "]");
220 return os;
221 }
222
223 std::string
224 getString(const uint64_t& size) const
225 {
226 std::stringstream s;
227 size_t count = 0;
228 s << "[";
229 for (auto& b: container) {
230 if (count && (count % 4) == 0)
231 s << "_";
232 s << std::hex << std::setfill('0') << std::setw(2) << (uint16_t)b;
233 count++;
234 if (count == size)
235 break;
236 }
237 s << "]";
238 return s.str();
239 }
240
246};
247
252template <size_t Sz>
254{
255 static bool
256 parse(const std::string &str, VecRegContainer<Sz> &value)
257 {
258 fatal_if(str.size() > 2 * Sz,
259 "Vector register value overflow at unserialize");
260
261 for (int i = 0; i < Sz; i++) {
262 uint8_t b = 0;
263 if (2 * i < str.size())
264 b = stoul(str.substr(i * 2, 2), nullptr, 16);
265 value.template as<uint8_t>()[i] = b;
266 }
267 return true;
268 }
269};
270
271template <size_t Sz>
273{
274 static void
275 show(std::ostream &os, const VecRegContainer<Sz> &value)
276 {
277 for (auto& b: value.container)
278 ccprintf(os, "%02x", b);
279 }
280};
289{
291 bool operator == (const DummyVecRegContainer &d) const { return true; }
292 bool operator != (const DummyVecRegContainer &d) const { return true; }
293 template <typename VecElem>
294 VecElem *as() { return nullptr; }
295};
296template <>
298{
299 static bool
300 parse(const std::string &s, DummyVecRegContainer &value)
301 {
302 return false;
303 }
304};
305static_assert(sizeof(DummyVecRegContainer) == sizeof(RegVal));
306static inline std::ostream &
307operator<<(std::ostream &os, const DummyVecRegContainer &d)
308{
309 return os;
310}
313} // namespace gem5
314
315#endif /* __ARCH_GENERIC_VEC_REG_HH__ */
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
Vector Register Abstraction This generic class is the model in a particularization of MVC,...
Definition vec_reg.hh:126
const VecElem * as() const
Definition vec_reg.hh:200
std::string getString(const uint64_t &size) const
Definition vec_reg.hh:224
bool operator==(const VecRegContainer< S2 > &that) const
Equality operator.
Definition vec_reg.hh:163
friend std::ostream & operator<<(std::ostream &os, const VecRegContainer< SIZE > &v)
Definition vec_reg.hh:208
static constexpr size_t size()
Definition vec_reg.hh:133
VecRegContainer(const VecRegContainer &)=default
VecElem * as()
View interposers.
Definition vec_reg.hh:191
VecRegContainer< SIZE > & operator=(const VecRegContainer< SIZE > &that)
Assignment operators.
Definition vec_reg.hh:150
void zero()
Zero the container.
Definition vec_reg.hh:144
bool operator!=(const VecRegContainer< S2 > &that) const
Inequality operator.
Definition vec_reg.hh:173
std::array< uint8_t, SIZE > Container
Definition vec_reg.hh:134
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition logging.hh:236
Bitfield< 28 > v
Definition misc_types.hh:54
Bitfield< 4 > s
Bitfield< 7 > b
Bitfield< 7 > i
Definition misc_types.hh:67
Bitfield< 36 > as
uint32_t VecElem
Definition vec.hh:63
Bitfield< 9 > d
Definition misc_types.hh:64
Bitfield< 17 > os
Definition misc.hh:838
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint64_t RegVal
Definition types.hh:173
static std::ostream & operator<<(std::ostream &os, const DummyMatRegContainer &d)
Definition matrix.hh:564
constexpr unsigned MaxVecRegLenInBytes
Definition vec_reg.hh:115
void ccprintf(cp::Print &print)
Definition cprintf.hh:130
Dummy type aliases and constants for architectures that do not implement vector registers.
Definition vec_reg.hh:289
bool operator==(const DummyVecRegContainer &d) const
Definition vec_reg.hh:291
bool operator!=(const DummyVecRegContainer &d) const
Definition vec_reg.hh:292
static bool parse(const std::string &s, DummyVecRegContainer &value)
Definition vec_reg.hh:300
static bool parse(const std::string &str, VecRegContainer< Sz > &value)
Definition vec_reg.hh:256
static void show(std::ostream &os, const VecRegContainer< Sz > &value)
Definition vec_reg.hh:275

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