gem5  v22.0.0.2
debug.cc
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2003-2005 The Regents of The University of Michigan
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are
7  * met: redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer;
9  * redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution;
12  * neither the name of the copyright holders nor the names of its
13  * contributors may be used to endorse or promote products derived from
14  * this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include "sim/debug.hh"
30 
31 #include <string>
32 #include <vector>
33 
34 #include "base/debug.hh"
35 #include "cpu/pc_event.hh"
36 #include "sim/eventq.hh"
37 #include "sim/global_event.hh"
38 #include "sim/kernel_workload.hh"
39 #include "sim/sim_events.hh"
40 #include "sim/sim_exit.hh"
41 #include "sim/system.hh"
42 
43 namespace gem5
44 {
45 
46 //
47 // Debug event: place a breakpoint on the process function and
48 // schedule the event to break at a particular cycle
49 //
51 {
53  void process(); // process event
54  virtual const char *description() const;
55 };
56 
57 //
58 // constructor: schedule at specified time
59 //
61  : GlobalEvent(when, Debug_Break_Pri, AutoDelete)
62 {
63 }
64 
65 //
66 // handle debug event: set debugger breakpoint on this function
67 //
68 void
70 {
72 }
73 
74 
75 const char *
77 {
78  return "debug breakpoint";
79 }
80 
81 //
82 // handy function to schedule DebugBreakEvent on main event queue
83 // (callable from debugger)
84 //
85 void
87 {
88  new DebugBreakEvent(when);
89  warn("need to stop all queues");
90 }
91 
92 void
94 {
95  schedBreak(curTick() + delta);
96 }
97 
101 void
103 {
104  if (!when)
105  when = curTick() + 1;
106  exitSimLoop("checkpoint", 0, when, 0);
107 }
108 
109 void
111 {
112  for (uint32_t i = 0; i < numMainEventQueues; ++i) {
113  mainEventQueue[i]->dump();
114  }
115 }
116 
118 
119 int
121 {
122  return remote_gdb_base_port;
123 }
124 
125 // Set remote GDB base port. 0 means disable remote GDB.
126 // Callable from python.
127 void
129 {
130  remote_gdb_base_port = port;
131 }
132 
133 } // namespace gem5
gem5::curTick
Tick curTick()
The universal simulation clock.
Definition: cur_tick.hh:46
warn
#define warn(...)
Definition: logging.hh:246
system.hh
gem5::mainEventQueue
std::vector< EventQueue * > mainEventQueue
Array for main event queues.
Definition: eventq.cc:57
sim_events.hh
gem5::takeCheckpoint
void takeCheckpoint(Tick when)
Function to cause the simulator to take a checkpoint from the debugger.
Definition: debug.cc:102
gem5::setRemoteGDBPort
void setRemoteGDBPort(int port)
Definition: debug.cc:128
gem5::debug::breakpoint
void breakpoint()
Definition: debug.cc:65
gem5::DebugBreakEvent::process
void process()
Definition: debug.cc:69
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:67
sim_exit.hh
gem5::exitSimLoop
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
Definition: sim_events.cc:88
gem5::schedRelBreak
void schedRelBreak(Tick delta)
Cause the simulator to execute a breakpoint relative to the current tick.
Definition: debug.cc:93
debug.hh
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::DebugBreakEvent
Definition: debug.cc:50
debug.hh
gem5::BaseGlobalEvent::when
Tick when() const
Definition: global_event.hh:139
gem5::getRemoteGDBPort
int getRemoteGDBPort()
Definition: debug.cc:120
gem5::GlobalEvent
The main global event class.
Definition: global_event.hh:176
pc_event.hh
gem5::numMainEventQueues
uint32_t numMainEventQueues
Current number of allocated main event queues.
Definition: eventq.cc:56
gem5::eventqDump
void eventqDump()
Dump all the events currently on the event queue.
Definition: debug.cc:110
kernel_workload.hh
gem5::DebugBreakEvent::description
virtual const char * description() const
Definition: debug.cc:76
gem5::schedBreak
void schedBreak(Tick when)
Cause the simulator to execute a breakpoint.
Definition: debug.cc:86
gem5::remote_gdb_base_port
int remote_gdb_base_port
Definition: debug.cc:117
gem5::DebugBreakEvent::DebugBreakEvent
DebugBreakEvent(Tick when)
Definition: debug.cc:60
global_event.hh
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
eventq.hh

Generated on Thu Jul 28 2022 13:32:26 for gem5 by doxygen 1.8.17