gem5 v24.0.0.0
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#include "arch/sparc/isa.hh"
#include "arch/sparc/asi.hh"
#include "arch/sparc/decoder.hh"
#include "arch/sparc/interrupts.hh"
#include "arch/sparc/regs/float.hh"
#include "arch/sparc/regs/int.hh"
#include "arch/sparc/regs/misc.hh"
#include "arch/sparc/sparc_traits.hh"
#include "base/bitfield.hh"
#include "base/trace.hh"
#include "cpu/base.hh"
#include "cpu/thread_context.hh"
#include "debug/MatRegs.hh"
#include "debug/Timer.hh"
#include "params/SparcISA.hh"
Go to the source code of this file.
Namespaces | |
namespace | gem5 |
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved. | |
namespace | gem5::SparcISA |
Functions | |
static PSTATE | gem5::SparcISA::buildPstateMask () |
static void | gem5::SparcISA::copyMiscRegs (ThreadContext *src, ThreadContext *dest) |
Variables | |
static const PSTATE | gem5::SparcISA::PstateMask = buildPstateMask() |