gem5 v24.0.0.0
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tage.cc
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1/*
2 * Copyright (c) 2022-2023 The University of Edinburgh
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2014 The University of Wisconsin
15 *
16 * Copyright (c) 2006 INRIA (Institut National de Recherche en
17 * Informatique et en Automatique / French National Research Institute
18 * for Computer Science and Applied Mathematics)
19 *
20 * All rights reserved.
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31 * this software without specific prior written permission.
32 *
33 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
34 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
35 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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43 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
44 */
45
46/* @file
47 * Implementation of a TAGE branch predictor
48 */
49
50#include "cpu/pred/tage.hh"
51
52#include "base/intmath.hh"
53#include "base/logging.hh"
54#include "base/random.hh"
55#include "base/trace.hh"
56#include "debug/Fetch.hh"
57#include "debug/Tage.hh"
58
59namespace gem5
60{
61
62namespace branch_prediction
63{
64
65TAGE::TAGE(const TAGEParams &params) : BPredUnit(params), tage(params.tage)
66{
67}
68
69// PREDICTOR UPDATE
70void
71TAGE::update(ThreadID tid, Addr pc, bool taken, void * &bp_history,
72 bool squashed, const StaticInstPtr & inst, Addr target)
73{
74 assert(bp_history);
75
76 TageBranchInfo *bi = static_cast<TageBranchInfo*>(bp_history);
77 TAGEBase::BranchInfo *tage_bi = bi->tageBranchInfo;
78
79 if (squashed) {
80 // This restores the global history, then update it
81 // and recomputes the folded histories.
82 tage->squash(tid, taken, tage_bi, target);
83 return;
84 }
85
86 int nrand = random_mt.random<int>() & 3;
87 if (bi->tageBranchInfo->condBranch) {
88 DPRINTF(Tage, "Updating tables for branch:%lx; taken?:%d\n",
89 pc, taken);
90 tage->updateStats(taken, bi->tageBranchInfo);
91 tage->condBranchUpdate(tid, pc, taken, tage_bi, nrand,
92 target, bi->tageBranchInfo->tagePred);
93 }
94
95 // optional non speculative update of the histories
96 tage->updateHistories(tid, pc, taken, tage_bi, false, inst, target);
97 delete bi;
98 bp_history = nullptr;
99}
100
101void
102TAGE::squash(ThreadID tid, void * &bp_history)
103{
104 TageBranchInfo *bi = static_cast<TageBranchInfo*>(bp_history);
105 DPRINTF(Tage, "Deleting branch info: %lx\n", bi->tageBranchInfo->branchPC);
106 delete bi;
107 bp_history = nullptr;
108}
109
110bool
111TAGE::predict(ThreadID tid, Addr pc, bool cond_branch, void* &b)
112{
113 TageBranchInfo *bi = new TageBranchInfo(*tage);//nHistoryTables+1);
114 b = (void*)(bi);
115 return tage->tagePredict(tid, pc, cond_branch, bi->tageBranchInfo);
116}
117
118bool
119TAGE::lookup(ThreadID tid, Addr pc, void* &bp_history)
120{
121 bool retval = predict(tid, pc, true, bp_history);
122
123 DPRINTF(Tage, "Lookup branch: %lx; predict:%d\n", pc, retval);
124
125 return retval;
126}
127
128void
130 bool taken, Addr target, void * &bp_history)
131{
132 assert(uncond || bp_history);
133 if (uncond) {
134 DPRINTF(Tage, "UnConditionalBranch: %lx\n", pc);
135 predict(tid, pc, false, bp_history);
136 }
137
138 // Update the global history for all branches
139 TageBranchInfo *bi = static_cast<TageBranchInfo*>(bp_history);
140 tage->updateHistories(tid, pc, taken, bi->tageBranchInfo, true);
141}
142
143} // namespace branch_prediction
144} // namespace gem5
#define DPRINTF(x,...)
Definition trace.hh:210
Basically a wrapper class to hold both the branch predictor and the BTB.
Definition bpred_unit.hh:71
virtual void updateHistories(ThreadID tid, Addr branch_pc, bool taken, BranchInfo *b, bool speculative, const StaticInstPtr &inst=nullStaticInstPtr, Addr target=MaxAddr)
(Speculatively) updates global histories (path and direction).
Definition tage_base.cc:588
virtual void updateStats(bool taken, BranchInfo *bi)
Update the stats.
Definition tage_base.cc:662
virtual void squash(ThreadID tid, bool taken, BranchInfo *bi, Addr target)
Restores speculatively updated path and direction histories.
Definition tage_base.cc:629
bool tagePredict(ThreadID tid, Addr branch_pc, bool cond_branch, BranchInfo *bi)
TAGE prediction called from TAGE::predict.
Definition tage_base.cc:360
virtual void condBranchUpdate(ThreadID tid, Addr branch_pc, bool taken, BranchInfo *bi, int nrand, Addr corrTarget, bool pred, bool preAdjustAlloc=false)
Update TAGE for conditional branches.
Definition tage_base.cc:514
TAGE(const TAGEParams &params)
Definition tage.cc:65
bool lookup(ThreadID tid, Addr pc, void *&bp_history) override
Looks up a given conditional branch PC of in the BP to see if it is taken or not taken.
Definition tage.cc:119
void updateHistories(ThreadID tid, Addr pc, bool uncond, bool taken, Addr target, void *&bp_history) override
Ones done with the prediction this function updates the path and global history.
Definition tage.cc:129
virtual bool predict(ThreadID tid, Addr branch_pc, bool cond_branch, void *&b)
Definition tage.cc:111
virtual void squash(ThreadID tid, void *&bp_history) override
Definition tage.cc:102
void update(ThreadID tid, Addr pc, bool taken, void *&bp_history, bool squashed, const StaticInstPtr &inst, Addr target) override
Updates the BP with taken/not taken information.
Definition tage.cc:71
Random random_mt
Definition random.cc:99
std::enable_if_t< std::is_integral_v< T >, T > random()
Use the SFINAE idiom to choose an implementation based on whether the type is integral or floating po...
Definition random.hh:90
Bitfield< 7 > b
Bitfield< 4 > pc
Bitfield< 20, 16 > bi
Definition types.hh:80
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
int16_t ThreadID
Thread index/ID type.
Definition types.hh:235
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147

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