gem5 v24.0.0.0
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bpred_unit.hh
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1/*
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40 */
41
42#ifndef __CPU_PRED_BPRED_UNIT_HH__
43#define __CPU_PRED_BPRED_UNIT_HH__
44
45#include <deque>
46
47#include "base/statistics.hh"
48#include "base/types.hh"
49#include "cpu/inst_seq.hh"
51#include "cpu/pred/btb.hh"
52#include "cpu/pred/indirect.hh"
53#include "cpu/pred/ras.hh"
54#include "cpu/static_inst.hh"
55#include "enums/TargetProvider.hh"
56#include "params/BranchPredictor.hh"
57#include "sim/probe/pmu.hh"
58#include "sim/sim_object.hh"
59
60namespace gem5
61{
62
63namespace branch_prediction
64{
65
70class BPredUnit : public SimObject
71{
72 typedef BranchPredictorParams Params;
73 typedef enums::TargetProvider TargetProvider;
74
76 public:
77
78
79
83 BPredUnit(const Params &p);
84
85 void regProbePoints() override;
86
88 void drainSanityCheck() const;
89
98 bool predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
99 PCStateBase &pc, ThreadID tid);
100
107 void update(const InstSeqNum &done_sn, ThreadID tid);
108
115 void squash(const InstSeqNum &squashed_sn, ThreadID tid);
116
128 void squash(const InstSeqNum &squashed_sn, const PCStateBase &corr_target,
129 bool actually_taken, ThreadID tid, bool from_commit=true);
130
131 protected:
132
146 virtual bool lookup(ThreadID tid, Addr pc, void * &bp_history) = 0;
147
161 virtual void updateHistories(ThreadID tid, Addr pc, bool uncond,
162 bool taken, Addr target, void * &bp_history) = 0;
163
169 virtual void squash(ThreadID tid, void * &bp_history) = 0;
170
171
186 virtual void update(ThreadID tid, Addr pc, bool taken,
187 void * &bp_history, bool squashed,
188 const StaticInstPtr &inst, Addr target) = 0;
189
190
197 bool BTBValid(ThreadID tid, Addr instPC)
198 {
199 return btb->valid(tid, instPC);
200 }
201
210 const PCStateBase *
212 {
213 return btb->lookup(tid, instPC.instAddr());
214 }
215
226 const StaticInstPtr
228 {
229 return btb->getInst(tid, instPC);
230 }
231
237 void
238 BTBUpdate(ThreadID tid, Addr instPC, const PCStateBase &target)
239 {
241 return btb->update(tid, instPC, target);
242 }
243
244
245 void dump();
246
247 private:
249 {
255 const StaticInstPtr & inst)
256 : seqNum(sn), tid(_tid), pc(_pc),
258 call(inst->isCall()), uncond(inst->isUncondCtrl()),
259 predTaken(false), actuallyTaken(false), condPred(false),
260 btbHit(false), targetProvider(TargetProvider::NoTarget),
261 resteered(false), mispredict(false), target(nullptr),
262 bpHistory(nullptr),
263 indirectHistory(nullptr), rasHistory(nullptr)
264 { }
265
267 {
268 assert(bpHistory == nullptr);
269 assert(indirectHistory == nullptr);
270 assert(rasHistory == nullptr);
271 }
272
275
276 bool
277 operator==(const PredictorHistory &entry) const
278 {
279 return this->seqNum == entry.seqNum;
280 }
281
284
287
289 const Addr pc;
290
293
296
298 const bool call;
299
301 const bool uncond;
302
305
308
311
313 bool btbHit;
314
317
320
323
325 std::unique_ptr<PCStateBase> target;
326
333 void *bpHistory = nullptr;
334
335 void *indirectHistory = nullptr;
336
337 void *rasHistory = nullptr;
338
339 };
340
342
343
347 bool predict(const StaticInstPtr &inst, const InstSeqNum &seqNum,
348 PCStateBase &pc, ThreadID tid, PredictorHistory* &bpu_history);
349
355 void squashHistory(ThreadID tid, PredictorHistory* &bpu_history);
356
357
363 void commitBranch(ThreadID tid, PredictorHistory* &bpu_history);
364
365
366
367 protected:
369 const unsigned numThreads;
370
377 const bool requiresBTBHit;
378
380 const unsigned instShiftAmt;
381
388
391
394
397
437
438 protected:
439
453
454
461
464
466};
467
468} // namespace branch_prediction
469} // namespace gem5
470
471#endif // __CPU_PRED_BPRED_UNIT_HH__
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
virtual std::string name() const
Definition named.hh:47
Addr instAddr() const
Returns the memory address of the instruction this PC points to.
Definition pcstate.hh:108
Abstract superclass for simulation objects.
Basically a wrapper class to hold both the branch predictor and the BTB.
Definition bpred_unit.hh:71
const StaticInstPtr BTBGetInst(ThreadID tid, Addr instPC)
Looks up a given PC in the BTB to get current static instruction information.
std::vector< History > predHist
The per-thread predictor history.
probing::PMUUPtr pmuProbePoint(const char *name)
Helper method to instantiate probe points belonging to this object.
Definition bpred_unit.cc:73
void update(const InstSeqNum &done_sn, ThreadID tid)
Tells the branch predictor to commit any updates until the given sequence number.
BPredUnit(const Params &p)
Branch Predictor Unit (BPU) interface functions.
Definition bpred_unit.cc:58
bool predict(const StaticInstPtr &inst, const InstSeqNum &seqNum, PCStateBase &pc, ThreadID tid)
Predicts whether or not the instruction is a taken branch, and the target of the branch if it is take...
Definition bpred_unit.cc:99
probing::PMUUPtr ppMisses
Miss-predicted branches.
const bool requiresBTBHit
Requires the BTB to hit for returns and indirect branches.
virtual void squash(ThreadID tid, void *&bp_history)=0
bool BTBValid(ThreadID tid, Addr instPC)
Looks up a given PC in the BTB to see if a matching entry exists.
void drainSanityCheck() const
Perform sanity checks after a drain.
Definition bpred_unit.cc:89
void BTBUpdate(ThreadID tid, Addr instPC, const PCStateBase &target)
Updates the BTB with the target of a branch.
IndirectPredictor * iPred
The indirect target predictor.
void commitBranch(ThreadID tid, PredictorHistory *&bpu_history)
Commit a particular branch.
probing::PMUUPtr ppBranches
Branches seen by the branch predictor.
virtual void update(ThreadID tid, Addr pc, bool taken, void *&bp_history, bool squashed, const StaticInstPtr &inst, Addr target)=0
Updates the BP with taken/not taken information.
void regProbePoints() override
Register probe points for this object.
Definition bpred_unit.cc:82
enums::TargetProvider TargetProvider
Definition bpred_unit.hh:73
const unsigned numThreads
Number of the threads for which the branch history is maintained.
virtual bool lookup(ThreadID tid, Addr pc, void *&bp_history)=0
Looks up a given conditional branch PC of in the BP to see if it is taken or not taken.
const unsigned instShiftAmt
Number of bits to shift instructions by for predictor addresses.
virtual void updateHistories(ThreadID tid, Addr pc, bool uncond, bool taken, Addr target, void *&bp_history)=0
Ones done with the prediction this function updates the path and global history.
BranchPredictorParams Params
Definition bpred_unit.hh:72
void squashHistory(ThreadID tid, PredictorHistory *&bpu_history)
Squashes a particular branch instance.
const PCStateBase * BTBLookup(ThreadID tid, PCStateBase &instPC)
Looks up a given PC in the BTB to get the predicted target.
ReturnAddrStack * ras
The return address stack.
void squash(const InstSeqNum &squashed_sn, ThreadID tid)
Squashes all outstanding updates until a given sequence number.
gem5::branch_prediction::BPredUnit::BPredUnitStats stats
BranchTargetBuffer * btb
The BTB.
std::deque< PredictorHistory * > History
virtual const PCStateBase * lookup(ThreadID tid, Addr instPC, BranchType type=BranchType::NoBranch)=0
Looks up an address in the BTB to get the target of the branch.
virtual bool valid(ThreadID tid, Addr instPC)=0
Checks if a branch address is in the BTB.
virtual const StaticInstPtr getInst(ThreadID tid, Addr instPC)=0
Looks up an address in the BTB and return the instruction information if existant.
virtual void update(ThreadID tid, Addr inst_pc, const PCStateBase &target_pc, BranchType type=BranchType::NoBranch, StaticInstPtr inst=nullptr)=0
Updates the BTB with the target of a branch.
Return address stack class, implements a simple RAS.
Definition ras.hh:62
A formula for statistics that is calculated when printed.
Statistics container.
Definition group.hh:93
This is a simple scalar statistic, like a counter.
A 2-Dimensional vecto of scalar stats.
STL deque class.
Definition stl.hh:44
STL vector class.
Definition stl.hh:37
Bitfield< 4 > pc
Bitfield< 0 > p
BranchType getBranchType(StaticInstPtr inst)
enums::BranchType BranchType
std::unique_ptr< PMU > PMUUPtr
Definition pmu.hh:60
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
int16_t ThreadID
Thread index/ID type.
Definition types.hh:235
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
uint64_t InstSeqNum
Definition inst_seq.hh:40
Declaration of Statistics objects.
statistics::Scalar indirectLookups
Indirect stats.
statistics::Vector2d lookups
Stats per branch type.
statistics::Vector2d targetProvider
Target prediction per branch type.
statistics::Scalar condPredicted
Additional scalar stats for conditional branches.
bool predTaken
Whether or not it was predicted taken.
const InstSeqNum seqNum
The sequence number for the predictor history entry.
bool condPred
The prediction of the conditional predictor.
void * bpHistory
Pointer to the history objects passed back from the branch predictor subcomponents.
const Addr pc
The PC associated with the sequence number.
const bool call
Whether or not the instruction was a call.
PredictorHistory & operator=(const PredictorHistory &)=delete
bool operator==(const PredictorHistory &entry) const
PredictorHistory(const PredictorHistory &)=delete
const StaticInstPtr inst
The branch instrction.
bool actuallyTaken
To record the actual outcome of the branch.
bool mispredict
The branch was corrected hence was mispredicted.
PredictorHistory(ThreadID _tid, InstSeqNum sn, Addr _pc, const StaticInstPtr &inst)
Makes a predictor history struct that contains any information needed to update the predictor,...
const bool uncond
Was unconditional control.
const BranchType type
The type of the branch.
bool btbHit
Was BTB hit at prediction time.
std::unique_ptr< PCStateBase > target
The predicted target.
TargetProvider targetProvider
Which component provided the target.

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