29#ifndef __ARCH_X86_DECODER_HH__
30#define __ARCH_X86_DECODER_HH__
33#include <unordered_map>
46#include "debug/Decoder.hh"
47#include "params/X86Decoder.hh"
127 int toGet = size - collected;
131 toGet = toGet > remaining ? remaining : toGet;
136 partialImm &=
mask(toGet * 8);
140 current |= partialImm;
151 DPRINTF(
Decoder,
"At the end of a chunk, idx = %d, chunks = %d.\n",
230 bool addrSizedImm =
false);
245 typedef std::unordered_map<
271 mode = (X86Mode)(uint64_t)m5Reg.mode;
282 AddrCacheMap::iterator amIter =
addrCacheMap.find(m5Reg);
290 InstCacheMap::iterator imIter =
instCacheMap.find(m5Reg);
334 offset = (fetchPC >=
pc.instAddr()) ? 0 :
pc.instAddr() - fetchPC;
343 if (!nextPC.
size()) {
346 "Calculating the instruction size: "
347 "basePC: %#x offset: %#x origPC: %#x size: %d\n",
350 nextPC.
npc(nextPC.
pc() + size);
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
virtual void takeOverFrom(InstDecoder *old)
Take over the state from an old decoder when switching CPUs.
State doPrefixState(uint8_t)
std::unordered_map< CacheKey, decode_cache::InstMap< ExtMachInst > * > InstCacheMap
StaticInstPtr decode(ExtMachInst mach_inst, Addr addr)
Decode a machine instruction.
static ByteTable ImmediateTypeTwoByte
State processExtendedOpcode(ByteTable &immTable)
@ ThreeByte0F3AOpcodeState
@ ThreeByte0F38OpcodeState
void consumeBytes(int numBytes)
DecodePages * decodePages
StaticInstPtr fetchRomMicroop(MicroPC micropc, StaticInstPtr curMacroop) override
State doThreeByte0F3AOpcodeState(uint8_t)
static ByteTable UsesModRMTwoByte
AddrCacheMap addrCacheMap
void updateNPC(X86ISA::PCState &nextPC)
State doVex3Of3State(uint8_t)
decode_cache::InstMap< ExtMachInst > * instMap
static ByteTable UsesModRMThreeByte0F3A
State doVexOpcodeState(uint8_t)
void takeOverFrom(InstDecoder *old) override
Take over the state from an old decoder when switching CPUs.
State doDisplacementState()
decode_cache::AddrMap< Decoder::InstBytes > DecodePages
RegVal CacheKey
Caching for decoded instruction objects.
const uint8_t ByteTable[256]
State doVex2Of2State(uint8_t)
static ByteTable ImmediateTypeThreeByte0F38
State doVex2Of3State(uint8_t)
Decoder(const X86DecoderParams &p)
void getImmediate(int &collected, uint64_t ¤t, int size)
State processOpcode(ByteTable &immTable, ByteTable &modrmTable, bool addrSizedImm=false)
static ByteTable UsesModRMThreeByte0F38
StaticInstPtr decodeInst(ExtMachInst mach_inst)
static InstCacheMap instCacheMap
State doOneByteOpcodeState(uint8_t)
static const uint8_t SizeTypeToSize[3][10]
State doTwoByteOpcodeState(uint8_t)
static X86ISAInst::MicrocodeRom microcodeRom
void setM5Reg(HandyM5Reg m5Reg)
static ByteTable ImmediateTypeThreeByte0F3A
State doThreeByte0F38OpcodeState(uint8_t)
static ByteTable ImmediateTypeOneByte
State doSIBState(uint8_t)
State doModRMState(uint8_t)
void moreBytes(const PCStateBase &pc, Addr fetchPC) override
Feed data to the decoder.
std::unordered_map< CacheKey, DecodePages * > AddrCacheMap
static ByteTable UsesModRMOneByte
A sparse map from an Addr to a Value, stored in page chunks.
std::unordered_map< EMI, StaticInstPtr > InstMap
Hash for decoded instructions.
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
std::vector< MachInst > chunks
std::vector< MachInst > masks