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40 #include "arch/utility.hh"
44 #include "debug/Drain.hh"
45 #include "debug/MinorCPU.hh"
46 #include "debug/Quiesce.hh"
50 threadPolicy(params->threadPolicy)
73 fatal(
"The Minor model doesn't support checking (yet)\n");
96 if (!
params()->switched_out &&
99 fatal(
"The Minor CPU requires the memory system to be in "
104 for (
ThreadID thread_id = 0; thread_id <
threads.size(); thread_id++) {
149 DPRINTF(Drain,
"[tid:%d] MinorCPU wakeup\n", tid);
175 DPRINTF(Drain,
"Minor CPU switched out, draining not needed.\n");
179 DPRINTF(Drain,
"MinorCPU drain\n");
184 DPRINTF(Drain,
"MinorCPU drained\n");
187 DPRINTF(Drain,
"MinorCPU not finished draining\n");
195 DPRINTF(Drain,
"MinorCPU drain done\n");
208 DPRINTF(Drain,
"drainResume while switched out. Ignoring\n");
212 DPRINTF(Drain,
"MinorCPU drainResume\n");
215 fatal(
"The Minor CPU requires the memory system to be in "
232 DPRINTF(Drain,
"MinorCPU memWriteback\n");
267 threads[thread_id]->activate();
287 DPRINTF(Quiesce,
"Event wakeup from stage %d\n", stage_id);
295 MinorCPUParams::create()
318 ret += (*i)->numInst;
#define fatal(...)
This implements a cprintf based fatal() function.
void wakeup(ThreadID tid) override
Counter totalInsts() const override
Simple inst count interface from BaseCPU.
void wakeupOnEvent(unsigned int stage_id)
Interface for stages to signal that they have become active after a callback or eventq event where th...
Port & getInstPort() override
Return a reference to the instruction port.
bool isTimingMode() const
Is the system in timing mode?
void init() override
Starting, waking and initialisation.
int16_t ThreadID
Thread index/ID type.
void suspendContext(ThreadID thread_id) override
Notify the CPU that the indicated context is now suspended.
Minor::MinorActivityRecorder * activityRecorder
Activity recording for pipeline.
SimpleThread MinorThread
Minor will use the SimpleThread state for now.
Minor::MinorStats stats
Processor-specific statistics.
void deschedulePowerGatingEvent()
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
virtual ThreadContext * getContext(int tn)
Given a thread num get tho thread context for it.
The SimpleThread object provides a combination of the ThreadState object and the ThreadContext interf...
MinorCPU(MinorCPUParams *params)
std::vector< Minor::MinorThread * > threads
These are thread state-representing objects for this CPU.
@ Drained
Buffers drained, ready for serialization/handover.
DrainState
Object drain/handover states.
int64_t Counter
Statistics counter type.
void takeOverFrom(BaseCPU *old_cpu) override
Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be sw...
virtual void initMemProxies(ThreadContext *tc)=0
Initialise the physical and virtual port proxies and tie them to the data port of the CPU.
ThreadContext is the external interface to all thread state for anything outside of the CPU.
void setStatus(Status newStatus) override
ThreadContext * getTC()
Returns the pointer to this SimpleThread's ThreadContext.
MinorCPU is an in-order CPU model with four fixed pipeline stages:
static void init()
Initialise the class.
@ Halted
Permanently shut down.
void switchOut() override
Switching interface from BaseCPU.
void memWriteback() override
Ports are used to interface objects to each other.
The constructed pipeline.
void drainResume() override
std::vector< ThreadContext * > threadContexts
void serialize(CheckpointOut &cp) const override
Serialize this object to the given output stream.
virtual void activateContext(ThreadID thread_num)
Notify the CPU that the indicated context is now active.
void activateContext(ThreadID thread_id) override
Thread activation interface from BaseCPU.
void signalDrainDone() const
Signal that an object is drained.
Minor::Pipeline * pipeline
pipeline is a container for the clockable pipeline stage objects.
void regStats() override
Stats interface from SimObject (by way of BaseCPU)
void regStats(const std::string &name, BaseCPU &baseCpu)
void reset()
Clears the time buffer and the activity count.
void signalDrainDone()
Signal from Pipeline that MinorCPU should signal that a drain is complete and set its drainState.
const Params * params() const
Counter totalOps() const override
const std::string & name()
void unserializeThread(CheckpointIn &cp, ThreadID tid) override
Unserialize one thread.
Enums::MemoryMode getMemoryMode() const
Get the memory mode of the system.
@ Suspended
Temporarily inactive.
void schedulePowerGatingEvent()
virtual void takeOverFrom(BaseCPU *cpu)
Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be sw...
virtual void switchOut()
Prepare for another CPU to take over execution.
ThreadID numThreads
Number of threads we're actually simulating (<= SMT_MAX_THREADS).
Stats::Scalar quiesceCycles
Number of cycles in quiescent state.
std::ostream CheckpointOut
void activateStage(const int idx)
Marks a stage as active.
virtual void suspendContext(ThreadID thread_num)
Notify the CPU that the indicated context is now suspended.
Port & getDataPort() override
Return a reference to the data port.
void unserialize(CheckpointIn &cp) override
bool switchedOut() const
Determine if the CPU is switched out.
void serializeThread(CheckpointOut &cp, ThreadID tid) const override
Serialize a single thread.
void unserialize(CheckpointIn &cp) override
Reconstruct the state of this object from a checkpoint.
void serialize(CheckpointOut &cp) const override
Serialize pipeline data.
DrainState drain() override
Drain interface.
@ Draining
Draining buffers pending serialization/handover.
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