gem5  v20.1.0.0
cpu.cc
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37 
38 #include "cpu/minor/cpu.hh"
39 
40 #include "arch/utility.hh"
41 #include "cpu/minor/dyn_inst.hh"
42 #include "cpu/minor/fetch1.hh"
43 #include "cpu/minor/pipeline.hh"
44 #include "debug/Drain.hh"
45 #include "debug/MinorCPU.hh"
46 #include "debug/Quiesce.hh"
47 
48 MinorCPU::MinorCPU(MinorCPUParams *params) :
49  BaseCPU(params),
50  threadPolicy(params->threadPolicy)
51 {
52  /* This is only written for one thread at the moment */
53  Minor::MinorThread *thread;
54 
55  for (ThreadID i = 0; i < numThreads; i++) {
56  if (FullSystem) {
57  thread = new Minor::MinorThread(this, i, params->system,
58  params->itb, params->dtb, params->isa[i]);
60  } else {
61  thread = new Minor::MinorThread(this, i, params->system,
62  params->workload[i], params->itb, params->dtb,
63  params->isa[i]);
64  }
65 
66  threads.push_back(thread);
67  ThreadContext *tc = thread->getTC();
68  threadContexts.push_back(tc);
69  }
70 
71 
72  if (params->checker) {
73  fatal("The Minor model doesn't support checking (yet)\n");
74  }
75 
77 
78  pipeline = new Minor::Pipeline(*this, *params);
79  activityRecorder = pipeline->getActivityRecorder();
80 }
81 
83 {
84  delete pipeline;
85 
86  for (ThreadID thread_id = 0; thread_id < threads.size(); thread_id++) {
87  delete threads[thread_id];
88  }
89 }
90 
91 void
93 {
94  BaseCPU::init();
95 
96  if (!params()->switched_out &&
97  system->getMemoryMode() != Enums::timing)
98  {
99  fatal("The Minor CPU requires the memory system to be in "
100  "'timing' mode.\n");
101  }
102 
103  /* Initialise the ThreadContext's memory proxies */
104  for (ThreadID thread_id = 0; thread_id < threads.size(); thread_id++) {
105  ThreadContext *tc = getContext(thread_id);
106 
107  tc->initMemProxies(tc);
108  }
109 }
110 
112 void
114 {
116  stats.regStats(name(), *this);
117  pipeline->regStats();
118 }
119 
120 void
122 {
123  threads[thread_id]->serialize(cp);
124 }
125 
126 void
128 {
129  threads[thread_id]->unserialize(cp);
130 }
131 
132 void
134 {
135  pipeline->serialize(cp);
137 }
138 
139 void
141 {
142  pipeline->unserialize(cp);
144 }
145 
146 void
148 {
149  DPRINTF(Drain, "[tid:%d] MinorCPU wakeup\n", tid);
150  assert(tid < numThreads);
151 
152  if (threads[tid]->status() == ThreadContext::Suspended) {
153  threads[tid]->activate();
154  }
155 }
156 
157 void
159 {
160  DPRINTF(MinorCPU, "MinorCPU startup\n");
161 
163 
164  for (ThreadID tid = 0; tid < numThreads; tid++)
165  pipeline->wakeupFetch(tid);
166 }
167 
170 {
171  // Deschedule any power gating event (if any)
173 
174  if (switchedOut()) {
175  DPRINTF(Drain, "Minor CPU switched out, draining not needed.\n");
176  return DrainState::Drained;
177  }
178 
179  DPRINTF(Drain, "MinorCPU drain\n");
180 
181  /* Need to suspend all threads and wait for Execute to idle.
182  * Tell Fetch1 not to fetch */
183  if (pipeline->drain()) {
184  DPRINTF(Drain, "MinorCPU drained\n");
185  return DrainState::Drained;
186  } else {
187  DPRINTF(Drain, "MinorCPU not finished draining\n");
188  return DrainState::Draining;
189  }
190 }
191 
192 void
194 {
195  DPRINTF(Drain, "MinorCPU drain done\n");
197 }
198 
199 void
201 {
202  /* When taking over from another cpu make sure lastStopped
203  * is reset since it might have not been defined previously
204  * and might lead to a stats corruption */
205  pipeline->resetLastStopped();
206 
207  if (switchedOut()) {
208  DPRINTF(Drain, "drainResume while switched out. Ignoring\n");
209  return;
210  }
211 
212  DPRINTF(Drain, "MinorCPU drainResume\n");
213 
214  if (!system->isTimingMode()) {
215  fatal("The Minor CPU requires the memory system to be in "
216  "'timing' mode.\n");
217  }
218 
219  for (ThreadID tid = 0; tid < numThreads; tid++){
220  wakeup(tid);
221  }
222 
223  pipeline->drainResume();
224 
225  // Reschedule any power gating event (if any)
227 }
228 
229 void
231 {
232  DPRINTF(Drain, "MinorCPU memWriteback\n");
233 }
234 
235 void
237 {
238  DPRINTF(MinorCPU, "MinorCPU switchOut\n");
239 
240  assert(!switchedOut());
242 
243  /* Check that the CPU is drained? */
245 }
246 
247 void
249 {
250  DPRINTF(MinorCPU, "MinorCPU takeOverFrom\n");
251 
252  BaseCPU::takeOverFrom(old_cpu);
253 }
254 
255 void
257 {
258  DPRINTF(MinorCPU, "ActivateContext thread: %d\n", thread_id);
259 
260  /* Do some cycle accounting. lastStopped is reset to stop the
261  * wakeup call on the pipeline from adding the quiesce period
262  * to BaseCPU::numCycles */
263  stats.quiesceCycles += pipeline->cyclesSinceLastStopped();
264  pipeline->resetLastStopped();
265 
266  /* Wake up the thread, wakeup the pipeline tick */
267  threads[thread_id]->activate();
269  pipeline->wakeupFetch(thread_id);
270 
271  BaseCPU::activateContext(thread_id);
272 }
273 
274 void
276 {
277  DPRINTF(MinorCPU, "SuspendContext %d\n", thread_id);
278 
279  threads[thread_id]->suspend();
280 
281  BaseCPU::suspendContext(thread_id);
282 }
283 
284 void
285 MinorCPU::wakeupOnEvent(unsigned int stage_id)
286 {
287  DPRINTF(Quiesce, "Event wakeup from stage %d\n", stage_id);
288 
289  /* Mark that some activity has taken place and start the pipeline */
290  activityRecorder->activateStage(stage_id);
291  pipeline->start();
292 }
293 
294 MinorCPU *
295 MinorCPUParams::create()
296 {
297  return new MinorCPU(this);
298 }
299 
300 Port &
302 {
303  return pipeline->getInstPort();
304 }
305 
306 Port &
308 {
309  return pipeline->getDataPort();
310 }
311 
312 Counter
314 {
315  Counter ret = 0;
316 
317  for (auto i = threads.begin(); i != threads.end(); i ++)
318  ret += (*i)->numInst;
319 
320  return ret;
321 }
322 
323 Counter
325 {
326  Counter ret = 0;
327 
328  for (auto i = threads.begin(); i != threads.end(); i ++)
329  ret += (*i)->numOp;
330 
331  return ret;
332 }
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:183
dyn_inst.hh
ArmISA::status
Bitfield< 5, 0 > status
Definition: miscregs_types.hh:417
MinorCPU::wakeup
void wakeup(ThreadID tid) override
Definition: cpu.cc:147
BaseCPU::regStats
void regStats() override
Definition: base.cc:369
MinorCPU::totalInsts
Counter totalInsts() const override
Simple inst count interface from BaseCPU.
Definition: cpu.cc:313
MinorCPU::wakeupOnEvent
void wakeupOnEvent(unsigned int stage_id)
Interface for stages to signal that they have become active after a callback or eventq event where th...
Definition: cpu.cc:285
MinorCPU::getInstPort
Port & getInstPort() override
Return a reference to the instruction port.
Definition: cpu.cc:301
System::isTimingMode
bool isTimingMode() const
Is the system in timing mode?
Definition: system.hh:269
MinorCPU::init
void init() override
Starting, waking and initialisation.
Definition: cpu.cc:92
BaseCPU::init
void init() override
Definition: base.cc:267
ArmISA::i
Bitfield< 7 > i
Definition: miscregs_types.hh:63
ThreadID
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:227
MinorCPU::suspendContext
void suspendContext(ThreadID thread_id) override
Notify the CPU that the indicated context is now suspended.
Definition: cpu.cc:275
MinorCPU::activityRecorder
Minor::MinorActivityRecorder * activityRecorder
Activity recording for pipeline.
Definition: cpu.hh:88
cpu.hh
Minor::MinorThread
SimpleThread MinorThread
Minor will use the SimpleThread state for now.
Definition: cpu.hh:58
MinorCPU::stats
Minor::MinorStats stats
Processor-specific statistics.
Definition: cpu.hh:132
BaseCPU::deschedulePowerGatingEvent
void deschedulePowerGatingEvent()
Definition: base.cc:444
FullSystem
bool FullSystem
The FullSystem variable can be used to determine the current mode of simulation.
Definition: root.cc:132
BaseCPU::getContext
virtual ThreadContext * getContext(int tn)
Given a thread num get tho thread context for it.
Definition: base.hh:283
SimpleThread
The SimpleThread object provides a combination of the ThreadState object and the ThreadContext interf...
Definition: simple_thread.hh:89
MinorCPU::MinorCPU
MinorCPU(MinorCPUParams *params)
Definition: cpu.cc:48
MinorCPU::threads
std::vector< Minor::MinorThread * > threads
These are thread state-representing objects for this CPU.
Definition: cpu.hh:93
DrainState::Drained
@ Drained
Buffers drained, ready for serialization/handover.
DrainState
DrainState
Object drain/handover states.
Definition: drain.hh:71
Counter
int64_t Counter
Statistics counter type.
Definition: types.hh:58
MinorCPU::startup
void startup() override
Definition: cpu.cc:158
MinorCPU::~MinorCPU
~MinorCPU()
Definition: cpu.cc:82
MinorCPU::takeOverFrom
void takeOverFrom(BaseCPU *old_cpu) override
Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be sw...
Definition: cpu.cc:248
cp
Definition: cprintf.cc:40
ThreadContext::initMemProxies
virtual void initMemProxies(ThreadContext *tc)=0
Initialise the physical and virtual port proxies and tie them to the data port of the CPU.
ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:88
SimpleThread::setStatus
void setStatus(Status newStatus) override
Definition: simple_thread.hh:244
SimpleThread::getTC
ThreadContext * getTC()
Returns the pointer to this SimpleThread's ThreadContext.
Definition: simple_thread.hh:169
MinorCPU
MinorCPU is an in-order CPU model with four fixed pipeline stages:
Definition: cpu.hh:77
Minor::MinorDynInst::init
static void init()
Initialise the class.
Definition: dyn_inst.cc:79
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:234
ThreadContext::Halted
@ Halted
Permanently shut down.
Definition: thread_context.hh:115
MinorCPU::switchOut
void switchOut() override
Switching interface from BaseCPU.
Definition: cpu.cc:236
MinorCPU::memWriteback
void memWriteback() override
Definition: cpu.cc:230
Port
Ports are used to interface objects to each other.
Definition: port.hh:56
Minor::Pipeline
The constructed pipeline.
Definition: pipeline.hh:69
pipeline.hh
MinorCPU::drainResume
void drainResume() override
Definition: cpu.cc:200
BaseCPU::threadContexts
std::vector< ThreadContext * > threadContexts
Definition: base.hh:252
BaseCPU::serialize
void serialize(CheckpointOut &cp) const override
Serialize this object to the given output stream.
Definition: base.cc:651
BaseCPU::activateContext
virtual void activateContext(ThreadID thread_num)
Notify the CPU that the indicated context is now active.
Definition: base.cc:480
MinorCPU::activateContext
void activateContext(ThreadID thread_id) override
Thread activation interface from BaseCPU.
Definition: cpu.cc:256
Drainable::signalDrainDone
void signalDrainDone() const
Signal that an object is drained.
Definition: drain.hh:301
Minor::Pipeline::CPUStageId
@ CPUStageId
Definition: pipeline.hh:98
MinorCPU::pipeline
Minor::Pipeline * pipeline
pipeline is a container for the clockable pipeline stage objects.
Definition: cpu.hh:82
MinorCPU::regStats
void regStats() override
Stats interface from SimObject (by way of BaseCPU)
Definition: cpu.cc:113
Minor::MinorStats::regStats
void regStats(const std::string &name, BaseCPU &baseCpu)
Definition: stats.cc:47
ActivityRecorder::reset
void reset()
Clears the time buffer and the activity count.
Definition: activity.cc:124
MinorCPU::signalDrainDone
void signalDrainDone()
Signal from Pipeline that MinorCPU should signal that a drain is complete and set its drainState.
Definition: cpu.cc:193
BaseCPU::params
const Params * params() const
Definition: base.hh:296
MinorCPU::totalOps
Counter totalOps() const override
Definition: cpu.cc:324
name
const std::string & name()
Definition: trace.cc:50
MinorCPU::unserializeThread
void unserializeThread(CheckpointIn &cp, ThreadID tid) override
Unserialize one thread.
Definition: cpu.cc:127
BaseCPU
Definition: cpu_dummy.hh:43
System::getMemoryMode
Enums::MemoryMode getMemoryMode() const
Get the memory mode of the system.
Definition: system.hh:292
ThreadContext::Suspended
@ Suspended
Temporarily inactive.
Definition: thread_context.hh:106
BaseCPU::schedulePowerGatingEvent
void schedulePowerGatingEvent()
Definition: base.cc:452
BaseCPU::system
System * system
Definition: base.hh:371
BaseCPU::takeOverFrom
virtual void takeOverFrom(BaseCPU *cpu)
Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be sw...
Definition: base.cc:546
BaseCPU::switchOut
virtual void switchOut()
Prepare for another CPU to take over execution.
Definition: base.cc:532
BaseCPU::numThreads
ThreadID numThreads
Number of threads we're actually simulating (<= SMT_MAX_THREADS).
Definition: base.hh:363
Minor::MinorStats::quiesceCycles
Stats::Scalar quiesceCycles
Number of cycles in quiescent state.
Definition: stats.hh:71
CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:63
BaseCPU::startup
void startup() override
Definition: base.cc:310
ActivityRecorder::activateStage
void activateStage(const int idx)
Marks a stage as active.
Definition: activity.cc:90
BaseCPU::suspendContext
virtual void suspendContext(ThreadID thread_num)
Notify the CPU that the indicated context is now suspended.
Definition: base.cc:494
MinorCPU::getDataPort
Port & getDataPort() override
Return a reference to the data port.
Definition: cpu.cc:307
pipeline
Definition: pipeline.h:43
MinorCPU::unserialize
void unserialize(CheckpointIn &cp) override
Definition: cpu.cc:140
BaseCPU::switchedOut
bool switchedOut() const
Determine if the CPU is switched out.
Definition: base.hh:352
CheckpointIn
Definition: serialize.hh:67
MinorCPU::serializeThread
void serializeThread(CheckpointOut &cp, ThreadID tid) const override
Serialize a single thread.
Definition: cpu.cc:121
BaseCPU::unserialize
void unserialize(CheckpointIn &cp) override
Reconstruct the state of this object from a checkpoint.
Definition: base.cc:672
MinorCPU::serialize
void serialize(CheckpointOut &cp) const override
Serialize pipeline data.
Definition: cpu.cc:133
MinorCPU::drain
DrainState drain() override
Drain interface.
Definition: cpu.cc:169
fetch1.hh
DrainState::Draining
@ Draining
Draining buffers pending serialization/handover.

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