Base class for conditional, register-based branches. More...
#include <branch.hh>
Inheritance diagram for PowerISA::BranchRegCond:
Protected Member Functions | |
| BranchRegCond (const char *mnem, MachInst _machInst, OpClass __opClass) | |
| Constructor. More... | |
| PowerISA::PCState | branchTarget (ThreadContext *tc) const override |
| Return the target address for an indirect branch (jump). More... | |
| std::string | generateDisassembly (Addr pc, const Loader::SymbolTable *symtab) const override |
| Internal function to generate disassembly string. More... | |
| virtual TheISA::PCState | branchTarget (const TheISA::PCState &pc) const |
| Explicitly import the otherwise hidden branchTarget. More... | |
| virtual TheISA::PCState | branchTarget (ThreadContext *tc) const |
| Explicitly import the otherwise hidden branchTarget. More... | |
 Protected Member Functions inherited from PowerISA::BranchCond | |
| BranchCond (const char *mnem, MachInst _machInst, OpClass __opClass) | |
| Constructor. More... | |
| bool | ctrOk (uint32_t &ctr) const |
| bool | condOk (uint32_t cr) const |
| Protected Member Functions inherited from PowerISA::PCDependentDisassembly | |
| PCDependentDisassembly (const char *mnem, ExtMachInst _machInst, OpClass __opClass) | |
| Constructor. More... | |
| const std::string & | disassemble (Addr pc, const Loader::SymbolTable *symtab) const |
| Return string representation of disassembled instruction. More... | |
| Protected Member Functions inherited from PowerISA::PowerStaticInst | |
| PowerStaticInst (const char *mnem, MachInst _machInst, OpClass __opClass) | |
| uint32_t | insertCRField (uint32_t cr, uint32_t bf, uint32_t value) const |
| void | printReg (std::ostream &os, RegId reg) const |
| Print a register name for disassembly given the unique dependence tag number (FP or int). More... | |
| std::string | generateDisassembly (Addr pc, const Loader::SymbolTable *symtab) const override |
| Internal function to generate disassembly string. More... | |
| void | advancePC (PowerISA::PCState &pcState) const override |
| size_t | asBytes (void *buf, size_t max_size) override |
| Instruction classes can override this function to return a a representation of themselves as a blob of bytes, generally assumed to be that instructions ExtMachInst. More... | |
| Protected Member Functions inherited from StaticInst | |
| StaticInst (const char *_mnemonic, ExtMachInst _machInst, OpClass __opClass) | |
| Constructor. More... | |
| template<typename T > | |
| size_t | simpleAsBytes (void *buf, size_t max_size, const T &t) |
Additional Inherited Members | |
| Public Types inherited from StaticInst | |
| enum | { MaxInstSrcRegs = TheISA::MaxInstSrcRegs, MaxInstDestRegs = TheISA::MaxInstDestRegs } |
| typedef TheISA::ExtMachInst | ExtMachInst |
| Binary extended machine instruction type. More... | |
| Public Member Functions inherited from StaticInst | |
| int8_t | numSrcRegs () const |
| Number of source registers. More... | |
| int8_t | numDestRegs () const |
| Number of destination registers. More... | |
| int8_t | numFPDestRegs () const |
| Number of floating-point destination regs. More... | |
| int8_t | numIntDestRegs () const |
| Number of integer destination regs. More... | |
| int8_t | numVecDestRegs () const |
| Number of vector destination regs. More... | |
| int8_t | numVecElemDestRegs () const |
| Number of vector element destination regs. More... | |
| int8_t | numVecPredDestRegs () const |
| Number of predicate destination regs. More... | |
| int8_t | numCCDestRegs () const |
| Number of coprocesor destination regs. More... | |
| bool | isNop () const |
| bool | isMemRef () const |
| bool | isLoad () const |
| bool | isStore () const |
| bool | isAtomic () const |
| bool | isStoreConditional () const |
| bool | isInstPrefetch () const |
| bool | isDataPrefetch () const |
| bool | isPrefetch () const |
| bool | isInteger () const |
| bool | isFloating () const |
| bool | isVector () const |
| bool | isCC () const |
| bool | isControl () const |
| bool | isCall () const |
| bool | isReturn () const |
| bool | isDirectCtrl () const |
| bool | isIndirectCtrl () const |
| bool | isCondCtrl () const |
| bool | isUncondCtrl () const |
| bool | isCondDelaySlot () const |
| bool | isThreadSync () const |
| bool | isSerializing () const |
| bool | isSerializeBefore () const |
| bool | isSerializeAfter () const |
| bool | isSquashAfter () const |
| bool | isMemBarrier () const |
| bool | isWriteBarrier () const |
| bool | isNonSpeculative () const |
| bool | isQuiesce () const |
| bool | isIprAccess () const |
| bool | isUnverifiable () const |
| bool | isSyscall () const |
| bool | isMacroop () const |
| bool | isMicroop () const |
| bool | isDelayedCommit () const |
| bool | isLastMicroop () const |
| bool | isFirstMicroop () const |
| bool | isMicroBranch () const |
| bool | isHtmStart () const |
| bool | isHtmStop () const |
| bool | isHtmCancel () const |
| bool | isHtmCmd () const |
| void | setFirstMicroop () |
| void | setLastMicroop () |
| void | setDelayedCommit () |
| void | setFlag (Flags f) |
| OpClass | opClass () const |
| Operation class. Used to select appropriate function unit in issue. More... | |
| const RegId & | destRegIdx (int i) const |
| Return logical index (architectural reg num) of i'th destination reg. More... | |
| const RegId & | srcRegIdx (int i) const |
| Return logical index (architectural reg num) of i'th source reg. More... | |
| virtual | ~StaticInst () |
| virtual Fault | execute (ExecContext *xc, Trace::InstRecord *traceData) const =0 |
| virtual Fault | initiateAcc (ExecContext *xc, Trace::InstRecord *traceData) const |
| virtual Fault | completeAcc (Packet *pkt, ExecContext *xc, Trace::InstRecord *traceData) const |
| virtual void | advancePC (TheISA::PCState &pcState) const =0 |
| virtual StaticInstPtr | fetchMicroop (MicroPC upc) const |
| Return the microop that goes with a particular micropc. More... | |
| virtual TheISA::PCState | branchTarget (const TheISA::PCState &pc) const |
| Return the target address for a PC-relative branch. More... | |
| bool | hasBranchTarget (const TheISA::PCState &pc, ThreadContext *tc, TheISA::PCState &tgt) const |
| Return true if the instruction is a control transfer, and if so, return the target address as well. More... | |
| void | printFlags (std::ostream &outs, const std::string &separator) const |
| Print a separator separated list of this instruction's set flag names on the given stream. More... | |
| std::string | getName () |
| Return name of machine instruction. More... | |
| Public Member Functions inherited from RefCounted | |
| RefCounted () | |
| We initialize the reference count to zero and the first object to take ownership of it must increment it to one. More... | |
| virtual | ~RefCounted () |
| We make the destructor virtual because we're likely to have virtual functions on reference counted objects. More... | |
| void | incref () const |
| Increment the reference count. More... | |
| void | decref () const |
| Decrement the reference count and destroy the object if all references are gone. More... | |
| Public Attributes inherited from StaticInst | |
| const ExtMachInst | machInst |
| The binary machine instruction. More... | |
| Static Public Attributes inherited from StaticInst | |
| static StaticInstPtr | nullStaticInstPtr |
| Pointer to a statically allocated "null" instruction object. More... | |
| static StaticInstPtr | nopStaticInstPtr = new NopStaticInst |
| Pointer to a statically allocated generic "nop" instruction object. More... | |
| Protected Attributes inherited from PowerISA::BranchCond | |
| uint32_t | bo |
| Fields needed for conditions. More... | |
| uint32_t | bi |
| Protected Attributes inherited from PowerISA::PCDependentDisassembly | |
| Addr | cachedPC |
| Cached program counter from last disassembly. More... | |
| const Loader::SymbolTable * | cachedSymtab |
| Cached symbol table pointer from last disassembly. More... | |
| Protected Attributes inherited from StaticInst | |
| std::bitset< Num_Flags > | flags |
| Flag values for this instruction. More... | |
| OpClass | _opClass |
| See opClass(). More... | |
| int8_t | _numSrcRegs |
| See numSrcRegs(). More... | |
| int8_t | _numDestRegs |
| See numDestRegs(). More... | |
| int8_t | _numFPDestRegs |
| The following are used to track physical register usage for machines with separate int & FP reg files. More... | |
| int8_t | _numIntDestRegs |
| int8_t | _numCCDestRegs |
| int8_t | _numVecDestRegs |
| To use in architectures with vector register file. More... | |
| int8_t | _numVecElemDestRegs |
| int8_t | _numVecPredDestRegs |
| RegId | _destRegIdx [MaxInstDestRegs] |
| See destRegIdx(). More... | |
| RegId | _srcRegIdx [MaxInstSrcRegs] |
| See srcRegIdx(). More... | |
| const char * | mnemonic |
| Base mnemonic (e.g., "add"). More... | |
| std::string * | cachedDisassembly |
| String representation of disassembly (lazily evaluated via disassemble()). More... | |
Detailed Description
Constructor & Destructor Documentation
◆ BranchRegCond()
|
inlineprotected |
Member Function Documentation
◆ branchTarget() [1/3]
|
protected |
Explicitly import the otherwise hidden branchTarget.
Definition at line 105 of file static_inst.cc.
◆ branchTarget() [2/3]
|
protected |
Explicitly import the otherwise hidden branchTarget.
Definition at line 113 of file static_inst.cc.
◆ branchTarget() [3/3]
|
overrideprotectedvirtual |
Return the target address for an indirect branch (jump).
The register value is read from the supplied thread context, so the result is valid only if the thread context is about to execute the branch in question. Invalid if not an indirect branch (i.e. isIndirectCtrl() should be true).
Reimplemented from StaticInst.
Definition at line 156 of file branch.cc.
References StaticInst::_numSrcRegs, StaticInst::_srcRegIdx, MipsISA::index, and ThreadContext::readIntReg().
◆ generateDisassembly()
|
overrideprotectedvirtual |
Internal function to generate disassembly string.
Implements StaticInst.
Definition at line 163 of file branch.cc.
References PowerISA::BranchCond::bi, PowerISA::BranchCond::bo, ccprintf(), StaticInst::mnemonic, and ArmISA::ss.
The documentation for this class was generated from the following files: