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58 return (uint32_t)(
pc.pc() +
disp);
72 if (symtab && (it = symtab->
find(target)) != symtab->
end())
106 return (uint32_t)(
pc.pc() +
disp);
113 std::stringstream
ss;
117 ss <<
bo <<
", " <<
bi <<
", ";
122 if (symtab && (it = symtab->
find(target)) != symtab->
end())
140 std::stringstream
ss;
144 ss <<
bo <<
", " <<
bi <<
", ";
159 return regVal & 0xfffffffc;
166 std::stringstream
ss;
170 ss <<
bo <<
", " <<
bi <<
", ";
PowerISA::PCState branchTarget(ThreadContext *tc) const override
Return the target address for an indirect branch (jump).
PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const override
const Loader::SymbolTable * cachedSymtab
Cached symbol table pointer from last disassembly.
uint32_t disp
Displacement.
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
uint32_t disp
Displacement.
PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const override
const_iterator find(Addr address) const
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
std::string * cachedDisassembly
String representation of disassembly (lazily evaluated via disassemble()).
ThreadContext is the external interface to all thread state for anything outside of the CPU.
RegId _srcRegIdx[MaxInstSrcRegs]
See srcRegIdx().
PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const override
const char * mnemonic
Base mnemonic (e.g., "add").
uint32_t bo
Fields needed for conditions.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Addr cachedPC
Cached program counter from last disassembly.
const_iterator end() const
SymbolVector::const_iterator const_iterator
GenericISA::DelaySlotPCState< MachInst > PCState
uint32_t targetAddr
Target address.
void ccprintf(cp::Print &print)
int8_t _numSrcRegs
See numSrcRegs().
const std::string & disassemble(Addr pc, const Loader::SymbolTable *symtab) const
Return string representation of disassembled instruction.
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
virtual RegVal readIntReg(RegIndex reg_idx) const =0
PowerISA::PCState branchTarget(const PowerISA::PCState &pc) const override
std::string generateDisassembly(Addr pc, const Loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
uint32_t targetAddr
Target address.
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