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30 #ifndef __CPU_O3_CPU_POLICY_HH__
31 #define __CPU_O3_CPU_POLICY_HH__
66 typedef ::ROB<Impl>
ROB;
72 typedef ::LSQ<Impl>
LSQ;
107 #endif //__CPU_O3_CPU_POLICY_HH__
Unified register rename map for all classes of registers.
DefaultDecodeDefaultRename< Impl > DecodeStruct
The struct for communication between decode and rename.
Struct that defines the key classes to be used by the CPU.
Struct that defines the information passed from decode to rename.
::ROB< Impl > ROB
Typedef for the ROB.
::IssueStruct< Impl > IssueStruct
The struct for communication within the IEW stage.
DefaultIEW< Impl > IEW
Typedef for Issue/Execute/Writeback.
DefaultFetchDefaultDecode< Impl > FetchStruct
The struct for communication between fetch and decode.
DefaultIEWDefaultCommit< Impl > IEWStruct
The struct for communication between IEW and commit.
TimeBufStruct< Impl > TimeStruct
The struct for all backwards communication.
::MemDepUnit< StoreSet, Impl > MemDepUnit
Typedef for the memory dependence unit.
InstructionQueue< Impl > IQ
Typedef for the instruction queue/scheduler.
DefaultFetch< Impl > Fetch
Typedef for fetch.
UnifiedFreeList FreeList
Typedef for the freelist of registers.
Struct that defines the information passed from rename to IEW.
DefaultCommit handles single threaded and SMT commit.
UnifiedRenameMap RenameMap
Typedef for the rename map.
FreeList class that simply holds the list of free integer and floating point registers.
DefaultFetch class handles both single threaded and SMT fetch.
Struct that defines all backwards communication.
::LSQ< Impl > LSQ
Typedef for the LSQ.
DefaultRenameDefaultIEW< Impl > RenameStruct
The struct for communication between rename and IEW.
DefaultCommit< Impl > Commit
Typedef for commit.
Struct that defines the information passed from IEW to commit.
DefaultRename< Impl > Rename
Typedef for rename.
DefaultDecode class handles both single threaded and SMT decode.
A standard instruction queue class.
::LSQUnit< Impl > LSQUnit
Typedef for the thread-specific LSQ units.
DefaultDecode< Impl > Decode
Typedef for decode.
DefaultRename handles both single threaded and SMT rename.
DefaultIEW handles both single threaded and SMT IEW (issue/execute/writeback).
Struct that defines the information passed from fetch to decode.
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