gem5
v20.1.0.0
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#include "cpu/kvm/x86_cpu.hh"
#include <linux/kvm.h>
#include <algorithm>
#include <cerrno>
#include <memory>
#include "arch/registers.hh"
#include "arch/x86/cpuid.hh"
#include "arch/x86/faults.hh"
#include "arch/x86/interrupts.hh"
#include "arch/x86/regs/msr.hh"
#include "arch/x86/utility.hh"
#include "cpu/kvm/base.hh"
#include "debug/Drain.hh"
#include "debug/Kvm.hh"
#include "debug/KvmContext.hh"
#include "debug/KvmIO.hh"
#include "debug/KvmInt.hh"
Go to the source code of this file.
Classes | |
struct | FXSave |
Macros | |
#define | MSR_TSC 0x10 |
#define | IO_PCI_CONF_ADDR 0xCF8 |
#define | IO_PCI_CONF_DATA_BASE 0xCFC |
#define | SEG_SYS_TYPE_TSS_AVAILABLE 9 |
#define | SEG_SYS_TYPE_TSS_BUSY 11 |
#define | SEG_CS_TYPE_ACCESSED 9 |
#define | SEG_CS_TYPE_READ_ACCESSED 11 |
#define | SEG_TYPE_BIT_ACCESSED 1 |
#define | FOREACH_IREG() |
#define | FOREACH_SREG() |
#define | FOREACH_DREG() |
#define | FOREACH_SEGMENT() |
#define | FOREACH_DTABLE() |
#define | APPLY_IREG(kreg, mreg) inform("\t" # kreg ": 0x%llx\n", regs.kreg) |
#define | APPLY_SREG(kreg, mreg) inform("\t" # kreg ": 0x%llx\n", sregs.kreg); |
#define | APPLY_SEGMENT(kreg, idx) dumpKvm(# kreg, sregs.kreg); |
#define | APPLY_DTABLE(kreg, idx) dumpKvm(# kreg, sregs.kreg); |
#define | APPLY_IREG(kreg, mreg) regs.kreg = tc->readIntReg(mreg) |
#define | APPLY_SREG(kreg, mreg) sregs.kreg = tc->readMiscRegNoEffect(mreg) |
#define | APPLY_SEGMENT(kreg, idx) setKvmSegmentReg(tc, sregs.kreg, idx) |
#define | APPLY_DTABLE(kreg, idx) setKvmDTableReg(tc, sregs.kreg, idx) |
#define | APPLY_SEGMENT(kreg, idx) checkSeg(# kreg, idx + MISCREG_SEG_SEL_BASE, sregs.kreg, sregs) |
#define | APPLY_IREG(kreg, mreg) tc->setIntReg(mreg, regs.kreg) |
#define | APPLY_SREG(kreg, mreg) tc->setMiscRegNoEffect(mreg, sregs.kreg) |
#define | APPLY_SEGMENT(kreg, idx) setContextSegment(tc, sregs.kreg, idx) |
#define | APPLY_DTABLE(kreg, idx) setContextSegment(tc, sregs.kreg, idx) |
Functions | |
template<typename STRUCT , typename ENTRY > | |
static STRUCT * | newVarStruct (size_t entries) |
static void | dumpKvm (const struct kvm_regs ®s) |
static void | dumpKvm (const char *reg_name, const struct kvm_segment &seg) |
static void | dumpKvm (const char *reg_name, const struct kvm_dtable &dtable) |
static void | dumpKvm (const struct kvm_sregs &sregs) |
static void | dumpFpuSpec (const struct FXSave &xs) |
static void | dumpFpuSpec (const struct kvm_fpu &fpu) |
template<typename T > | |
static void | dumpFpuCommon (const T &fpu) |
static void | dumpKvm (const struct kvm_fpu &fpu) |
static void | dumpKvm (const struct kvm_xsave &xsave) |
static void | dumpKvm (const struct kvm_msrs &msrs) |
static void | dumpKvm (const struct kvm_xcrs ®s) |
static void | dumpKvm (const struct kvm_vcpu_events &events) |
static bool | isCanonicalAddress (uint64_t addr) |
static void | checkSeg (const char *name, const int idx, const struct kvm_segment &seg, struct kvm_sregs sregs) |
static void | setKvmSegmentReg (ThreadContext *tc, struct kvm_segment &kvm_seg, const int index) |
static void | setKvmDTableReg (ThreadContext *tc, struct kvm_dtable &kvm_dtable, const int index) |
static void | forceSegAccessed (struct kvm_segment &seg) |
template<typename T > | |
static void | updateKvmStateFPUCommon (ThreadContext *tc, T &fpu) |
void | setContextSegment (ThreadContext *tc, const struct kvm_segment &kvm_seg, const int index) |
void | setContextSegment (ThreadContext *tc, const struct kvm_dtable &kvm_dtable, const int index) |
template<typename T > | |
static void | updateThreadContextFPUCommon (ThreadContext *tc, const T &fpu) |
static struct kvm_cpuid_entry2 | makeKvmCpuid (uint32_t function, uint32_t index, CpuidResult &result) |
Variables | |
struct FXSave | M5_ATTR_PACKED |
#define APPLY_DTABLE | ( | kreg, | |
idx | |||
) | dumpKvm(# kreg, sregs.kreg); |
#define APPLY_DTABLE | ( | kreg, | |
idx | |||
) | setKvmDTableReg(tc, sregs.kreg, idx) |
#define APPLY_DTABLE | ( | kreg, | |
idx | |||
) | setContextSegment(tc, sregs.kreg, idx) |
#define APPLY_IREG | ( | kreg, | |
mreg | |||
) | inform("\t" # kreg ": 0x%llx\n", regs.kreg) |
#define APPLY_IREG | ( | kreg, | |
mreg | |||
) | regs.kreg = tc->readIntReg(mreg) |
#define APPLY_IREG | ( | kreg, | |
mreg | |||
) | tc->setIntReg(mreg, regs.kreg) |
#define APPLY_SEGMENT | ( | kreg, | |
idx | |||
) | dumpKvm(# kreg, sregs.kreg); |
#define APPLY_SEGMENT | ( | kreg, | |
idx | |||
) | setKvmSegmentReg(tc, sregs.kreg, idx) |
#define APPLY_SEGMENT | ( | kreg, | |
idx | |||
) | checkSeg(# kreg, idx + MISCREG_SEG_SEL_BASE, sregs.kreg, sregs) |
#define APPLY_SEGMENT | ( | kreg, | |
idx | |||
) | setContextSegment(tc, sregs.kreg, idx) |
#define APPLY_SREG | ( | kreg, | |
mreg | |||
) | inform("\t" # kreg ": 0x%llx\n", sregs.kreg); |
#define APPLY_SREG | ( | kreg, | |
mreg | |||
) | sregs.kreg = tc->readMiscRegNoEffect(mreg) |
#define APPLY_SREG | ( | kreg, | |
mreg | |||
) | tc->setMiscRegNoEffect(mreg, sregs.kreg) |
#define FOREACH_DREG | ( | ) |
Definition at line 135 of file x86_cpu.cc.
#define FOREACH_DTABLE | ( | ) |
Definition at line 157 of file x86_cpu.cc.
#define FOREACH_IREG | ( | ) |
Definition at line 104 of file x86_cpu.cc.
#define FOREACH_SEGMENT | ( | ) |
Definition at line 145 of file x86_cpu.cc.
#define FOREACH_SREG | ( | ) |
Definition at line 124 of file x86_cpu.cc.
#define IO_PCI_CONF_ADDR 0xCF8 |
Definition at line 54 of file x86_cpu.cc.
#define IO_PCI_CONF_DATA_BASE 0xCFC |
Definition at line 55 of file x86_cpu.cc.
#define MSR_TSC 0x10 |
Definition at line 52 of file x86_cpu.cc.
#define SEG_CS_TYPE_ACCESSED 9 |
Definition at line 63 of file x86_cpu.cc.
#define SEG_CS_TYPE_READ_ACCESSED 11 |
Definition at line 65 of file x86_cpu.cc.
#define SEG_SYS_TYPE_TSS_AVAILABLE 9 |
Definition at line 58 of file x86_cpu.cc.
#define SEG_SYS_TYPE_TSS_BUSY 11 |
Definition at line 60 of file x86_cpu.cc.
#define SEG_TYPE_BIT_ACCESSED 1 |
Definition at line 69 of file x86_cpu.cc.
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Definition at line 381 of file x86_cpu.cc.
References isCanonicalAddress(), M5_FALLTHROUGH, X86ISA::MISCREG_CS, X86ISA::MISCREG_DS, X86ISA::MISCREG_ES, X86ISA::MISCREG_FS, X86ISA::MISCREG_GS, X86ISA::MISCREG_SS, X86ISA::MISCREG_TR, X86ISA::MISCREG_TSL, name(), X86ISA::seg, and warn.
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Definition at line 260 of file x86_cpu.cc.
References X86ISA::BusyBit, X86ISA::CC0Bit, X86ISA::CC1Bit, X86ISA::CC2Bit, X86ISA::CC3Bit, X86ISA::DEBit, dumpFpuSpec(), X86ISA::ErrSummaryBit, ArmISA::i, X86ISA::IEBit, inform, ArmISA::j, X86ISA::loadFloat80(), X86ISA::OEBit, X86ISA::PEBit, X86ISA::StackFaultBit, X86ISA::UEBit, and X86ISA::ZEBit.
Referenced by dumpKvm().
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Definition at line 244 of file x86_cpu.cc.
References inform, and RiscvISA::xs.
Referenced by dumpFpuCommon().
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Definition at line 252 of file x86_cpu.cc.
References inform.
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Definition at line 196 of file x86_cpu.cc.
References inform.
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Definition at line 186 of file x86_cpu.cc.
References inform, and X86ISA::seg.
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Definition at line 310 of file x86_cpu.cc.
References dumpFpuCommon(), and inform.
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Definition at line 324 of file x86_cpu.cc.
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Definition at line 170 of file x86_cpu.cc.
References FOREACH_IREG, and inform.
Referenced by X86KvmCPU::dumpDebugRegs(), X86KvmCPU::dumpFpuRegs(), X86KvmCPU::dumpIntRegs(), X86KvmCPU::dumpMSRs(), X86KvmCPU::dumpSpecRegs(), X86KvmCPU::dumpVCpuEvents(), X86KvmCPU::dumpXCRs(), and X86KvmCPU::dumpXSave().
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Definition at line 203 of file x86_cpu.cc.
References FOREACH_DTABLE, FOREACH_SEGMENT, FOREACH_SREG, ArmISA::i, and inform.
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Definition at line 349 of file x86_cpu.cc.
References inform.
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Definition at line 336 of file x86_cpu.cc.
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Definition at line 317 of file x86_cpu.cc.
References dumpFpuCommon(), and inform.
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Definition at line 743 of file x86_cpu.cc.
References X86ISA::seg, and SEG_TYPE_BIT_ACCESSED.
Referenced by X86KvmCPU::updateKvmStateSRegs().
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Definition at line 1408 of file x86_cpu.cc.
References ArmISA::e, and MipsISA::index.
Referenced by X86KvmCPU::updateCPUID().
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Definition at line 164 of file x86_cpu.cc.
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Definition at line 1015 of file x86_cpu.cc.
References MipsISA::index, X86ISA::MISCREG_SEG_BASE(), X86ISA::MISCREG_SEG_LIMIT(), and ThreadContext::setMiscReg().
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Definition at line 990 of file x86_cpu.cc.
References ArmISA::attr, MipsISA::index, X86ISA::MISCREG_SEG_ATTR(), X86ISA::MISCREG_SEG_BASE(), X86ISA::MISCREG_SEG_LIMIT(), X86ISA::MISCREG_SEG_SEL(), and ThreadContext::setMiscReg().
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inlinestatic |
Definition at line 735 of file x86_cpu.cc.
References MipsISA::index, X86ISA::MISCREG_SEG_BASE(), X86ISA::MISCREG_SEG_LIMIT(), and ThreadContext::readMiscRegNoEffect().
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inlinestatic |
Definition at line 710 of file x86_cpu.cc.
References ArmISA::attr, MipsISA::index, X86ISA::MISCREG_SEG_ATTR(), X86ISA::MISCREG_SEG_BASE(), X86ISA::MISCREG_SEG_LIMIT(), X86ISA::MISCREG_SEG_SEL(), and ThreadContext::readMiscRegNoEffect().
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Definition at line 824 of file x86_cpu.cc.
References bitsToFloat64(), X86ISA::convX87TagsToXTags(), DPRINTF, X86ISA::FLOATREG_FPR(), X86ISA::FLOATREG_XMM_HIGH(), X86ISA::FLOATREG_XMM_LOW(), ArmISA::i, X86ISA::MISCREG_FCW, X86ISA::MISCREG_FOP, X86ISA::MISCREG_FSW, X86ISA::MISCREG_FTW, X86ISA::MISCREG_MXCSR, ThreadContext::readFloatReg(), ThreadContext::readMiscReg(), ThreadContext::readMiscRegNoEffect(), and X86ISA::storeFloat80().
Referenced by X86KvmCPU::updateKvmStateFPULegacy(), and X86KvmCPU::updateKvmStateFPUXSave().
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Definition at line 1044 of file x86_cpu.cc.
References X86ISA::convX87XTagsToTags(), DPRINTF, X86ISA::FLOATREG_FPR(), X86ISA::FLOATREG_XMM_HIGH(), X86ISA::FLOATREG_XMM_LOW(), floatToBits64(), ArmISA::i, X86ISA::loadFloat80(), X86ISA::MISCREG_FCW, X86ISA::MISCREG_FOP, X86ISA::MISCREG_FSW, X86ISA::MISCREG_FTAG, X86ISA::MISCREG_FTW, X86ISA::MISCREG_MXCSR, X86ISA::MISCREG_X87_TOP, ThreadContext::setFloatReg(), and ThreadContext::setMiscRegNoEffect().
Referenced by X86KvmCPU::updateThreadContextFPU(), and X86KvmCPU::updateThreadContextXSave().
struct FXSave M5_ATTR_PACKED |