gem5  v20.1.0.0
Classes | Macros | Functions | Variables
x86_cpu.cc File Reference
#include "cpu/kvm/x86_cpu.hh"
#include <linux/kvm.h>
#include <algorithm>
#include <cerrno>
#include <memory>
#include "arch/registers.hh"
#include "arch/x86/cpuid.hh"
#include "arch/x86/faults.hh"
#include "arch/x86/interrupts.hh"
#include "arch/x86/regs/msr.hh"
#include "arch/x86/utility.hh"
#include "cpu/kvm/base.hh"
#include "debug/Drain.hh"
#include "debug/Kvm.hh"
#include "debug/KvmContext.hh"
#include "debug/KvmIO.hh"
#include "debug/KvmInt.hh"

Go to the source code of this file.

Classes

struct  FXSave
 

Macros

#define MSR_TSC   0x10
 
#define IO_PCI_CONF_ADDR   0xCF8
 
#define IO_PCI_CONF_DATA_BASE   0xCFC
 
#define SEG_SYS_TYPE_TSS_AVAILABLE   9
 
#define SEG_SYS_TYPE_TSS_BUSY   11
 
#define SEG_CS_TYPE_ACCESSED   9
 
#define SEG_CS_TYPE_READ_ACCESSED   11
 
#define SEG_TYPE_BIT_ACCESSED   1
 
#define FOREACH_IREG()
 
#define FOREACH_SREG()
 
#define FOREACH_DREG()
 
#define FOREACH_SEGMENT()
 
#define FOREACH_DTABLE()
 
#define APPLY_IREG(kreg, mreg)   inform("\t" # kreg ": 0x%llx\n", regs.kreg)
 
#define APPLY_SREG(kreg, mreg)   inform("\t" # kreg ": 0x%llx\n", sregs.kreg);
 
#define APPLY_SEGMENT(kreg, idx)   dumpKvm(# kreg, sregs.kreg);
 
#define APPLY_DTABLE(kreg, idx)   dumpKvm(# kreg, sregs.kreg);
 
#define APPLY_IREG(kreg, mreg)   regs.kreg = tc->readIntReg(mreg)
 
#define APPLY_SREG(kreg, mreg)   sregs.kreg = tc->readMiscRegNoEffect(mreg)
 
#define APPLY_SEGMENT(kreg, idx)   setKvmSegmentReg(tc, sregs.kreg, idx)
 
#define APPLY_DTABLE(kreg, idx)   setKvmDTableReg(tc, sregs.kreg, idx)
 
#define APPLY_SEGMENT(kreg, idx)   checkSeg(# kreg, idx + MISCREG_SEG_SEL_BASE, sregs.kreg, sregs)
 
#define APPLY_IREG(kreg, mreg)   tc->setIntReg(mreg, regs.kreg)
 
#define APPLY_SREG(kreg, mreg)   tc->setMiscRegNoEffect(mreg, sregs.kreg)
 
#define APPLY_SEGMENT(kreg, idx)   setContextSegment(tc, sregs.kreg, idx)
 
#define APPLY_DTABLE(kreg, idx)   setContextSegment(tc, sregs.kreg, idx)
 

Functions

template<typename STRUCT , typename ENTRY >
static STRUCT * newVarStruct (size_t entries)
 
static void dumpKvm (const struct kvm_regs &regs)
 
static void dumpKvm (const char *reg_name, const struct kvm_segment &seg)
 
static void dumpKvm (const char *reg_name, const struct kvm_dtable &dtable)
 
static void dumpKvm (const struct kvm_sregs &sregs)
 
static void dumpFpuSpec (const struct FXSave &xs)
 
static void dumpFpuSpec (const struct kvm_fpu &fpu)
 
template<typename T >
static void dumpFpuCommon (const T &fpu)
 
static void dumpKvm (const struct kvm_fpu &fpu)
 
static void dumpKvm (const struct kvm_xsave &xsave)
 
static void dumpKvm (const struct kvm_msrs &msrs)
 
static void dumpKvm (const struct kvm_xcrs &regs)
 
static void dumpKvm (const struct kvm_vcpu_events &events)
 
static bool isCanonicalAddress (uint64_t addr)
 
static void checkSeg (const char *name, const int idx, const struct kvm_segment &seg, struct kvm_sregs sregs)
 
static void setKvmSegmentReg (ThreadContext *tc, struct kvm_segment &kvm_seg, const int index)
 
static void setKvmDTableReg (ThreadContext *tc, struct kvm_dtable &kvm_dtable, const int index)
 
static void forceSegAccessed (struct kvm_segment &seg)
 
template<typename T >
static void updateKvmStateFPUCommon (ThreadContext *tc, T &fpu)
 
void setContextSegment (ThreadContext *tc, const struct kvm_segment &kvm_seg, const int index)
 
void setContextSegment (ThreadContext *tc, const struct kvm_dtable &kvm_dtable, const int index)
 
template<typename T >
static void updateThreadContextFPUCommon (ThreadContext *tc, const T &fpu)
 
static struct kvm_cpuid_entry2 makeKvmCpuid (uint32_t function, uint32_t index, CpuidResult &result)
 

Variables

struct FXSave M5_ATTR_PACKED
 

Macro Definition Documentation

◆ APPLY_DTABLE [1/3]

#define APPLY_DTABLE (   kreg,
  idx 
)    dumpKvm(# kreg, sregs.kreg);

◆ APPLY_DTABLE [2/3]

#define APPLY_DTABLE (   kreg,
  idx 
)    setKvmDTableReg(tc, sregs.kreg, idx)

◆ APPLY_DTABLE [3/3]

#define APPLY_DTABLE (   kreg,
  idx 
)    setContextSegment(tc, sregs.kreg, idx)

◆ APPLY_IREG [1/3]

#define APPLY_IREG (   kreg,
  mreg 
)    inform("\t" # kreg ": 0x%llx\n", regs.kreg)

◆ APPLY_IREG [2/3]

#define APPLY_IREG (   kreg,
  mreg 
)    regs.kreg = tc->readIntReg(mreg)

◆ APPLY_IREG [3/3]

#define APPLY_IREG (   kreg,
  mreg 
)    tc->setIntReg(mreg, regs.kreg)

◆ APPLY_SEGMENT [1/4]

#define APPLY_SEGMENT (   kreg,
  idx 
)    dumpKvm(# kreg, sregs.kreg);

◆ APPLY_SEGMENT [2/4]

#define APPLY_SEGMENT (   kreg,
  idx 
)    setKvmSegmentReg(tc, sregs.kreg, idx)

◆ APPLY_SEGMENT [3/4]

#define APPLY_SEGMENT (   kreg,
  idx 
)    checkSeg(# kreg, idx + MISCREG_SEG_SEL_BASE, sregs.kreg, sregs)

◆ APPLY_SEGMENT [4/4]

#define APPLY_SEGMENT (   kreg,
  idx 
)    setContextSegment(tc, sregs.kreg, idx)

◆ APPLY_SREG [1/3]

#define APPLY_SREG (   kreg,
  mreg 
)    inform("\t" # kreg ": 0x%llx\n", sregs.kreg);

◆ APPLY_SREG [2/3]

#define APPLY_SREG (   kreg,
  mreg 
)    sregs.kreg = tc->readMiscRegNoEffect(mreg)

◆ APPLY_SREG [3/3]

#define APPLY_SREG (   kreg,
  mreg 
)    tc->setMiscRegNoEffect(mreg, sregs.kreg)

◆ FOREACH_DREG

#define FOREACH_DREG ( )
Value:
do { \
APPLY_DREG(db[0], MISCREG_DR0); \
APPLY_DREG(db[1], MISCREG_DR1); \
APPLY_DREG(db[2], MISCREG_DR2); \
APPLY_DREG(db[3], MISCREG_DR3); \
APPLY_DREG(dr6, MISCREG_DR6); \
APPLY_DREG(dr7, MISCREG_DR7); \
} while (0)

Definition at line 135 of file x86_cpu.cc.

◆ FOREACH_DTABLE

#define FOREACH_DTABLE ( )
Value:
do { \
APPLY_DTABLE(gdt, MISCREG_TSG - MISCREG_SEG_SEL_BASE); \
APPLY_DTABLE(idt, MISCREG_IDTR - MISCREG_SEG_SEL_BASE); \
} while (0)

Definition at line 157 of file x86_cpu.cc.

◆ FOREACH_IREG

#define FOREACH_IREG ( )
Value:
do { \
APPLY_IREG(rax, INTREG_RAX); \
APPLY_IREG(rbx, INTREG_RBX); \
APPLY_IREG(rcx, INTREG_RCX); \
APPLY_IREG(rdx, INTREG_RDX); \
APPLY_IREG(rsi, INTREG_RSI); \
APPLY_IREG(rdi, INTREG_RDI); \
APPLY_IREG(rsp, INTREG_RSP); \
APPLY_IREG(rbp, INTREG_RBP); \
APPLY_IREG(r8, INTREG_R8); \
APPLY_IREG(r9, INTREG_R9); \
APPLY_IREG(r10, INTREG_R10); \
APPLY_IREG(r11, INTREG_R11); \
APPLY_IREG(r12, INTREG_R12); \
APPLY_IREG(r13, INTREG_R13); \
APPLY_IREG(r14, INTREG_R14); \
APPLY_IREG(r15, INTREG_R15); \
} while (0)

Definition at line 104 of file x86_cpu.cc.

◆ FOREACH_SEGMENT

#define FOREACH_SEGMENT ( )
Value:
do { \
APPLY_SEGMENT(cs, MISCREG_CS - MISCREG_SEG_SEL_BASE); \
APPLY_SEGMENT(ds, MISCREG_DS - MISCREG_SEG_SEL_BASE); \
APPLY_SEGMENT(es, MISCREG_ES - MISCREG_SEG_SEL_BASE); \
APPLY_SEGMENT(fs, MISCREG_FS - MISCREG_SEG_SEL_BASE); \
APPLY_SEGMENT(gs, MISCREG_GS - MISCREG_SEG_SEL_BASE); \
APPLY_SEGMENT(ss, MISCREG_SS - MISCREG_SEG_SEL_BASE); \
APPLY_SEGMENT(tr, MISCREG_TR - MISCREG_SEG_SEL_BASE); \
APPLY_SEGMENT(ldt, MISCREG_TSL - MISCREG_SEG_SEL_BASE); \
} while (0)

Definition at line 145 of file x86_cpu.cc.

◆ FOREACH_SREG

#define FOREACH_SREG ( )
Value:
do { \
APPLY_SREG(cr0, MISCREG_CR0); \
APPLY_SREG(cr2, MISCREG_CR2); \
APPLY_SREG(cr3, MISCREG_CR3); \
APPLY_SREG(cr4, MISCREG_CR4); \
APPLY_SREG(cr8, MISCREG_CR8); \
APPLY_SREG(efer, MISCREG_EFER); \
APPLY_SREG(apic_base, MISCREG_APIC_BASE); \
} while (0)

Definition at line 124 of file x86_cpu.cc.

◆ IO_PCI_CONF_ADDR

#define IO_PCI_CONF_ADDR   0xCF8

Definition at line 54 of file x86_cpu.cc.

◆ IO_PCI_CONF_DATA_BASE

#define IO_PCI_CONF_DATA_BASE   0xCFC

Definition at line 55 of file x86_cpu.cc.

◆ MSR_TSC

#define MSR_TSC   0x10

Definition at line 52 of file x86_cpu.cc.

◆ SEG_CS_TYPE_ACCESSED

#define SEG_CS_TYPE_ACCESSED   9

Definition at line 63 of file x86_cpu.cc.

◆ SEG_CS_TYPE_READ_ACCESSED

#define SEG_CS_TYPE_READ_ACCESSED   11

Definition at line 65 of file x86_cpu.cc.

◆ SEG_SYS_TYPE_TSS_AVAILABLE

#define SEG_SYS_TYPE_TSS_AVAILABLE   9

Definition at line 58 of file x86_cpu.cc.

◆ SEG_SYS_TYPE_TSS_BUSY

#define SEG_SYS_TYPE_TSS_BUSY   11

Definition at line 60 of file x86_cpu.cc.

◆ SEG_TYPE_BIT_ACCESSED

#define SEG_TYPE_BIT_ACCESSED   1

Definition at line 69 of file x86_cpu.cc.

Function Documentation

◆ checkSeg()

static void checkSeg ( const char *  name,
const int  idx,
const struct kvm_segment &  seg,
struct kvm_sregs  sregs 
)
static

◆ dumpFpuCommon()

template<typename T >
static void dumpFpuCommon ( const T &  fpu)
static

◆ dumpFpuSpec() [1/2]

static void dumpFpuSpec ( const struct FXSave xs)
static

Definition at line 244 of file x86_cpu.cc.

References inform, and RiscvISA::xs.

Referenced by dumpFpuCommon().

◆ dumpFpuSpec() [2/2]

static void dumpFpuSpec ( const struct kvm_fpu &  fpu)
static

Definition at line 252 of file x86_cpu.cc.

References inform.

◆ dumpKvm() [1/9]

static void dumpKvm ( const char *  reg_name,
const struct kvm_dtable &  dtable 
)
static

Definition at line 196 of file x86_cpu.cc.

References inform.

◆ dumpKvm() [2/9]

static void dumpKvm ( const char *  reg_name,
const struct kvm_segment &  seg 
)
static

Definition at line 186 of file x86_cpu.cc.

References inform, and X86ISA::seg.

◆ dumpKvm() [3/9]

static void dumpKvm ( const struct kvm_fpu &  fpu)
static

Definition at line 310 of file x86_cpu.cc.

References dumpFpuCommon(), and inform.

◆ dumpKvm() [4/9]

static void dumpKvm ( const struct kvm_msrs &  msrs)
static

Definition at line 324 of file x86_cpu.cc.

References X86ISA::e, ArmISA::i, and inform.

◆ dumpKvm() [5/9]

static void dumpKvm ( const struct kvm_regs &  regs)
static

◆ dumpKvm() [6/9]

static void dumpKvm ( const struct kvm_sregs &  sregs)
static

Definition at line 203 of file x86_cpu.cc.

References FOREACH_DTABLE, FOREACH_SEGMENT, FOREACH_SREG, ArmISA::i, and inform.

◆ dumpKvm() [7/9]

static void dumpKvm ( const struct kvm_vcpu_events &  events)
static

Definition at line 349 of file x86_cpu.cc.

References inform.

◆ dumpKvm() [8/9]

static void dumpKvm ( const struct kvm_xcrs &  regs)
static

Definition at line 336 of file x86_cpu.cc.

References ArmISA::i, and inform.

◆ dumpKvm() [9/9]

static void dumpKvm ( const struct kvm_xsave &  xsave)
static

Definition at line 317 of file x86_cpu.cc.

References dumpFpuCommon(), and inform.

◆ forceSegAccessed()

static void forceSegAccessed ( struct kvm_segment &  seg)
static

Definition at line 743 of file x86_cpu.cc.

References X86ISA::seg, and SEG_TYPE_BIT_ACCESSED.

Referenced by X86KvmCPU::updateKvmStateSRegs().

◆ isCanonicalAddress()

static bool isCanonicalAddress ( uint64_t  addr)
static

Definition at line 370 of file x86_cpu.cc.

References X86ISA::addr.

Referenced by checkSeg().

◆ makeKvmCpuid()

static struct kvm_cpuid_entry2 makeKvmCpuid ( uint32_t  function,
uint32_t  index,
CpuidResult result 
)
static

Definition at line 1408 of file x86_cpu.cc.

References ArmISA::e, and MipsISA::index.

Referenced by X86KvmCPU::updateCPUID().

◆ newVarStruct()

template<typename STRUCT , typename ENTRY >
static STRUCT* newVarStruct ( size_t  entries)
static

Definition at line 164 of file x86_cpu.cc.

◆ setContextSegment() [1/2]

void setContextSegment ( ThreadContext tc,
const struct kvm_dtable &  kvm_dtable,
const int  index 
)
inline

◆ setContextSegment() [2/2]

void setContextSegment ( ThreadContext tc,
const struct kvm_segment &  kvm_seg,
const int  index 
)
inline

◆ setKvmDTableReg()

static void setKvmDTableReg ( ThreadContext tc,
struct kvm_dtable &  kvm_dtable,
const int  index 
)
inlinestatic

◆ setKvmSegmentReg()

static void setKvmSegmentReg ( ThreadContext tc,
struct kvm_segment &  kvm_seg,
const int  index 
)
inlinestatic

◆ updateKvmStateFPUCommon()

template<typename T >
static void updateKvmStateFPUCommon ( ThreadContext tc,
T &  fpu 
)
static

◆ updateThreadContextFPUCommon()

template<typename T >
static void updateThreadContextFPUCommon ( ThreadContext tc,
const T &  fpu 
)
static

Variable Documentation

◆ M5_ATTR_PACKED

struct FXSave M5_ATTR_PACKED
X86ISA::MISCREG_APIC_BASE
@ MISCREG_APIC_BASE
Definition: misc.hh:393
MipsISA::ds
Bitfield< 15, 13 > ds
Definition: pra_constants.hh:235
ArmISA::INTREG_R8
@ INTREG_R8
Definition: intregs.hh:62
ArmISA::INTREG_R9
@ INTREG_R9
Definition: intregs.hh:63
X86ISA::MISCREG_IDTR
@ MISCREG_IDTR
Definition: misc.hh:308
X86ISA::MISCREG_TSL
@ MISCREG_TSL
Definition: misc.hh:303
X86ISA::MISCREG_ES
@ MISCREG_ES
Definition: misc.hh:296
X86ISA::MISCREG_CS
@ MISCREG_CS
Definition: misc.hh:297
MipsISA::gs
Bitfield< 28 > gs
Definition: mt_constants.hh:48
X86ISA::MISCREG_CR2
@ MISCREG_CR2
Definition: misc.hh:107
MipsISA::es
Bitfield< 27 > es
Definition: pra_constants.hh:310
X86ISA::MISCREG_EFER
@ MISCREG_EFER
Definition: misc.hh:245
ArmISA::INTREG_R13
@ INTREG_R13
Definition: intregs.hh:67
X86ISA::MISCREG_DR1
@ MISCREG_DR1
Definition: misc.hh:125
ArmISA::INTREG_R10
@ INTREG_R10
Definition: intregs.hh:64
X86ISA::MISCREG_DS
@ MISCREG_DS
Definition: misc.hh:299
X86ISA::MISCREG_CR4
@ MISCREG_CR4
Definition: misc.hh:109
ArmISA::ss
Bitfield< 21 > ss
Definition: miscregs_types.hh:56
X86ISA::MISCREG_SEG_SEL_BASE
@ MISCREG_SEG_SEL_BASE
Definition: misc.hh:295
ArmISA::INTREG_R12
@ INTREG_R12
Definition: intregs.hh:66
X86ISA::MISCREG_DR7
@ MISCREG_DR7
Definition: misc.hh:131
ArmISA::INTREG_R14
@ INTREG_R14
Definition: intregs.hh:69
ArmISA::INTREG_R15
@ INTREG_R15
Definition: intregs.hh:71
X86ISA::MISCREG_DR0
@ MISCREG_DR0
Definition: misc.hh:124
X86ISA::MISCREG_FS
@ MISCREG_FS
Definition: misc.hh:300
X86ISA::MISCREG_DR3
@ MISCREG_DR3
Definition: misc.hh:127
RiscvISA::fs
Bitfield< 14, 13 > fs
Definition: registers.hh:612
X86ISA::MISCREG_CR3
@ MISCREG_CR3
Definition: misc.hh:108
X86ISA::MISCREG_DR2
@ MISCREG_DR2
Definition: misc.hh:126
X86ISA::MISCREG_SS
@ MISCREG_SS
Definition: misc.hh:298
X86ISA::MISCREG_DR6
@ MISCREG_DR6
Definition: misc.hh:130
X86ISA::MISCREG_CR0
@ MISCREG_CR0
Definition: misc.hh:105
X86ISA::MISCREG_TR
@ MISCREG_TR
Definition: misc.hh:307
ArmISA::INTREG_R11
@ INTREG_R11
Definition: intregs.hh:65
X86ISA::MISCREG_GS
@ MISCREG_GS
Definition: misc.hh:301
X86ISA::MISCREG_CR8
@ MISCREG_CR8
Definition: misc.hh:113
X86ISA::MISCREG_TSG
@ MISCREG_TSG
Definition: misc.hh:304

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