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cortex_r52.hh
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27 
28 #ifndef __ARCH_ARM_FASTMODEL_CORTEXR52_CORETEX_R52_HH__
29 #define __ARCH_ARM_FASTMODEL_CORTEXR52_CORETEX_R52_HH__
30 
34 #include "params/FastModelCortexR52.hh"
35 #include "params/FastModelCortexR52Cluster.hh"
36 #include "scx/scx.h"
37 #include "sim/port.hh"
39 
40 class BaseCPU;
41 
42 namespace FastModel
43 {
44 
45 // The fast model exports a class called scx_evs_CortexR52x1 which represents
46 // the subsystem described in LISA+. This class specializes it to export gem5
47 // ports and interface with its peer gem5 CPU. The gem5 CPU inherits from the
48 // gem5 BaseCPU class and implements its API, while this class actually does
49 // the work.
50 class CortexR52Cluster;
51 
52 class CortexR52 : public Iris::CPU<CortexR52TC>
53 {
54  protected:
56 
58  int num = 0;
59 
60  public:
61  PARAMS(FastModelCortexR52);
62  CortexR52(const Params &p) :
63  Base(p, scx::scx_get_iris_connection_interface())
64  {}
65 
66  template <class T>
67  void set_evs_param(const std::string &n, T val);
68 
69  void setCluster(CortexR52Cluster *_cluster, int _num);
70 
71  Port &getPort(const std::string &if_name,
72  PortID idx=InvalidPortID) override;
73 };
74 
76 {
77  private:
80 
81  public:
82  template <class T>
83  void
84  set_evs_param(const std::string &n, T val)
85  {
86  scx::scx_set_parameter(evs->name() + std::string(".") + n, val);
87  }
88 
89  CortexR52 *getCore(int num) const { return cores.at(num); }
90  sc_core::sc_module *getEvs() const { return evs; }
91 
92  PARAMS(FastModelCortexR52Cluster);
93  CortexR52Cluster(const Params &p);
94 
95  Port &getPort(const std::string &if_name,
96  PortID idx=InvalidPortID) override;
97 };
98 
99 template <class T>
100 inline void
101 CortexR52::set_evs_param(const std::string &n, T val)
102 {
103  for (auto &path: params().thread_paths)
104  cluster->set_evs_param(path + "." + n, val);
105 }
106 
107 } // namespace FastModel
108 
109 #endif // __ARCH_ARM_FASTMODEL_CORTEXR52_CORETEX_R52_HH__
FastModel::CortexR52Cluster::CortexR52Cluster
CortexR52Cluster(const Params &p)
Definition: cortex_r52.cc:96
SimObject::Params
SimObjectParams Params
Definition: sim_object.hh:162
sc_core::sc_module
Definition: sc_module.hh:97
InvalidPortID
const PortID InvalidPortID
Definition: types.hh:244
FastModel::CortexR52Cluster::cores
std::vector< CortexR52 * > cores
Definition: cortex_r52.hh:78
FastModel::CortexR52::cluster
CortexR52Cluster * cluster
Definition: cortex_r52.hh:57
FastModel::CortexR52::setCluster
void setCluster(CortexR52Cluster *_cluster, int _num)
Definition: cortex_r52.cc:40
FastModel::CortexR52::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: cortex_r52.cc:80
PortID
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:243
FastModel::CortexR52::PARAMS
PARAMS(FastModelCortexR52)
std::vector
STL vector class.
Definition: stl.hh:37
cpu.hh
FastModel::CortexR52::num
int num
Definition: cortex_r52.hh:58
ArmISA::n
Bitfield< 31 > n
Definition: miscregs_types.hh:450
FastModel::CortexR52
Definition: cortex_r52.hh:52
FastModel::CortexR52Cluster::getPort
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: cortex_r52.cc:146
ClockedObject::Params
ClockedObjectParams Params
Parameters of ClockedObject.
Definition: clocked_object.hh:237
FastModel::CortexR52::set_evs_param
void set_evs_param(const std::string &n, T val)
Definition: cortex_r52.hh:101
FastModel::CortexR52Cluster::getEvs
sc_core::sc_module * getEvs() const
Definition: cortex_r52.hh:90
FastModel::CortexR52Cluster::set_evs_param
void set_evs_param(const std::string &n, T val)
Definition: cortex_r52.hh:84
Port
Ports are used to interface objects to each other.
Definition: port.hh:56
thread_context.hh
X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:769
port.hh
sc_module.hh
amba_ports.hh
BaseCPU
Definition: base.hh:104
FastModel::CortexR52Cluster::PARAMS
PARAMS(FastModelCortexR52Cluster)
FastModel::CortexR52Cluster::getCore
CortexR52 * getCore(int num) const
Definition: cortex_r52.hh:89
FastModel::CortexR52::Base
Iris::CPU< CortexR52TC > Base
Definition: cortex_r52.hh:55
FastModel
Definition: amba_from_tlm_bridge.cc:32
sc_core::sc_object::name
const char * name() const
Definition: sc_object.cc:44
FastModel::CortexR52Cluster
Definition: cortex_r52.hh:75
FastModel::CortexR52::CortexR52
CortexR52(const Params &p)
Definition: cortex_r52.hh:62
FastModel::CortexR52Cluster::evs
sc_core::sc_module * evs
Definition: cortex_r52.hh:79
SimObject::params
const Params & params() const
Definition: sim_object.hh:168
MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:323
Serializable::path
static std::stack< std::string > path
Definition: serialize.hh:321
Iris::CPU
Definition: cpu.hh:112
SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:141

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