gem5  v21.1.0.2
decode_cache.hh
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28 
29 #ifndef __ARCH_GENERIC_DECODE_CACHE_HH__
30 #define __ARCH_GENERIC_DECODE_CACHE_HH__
31 
32 #include "base/types.hh"
33 #include "cpu/decode_cache.hh"
34 #include "cpu/static_inst_fwd.hh"
35 
36 namespace gem5
37 {
38 
39 namespace GenericISA
40 {
41 
42 template <typename Decoder, typename EMI>
44 {
45  private:
47  struct AddrMapEntry
48  {
50  EMI machInst;
51  };
53 
54  public:
59  decode(Decoder *const decoder, EMI mach_inst, Addr addr)
60  {
61  auto &entry = decodePages.lookup(addr);
62  if (entry.inst && (entry.machInst == mach_inst))
63  return entry.inst;
64 
65  entry.machInst = mach_inst;
66 
67  auto iter = instMap.find(mach_inst);
68  if (iter != instMap.end()) {
69  entry.inst = iter->second;
70  return entry.inst;
71  }
72 
73  entry.inst = decoder->decodeInst(mach_inst);
74  instMap[mach_inst] = entry.inst;
75  return entry.inst;
76  }
77 };
78 
79 } // namespace GenericISA
80 } // namespace gem5
81 
82 #endif // __ARCH_GENERIC_DECODE_CACHE_HH__
gem5::decode_cache::InstMap
std::unordered_map< EMI, StaticInstPtr > InstMap
Hash for decoded instructions.
Definition: decode_cache.hh:47
gem5::GenericISA::BasicDecodeCache
Definition: decode_cache.hh:43
gem5::RefCountingPtr< StaticInst >
gem5::GenericISA::BasicDecodeCache::instMap
decode_cache::InstMap< EMI > instMap
Definition: decode_cache.hh:46
gem5::decode_cache::AddrMap
A sparse map from an Addr to a Value, stored in page chunks.
Definition: decode_cache.hh:51
gem5::ArmISA::Decoder
Definition: decoder.hh:62
gem5::GenericISA::BasicDecodeCache::AddrMapEntry::inst
StaticInstPtr inst
Definition: decode_cache.hh:49
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
types.hh
static_inst_fwd.hh
gem5::GenericISA::BasicDecodeCache::decodePages
decode_cache::AddrMap< AddrMapEntry > decodePages
Definition: decode_cache.hh:52
decode_cache.hh
decoder
output decoder
Definition: nop.cc:61
gem5::GenericISA::BasicDecodeCache::decode
StaticInstPtr decode(Decoder *const decoder, EMI mach_inst, Addr addr)
Decode a machine instruction.
Definition: decode_cache.hh:59
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::GenericISA::BasicDecodeCache::AddrMapEntry::machInst
EMI machInst
Definition: decode_cache.hh:50
gem5::GenericISA::BasicDecodeCache::AddrMapEntry
Definition: decode_cache.hh:47
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84

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