gem5  v22.1.0.0
cfi_mem.hh
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40 
41 #ifndef __MEM_FLASH_MEM_HH__
42 #define __MEM_FLASH_MEM_HH__
43 
44 #include "mem/abstract_mem.hh"
45 #include "params/CfiMemory.hh"
46 
47 namespace gem5
48 {
49 
50 namespace memory
51 {
52 
71 class CfiMemory : public AbstractMemory
72 {
73  private:
74  enum class CfiCommand
75  {
76  NO_CMD = 0,
77  LOCK_BLOCK = 0x1,
78  ERASE_BLOCK_SETUP = 0x20,
79  WORD_PROGRAM = 0x40,
80  CLEAR_STATUS_REG = 0x50,
81  LOCK_BLOCK_SETUP = 0x60,
82  READ_STATUS_REG = 0x70,
83  READ_DEVICE_ID = 0x90,
84  READ_CFI_QUERY = 0x98,
87  BLOCK_ERASE_CONFIRM = 0xD0,
88  UNLOCK_BLOCK = 0xD0,
89  AMD_RESET=0xF0,
90  READ_ARRAY = 0xFF,
95  };
96 
98  static const uint8_t STATUS_ERASE_ERROR = 0x30;
99  static const uint8_t STATUS_LOCK_ERROR = 0x12;
100  static const uint8_t STATUS_READY = 0x80;
101  static const uint8_t STATUS_PROGRAM_LOCK_BIT = 0x10;
102 
104  struct BlockData : public Serializable
105  {
106  BlockData(const CfiMemory &_parent, ssize_t number, ssize_t size)
107  : Serializable(), locked(number, false), blockSize(size),
108  parent(_parent)
109  {}
110 
119  bool isLocked(Addr block_address) const;
120 
128  void lock(Addr block_address);
129 
137  void unlock(Addr block_address);
138 
144  void erase(PacketPtr pkt);
145 
147  ssize_t number() const { return locked.size(); }
148 
150  ssize_t size() const { return blockSize; }
151 
152  private: // Serializable
153  void serialize(CheckpointOut &cp) const override;
154 
155  void unserialize(CheckpointIn &cp) override;
156 
157  private:
158  uint32_t blockIdx(Addr block_address) const;
159 
160  // Per block flag. True if the block is locked
162 
163  // Size of the block in bytes
164  const ssize_t blockSize;
165 
167  };
168 
173  struct ProgramBuffer : public Serializable
174  {
175  public:
176  // program buffer max size = 32 words
177  static const ssize_t MAX_BUFFER_SIZE = 32 * 4;
178 
179  ProgramBuffer(const CfiMemory &_parent)
180  : Serializable(), parent(_parent)
181  {}
182 
187  void setup(ssize_t buffer_size);
188 
200  bool write(Addr flash_address, void *data_ptr, ssize_t size);
201 
202  bool writeback();
203 
204  private:
205  void serialize(CheckpointOut &cp) const override;
206 
207  void unserialize(CheckpointIn &cp) override;
208 
209  private:
210  // program buffer
212 
213  // Number of bytes written in the buffer
214  ssize_t bytesWritten = 0;
215 
216  // Pointing to the latest written word in the buffer
218 
220  };
221 
227  {
228 
229  public:
230 
231  const Tick tick;
232  const PacketPtr pkt;
233 
234  DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt)
235  { }
236  };
237 
238  class MemoryPort : public ResponsePort
239  {
240  private:
242 
243  public:
244  MemoryPort(const std::string& _name, CfiMemory& _memory);
245 
246  protected:
247  Tick recvAtomic(PacketPtr pkt) override;
249  PacketPtr pkt, MemBackdoorPtr &_backdoor) override;
250  void recvFunctional(PacketPtr pkt) override;
251  bool recvTimingReq(PacketPtr pkt) override;
252  void recvRespRetry() override;
253  AddrRangeList getAddrRanges() const override;
254  };
255 
257 
262  const Tick latency;
263 
268 
275 
281  const double bandwidth;
282 
287  bool isBusy;
288 
293  bool retryReq;
294 
299  bool retryResp;
300 
305  void release();
306 
308 
313  void dequeue();
314 
316 
322  Tick getLatency() const;
323 
328  std::unique_ptr<Packet> pendingDelete;
329 
330  const uint8_t numberOfChips;
331 
332  const uint16_t vendorID;
333  const uint16_t deviceID;
334  const uint16_t bankWidth;
335 
339 
340  uint8_t statusRegister;
341 
343 
345 
346  uint8_t cfiQueryTable[61];
347 
348  public:
349  CfiMemory(const CfiMemoryParams &p);
350 
351  DrainState drain() override;
352 
353  Port &getPort(const std::string &if_name,
354  PortID idx=InvalidPortID) override;
355  void init() override;
356 
357  void serialize(CheckpointOut &cp) const override;
358  void unserialize(CheckpointIn &cp) override;
359 
360  protected:
363  void recvFunctional(PacketPtr pkt);
364  bool recvTimingReq(PacketPtr pkt);
365  void recvRespRetry();
366 
368  void cfiAccess(PacketPtr pkt);
369 
371  void write(PacketPtr pkt);
372 
374  void read(PacketPtr pkt);
375 
385  uint64_t readDeviceID(Addr flash_address) const;
386 
392  void handleCommand(CfiCommand command);
393 
398  uint64_t cfiQuery(Addr addr);
399 };
400 
401 } // namespace memory
402 } // namespace gem5
403 
404 #endif
AbstractMemory declaration.
const std::string _name
Definition: named.hh:41
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:294
Ports are used to interface objects to each other.
Definition: port.hh:62
A ResponsePort is a specialization of a port.
Definition: port.hh:270
Basic support for object serialization.
Definition: serialize.hh:170
An abstract memory represents a contiguous block of physical memory, with an associated address range...
uint64_t size() const
Get the memory size.
A deferred packet stores a packet along with its scheduled transmission time.
Definition: cfi_mem.hh:227
DeferredPacket(PacketPtr _pkt, Tick _tick)
Definition: cfi_mem.hh:234
MemoryPort(const std::string &_name, CfiMemory &_memory)
Definition: cfi_mem.cc:457
AddrRangeList getAddrRanges() const override
Get a list of the non-overlapping address ranges the owner is responsible for.
Definition: cfi_mem.cc:463
Tick recvAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &_backdoor) override
Receive an atomic request packet from the peer, and optionally provide a backdoor to the data being a...
Definition: cfi_mem.cc:477
void recvFunctional(PacketPtr pkt) override
Receive a functional request packet from the peer.
Definition: cfi_mem.cc:484
bool recvTimingReq(PacketPtr pkt) override
Receive a timing request from the peer.
Definition: cfi_mem.cc:490
void recvRespRetry() override
Called by the peer if sendTimingResp was called on this protocol (causing recvTimingResp to be called...
Definition: cfi_mem.cc:496
Tick recvAtomic(PacketPtr pkt) override
Receive an atomic request packet from the peer.
Definition: cfi_mem.cc:471
CfiMemory: This is modelling a flash memory adhering to the Common Flash Interface (CFI):
Definition: cfi_mem.hh:72
EventFunctionWrapper releaseEvent
Definition: cfi_mem.hh:307
const uint16_t bankWidth
Definition: cfi_mem.hh:334
static const uint8_t STATUS_ERASE_ERROR
Possible in the status register.
Definition: cfi_mem.hh:98
void recvFunctional(PacketPtr pkt)
Definition: cfi_mem.cc:261
const uint16_t vendorID
Definition: cfi_mem.hh:332
CfiCommand readState
Previous command (issued in the previous write cycle)
Definition: cfi_mem.hh:337
Tick recvAtomic(PacketPtr pkt)
Definition: cfi_mem.cc:241
uint64_t readDeviceID(Addr flash_address) const
Helper function to read the device identifier after the read state machine is put in the CfiCommand::...
Definition: cfi_mem.cc:653
static const uint8_t STATUS_PROGRAM_LOCK_BIT
Definition: cfi_mem.hh:101
bool isBusy
Track the state of the memory as either idle or busy, no need for an enum with only two states.
Definition: cfi_mem.hh:287
EventFunctionWrapper dequeueEvent
Definition: cfi_mem.hh:315
static const uint8_t STATUS_LOCK_ERROR
Definition: cfi_mem.hh:99
static const uint8_t STATUS_READY
Definition: cfi_mem.hh:100
std::list< DeferredPacket > packetQueue
Internal (unbounded) storage to mimic the delay caused by the actual memory access.
Definition: cfi_mem.hh:274
Port & getPort(const std::string &if_name, PortID idx=InvalidPortID) override
Get a port with a given name and index.
Definition: cfi_mem.cc:413
CfiCommand writeState
Definition: cfi_mem.hh:338
ProgramBuffer programBuffer
Definition: cfi_mem.hh:344
bool recvTimingReq(PacketPtr pkt)
Definition: cfi_mem.cc:279
void write(PacketPtr pkt)
Write request to the CFI Memory.
Definition: cfi_mem.cc:512
void init() override
init() is called after all C++ SimObjects have been created and all ports are connected.
Definition: cfi_mem.cc:229
DrainState drain() override
Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are pa...
Definition: cfi_mem.cc:423
CfiMemory(const CfiMemoryParams &p)
Definition: cfi_mem.cc:156
void handleCommand(CfiCommand command)
Service a new command issued to the flash device.
Definition: cfi_mem.cc:670
const uint8_t numberOfChips
Definition: cfi_mem.hh:330
Tick recvAtomicBackdoor(PacketPtr pkt, MemBackdoorPtr &_backdoor)
Definition: cfi_mem.cc:251
@ BUFFER_SIZE_READ
This is not a real command, but it is used by the internal model only to represent the 2nd write cycl...
Tick getLatency() const
Detemine the latency.
Definition: cfi_mem.cc:398
bool retryReq
Remember if we have to retry an outstanding request that arrived while we were busy.
Definition: cfi_mem.hh:293
uint64_t cfiQuery(Addr addr)
Return the selected entry in the CFI table.
Definition: cfi_mem.cc:728
void read(PacketPtr pkt)
Read request to the CFI Memory.
Definition: cfi_mem.cc:617
const uint16_t deviceID
Definition: cfi_mem.hh:333
uint8_t cfiQueryTable[61]
Definition: cfi_mem.hh:346
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: cfi_mem.cc:446
void release()
Release the memory after being busy and send a retry if a request was rejected in the meanwhile.
Definition: cfi_mem.cc:362
void cfiAccess(PacketPtr pkt)
Make a read/write access to the CFI Memory.
Definition: cfi_mem.cc:502
bool retryResp
Remember if we failed to send a response and are awaiting a retry.
Definition: cfi_mem.hh:299
std::unique_ptr< Packet > pendingDelete
Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent c...
Definition: cfi_mem.hh:328
const Tick latency_var
Fudge factor added to the latency.
Definition: cfi_mem.hh:267
void dequeue()
Dequeue a packet from our internal packet queue and move it to the port where it will be sent as soon...
Definition: cfi_mem.cc:373
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: cfi_mem.cc:434
const Tick latency
Latency from that a request is accepted until the response is ready to be sent.
Definition: cfi_mem.hh:262
const double bandwidth
Bandwidth in ticks per byte.
Definition: cfi_mem.hh:281
DrainState
Object drain/handover states.
Definition: drain.hh:75
Bitfield< 54 > p
Definition: pagetable.hh:70
Bitfield< 3 > addr
Definition: types.hh:84
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
const PortID InvalidPortID
Definition: types.hh:246
std::ostream CheckpointOut
Definition: serialize.hh:66
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
int16_t PortID
Port index/ID type, and a symbolic name for an invalid port id.
Definition: types.hh:245
uint64_t Tick
Tick count type.
Definition: types.hh:58
Metadata about the erase blocks in flash.
Definition: cfi_mem.hh:105
uint32_t blockIdx(Addr block_address) const
Definition: cfi_mem.cc:88
void lock(Addr block_address)
Lock the block pointed by the block_address parameter.
Definition: cfi_mem.cc:64
void erase(PacketPtr pkt)
Erase a single block.
Definition: cfi_mem.cc:740
void unlock(Addr block_address)
Unlock the block pointed by the block_address parameter.
Definition: cfi_mem.cc:70
bool isLocked(Addr block_address) const
Return true if the block pointed by the block_address parameter is locked.
Definition: cfi_mem.cc:58
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: cfi_mem.cc:82
BlockData(const CfiMemory &_parent, ssize_t number, ssize_t size)
Definition: cfi_mem.hh:106
ssize_t number() const
Number of erase blocks in flash memory.
Definition: cfi_mem.hh:147
std::vector< bool > locked
Definition: cfi_mem.hh:161
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: cfi_mem.cc:76
ssize_t size() const
Size in bytes of a single erase block.
Definition: cfi_mem.hh:150
Word Buffer used by the BUFFERED PROGRAM command to write (program) chunks of words to flash.
Definition: cfi_mem.hh:174
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: cfi_mem.cc:141
void setup(ssize_t buffer_size)
Start buffering.
Definition: cfi_mem.cc:94
static const ssize_t MAX_BUFFER_SIZE
Definition: cfi_mem.hh:177
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: cfi_mem.cc:149
std::vector< uint8_t > buffer
Definition: cfi_mem.hh:211
ProgramBuffer(const CfiMemory &_parent)
Definition: cfi_mem.hh:179
bool write(Addr flash_address, void *data_ptr, ssize_t size)
Write data into the buffer.
Definition: cfi_mem.cc:107
Definition: mem.h:38

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