gem5::X86ISA::PageFault Class Reference

#include <faults.hh>

Inheritance diagram for gem5::X86ISA::PageFault:

Public Member Functions
	PageFault (Addr _addr, uint32_t _errorCode)
	PageFault (Addr _addr, bool present, BaseMMU::Mode mode, bool user, bool reserved)
void	invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr)
virtual std::string	describe () const
Public Member Functions inherited from gem5::X86ISA::X86FaultBase
virtual uint8_t	getVector () const
	Get the vector of an interrupt. More...
Public Member Functions inherited from gem5::FaultBase
virtual	~FaultBase ()

Protected Member Functions
	BitUnion32 (PageFaultErrorCode) Bitfield< 0 > present
	EndBitUnion (PageFaultErrorCode) Addr addr
Protected Member Functions inherited from gem5::X86ISA::X86Fault
	X86FaultBase (const char *_faultName, const char *_mnem, const uint8_t _vector, uint64_t _errorCode=(uint64_t) -1)
Protected Member Functions inherited from gem5::X86ISA::X86FaultBase
	X86FaultBase (const char *_faultName, const char *_mnem, const uint8_t _vector, uint64_t _errorCode=(uint64_t) -1)
const char *	name () const override
virtual bool	isBenign ()
virtual const char *	mnemonic () const

Protected Attributes
Bitfield< 1 >	write
Bitfield< 2 >	user
Bitfield< 3 >	reserved
Bitfield< 4 >	fetch
Protected Attributes inherited from gem5::X86ISA::X86FaultBase
const char *	faultName
const char *	mnem
uint8_t	vector
uint64_t	errorCode

Detailed Description

Definition at line 263 of file faults.hh.

Constructor & Destructor Documentation

PageFault() [1/2]

gem5::X86ISA::PageFault::PageFault ( Addr  _addr, uint32_t  _errorCode  )

inline

Definition at line 277 of file faults.hh.

PageFault() [2/2]

gem5::X86ISA::PageFault::PageFault ( Addr  _addr, bool  present, BaseMMU::Mode  mode, bool  user, bool  reserved  )

inline

Definition at line 281 of file faults.hh.

References gem5::X86ISA::X86FaultBase::errorCode, gem5::BaseMMU::Execute, gem5::X86ISA::mode, gem5::X86ISA::present, reserved, user, and gem5::BaseMMU::Write.

Member Function Documentation

BitUnion32()

gem5::X86ISA::PageFault::BitUnion32 ( PageFaultErrorCode  )

protected

describe()

std::string gem5::X86ISA::PageFault::describe ( ) const

virtual

Reimplemented from gem5::X86ISA::X86FaultBase.

Definition at line 175 of file faults.cc.

References gem5::X86ISA::addr, gem5::ccprintf(), gem5::X86ISA::X86FaultBase::describe(), and ss.

EndBitUnion()

gem5::X86ISA::PageFault::EndBitUnion ( PageFaultErrorCode  )

protected

invoke()

void gem5::X86ISA::PageFault::invoke ( ThreadContext *  tc, const StaticInstPtr &  inst = nullStaticInstPtr  )

virtual

Reimplemented from gem5::X86ISA::X86FaultBase.

Definition at line 137 of file faults.cc.

References gem5::X86ISA::addr, gem5::X86ISA::misc_reg::Cr2, gem5::loader::debugSymbolTable, gem5::BaseMMU::demapPage(), gem5::StaticInst::disassemble(), gem5::X86ISA::X86FaultBase::errorCode, gem5::Process::fixupFault(), gem5::FullSystem, gem5::ThreadContext::getMMUPtr(), gem5::ThreadContext::getProcessPtr(), gem5::PCStateBase::instAddr(), gem5::X86ISA::X86FaultBase::invoke(), gem5::X86ISA::misc_reg::M5Reg, panic, gem5::ThreadContext::pcState(), gem5::ThreadContext::readMiscRegNoEffect(), and gem5::ThreadContext::setMiscReg().

Member Data Documentation

fetch

Bitfield<4> gem5::X86ISA::PageFault::fetch

protected

Definition at line 271 of file faults.hh.

reserved

Bitfield<3> gem5::X86ISA::PageFault::reserved

protected

Definition at line 270 of file faults.hh.

Referenced by PageFault().

user

Bitfield<2> gem5::X86ISA::PageFault::user

protected

Definition at line 269 of file faults.hh.

Referenced by PageFault().

write

Bitfield<1> gem5::X86ISA::PageFault::write

protected

Definition at line 268 of file faults.hh.

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The documentation for this class was generated from the following files:

• arch/x86/faults.hh
• arch/x86/faults.cc