Rank class includes a vector of banks. More...

Inheritance diagram for gem5::memory::DRAMInterface::Rank:

Public Member Functions
	Rank (const DRAMInterfaceParams &_p, int _rank, DRAMInterface &_dram)

const std::string	name () const

void	startup (Tick ref_tick)
	Kick off accounting for power and refresh states and schedule initial refresh.

void	suspend ()
	Stop the refresh events.

bool	inRefIdleState () const
	Check if there is no refresh and no preparation of refresh ongoing i.e.

bool	inPwrIdleState () const
	Check if the current rank has all banks closed and is not in a low power state.

bool	forceSelfRefreshExit () const
	Trigger a self-refresh exit if there are entries enqueued Exit if there are any read entries regardless of the bus state.

bool	isQueueEmpty () const
	Check if the command queue of current rank is idle.

void	checkDrainDone ()
	Let the rank check if it was waiting for requests to drain to allow it to transition states.

void	flushCmdList ()
	Push command out of cmdList queue that are scheduled at or before curTick() to DRAMPower library All commands before curTick are guaranteed to be complete and can safely be flushed.

void	computeStats ()
	Computes stats just prior to dump event.

void	resetStats ()
	Reset stats on a stats event.

void	powerDownSleep (PowerState pwr_state, Tick tick)
	Schedule a transition to power-down (sleep)

void	scheduleWakeUpEvent (Tick exit_delay)
	schedule and event to wake-up from power-down or self-refresh and update bank timing parameters

void	processWriteDoneEvent ()

void	processActivateEvent ()

void	processPrechargeEvent ()

void	processRefreshEvent ()

void	processPowerEvent ()

void	processWakeUpEvent ()

Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers.

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue.

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Attributes
PowerState	pwrState
	Current power state.

RefreshState	refreshState
	current refresh state

bool	inLowPowerState
	rank is in or transitioning to power-down or self-refresh

uint8_t	rank
	Current Rank index.

uint32_t	readEntries
	Track number of packets in read queue going to this rank.

uint32_t	writeEntries
	Track number of packets in write queue going to this rank.

uint8_t	outstandingEvents
	Number of ACT, RD, and WR events currently scheduled Incremented when a refresh event is started as well Used to determine when a low-power state can be entered.

Tick	wakeUpAllowedAt
	delay low-power exit until this requirement is met

DRAMPower	power
	One DRAMPower instance per rank.

std::vector< Command >	cmdList
	List of commands issued, to be sent to DRAMPpower at refresh and stats dump.

std::vector< Bank >	banks
	Vector of Banks.

unsigned int	numBanksActive
	To track number of banks which are currently active for this rank.

std::deque< Tick >	actTicks
	List to keep track of activate ticks.

Tick	lastBurstTick
	Track when we issued the last read/write burst.

EventFunctionWrapper	writeDoneEvent

EventFunctionWrapper	activateEvent

EventFunctionWrapper	prechargeEvent

EventFunctionWrapper	refreshEvent

EventFunctionWrapper	powerEvent

EventFunctionWrapper	wakeUpEvent

Protected Attributes
RankStats	stats

Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue.

Private Member Functions
void	updatePowerStats ()
	Function to update Power Stats.

void	schedulePowerEvent (PowerState pwr_state, Tick tick)
	Schedule a power state transition in the future, and potentially override an already scheduled transition.

Private Attributes
DRAMInterface &	dram
	A reference to the parent DRAMInterface instance.

PowerState	pwrStateTrans
	Since we are taking decisions out of order, we need to keep track of what power transition is happening at what time.

PowerState	pwrStatePostRefresh
	Previous low-power state, which will be re-entered after refresh.

Tick	pwrStateTick
	Track when we transitioned to the current power state.

Tick	refreshDueAt
	Keep track of when a refresh is due.

Detailed Description

Rank class includes a vector of banks.

Refresh and Power state machines are defined per rank. Events required to change the state of the refresh and power state machine are scheduled per rank. This class allows the implementation of rank-wise refresh and rank-wise power-down.

Definition at line 229 of file dram_interface.hh.

Constructor & Destructor Documentation

◆ Rank()

gem5::memory::DRAMInterface::Rank::Rank	(	const DRAMInterfaceParams &	_p,
		int	_rank,
		DRAMInterface &	_dram )

Definition at line 1118 of file dram_interface.cc.

References processWriteDoneEvent().

Member Function Documentation

◆ checkDrainDone()

void gem5::memory::DRAMInterface::Rank::checkDrainDone ( )

Let the rank check if it was waiting for requests to drain to allow it to transition states.

Definition at line 1192 of file dram_interface.cc.

References gem5::curTick(), DPRINTF, gem5::memory::DRAMInterface::REF_DRAIN, gem5::memory::DRAMInterface::REF_PD_EXIT, and gem5::EventManager::schedule().

◆ computeStats()

void gem5::memory::DRAMInterface::Rank::computeStats ( )

Computes stats just prior to dump event.

Definition at line 1810 of file dram_interface.cc.

References gem5::curTick(), DPRINTF, and gem5::memory::DRAMInterface::stats.

◆ flushCmdList()

void gem5::memory::DRAMInterface::Rank::flushCmdList ( )

Push command out of cmdList queue that are scheduled at or before curTick() to DRAMPower library All commands before curTick are guaranteed to be complete and can safely be flushed.

Definition at line 1207 of file dram_interface.cc.

References gem5::memory::DRAMInterface::Command::bank, gem5::curTick(), gem5::divCeil(), gem5::memory::DRAMInterface::sortTime(), gem5::memory::DRAMInterface::Command::timeStamp, and gem5::memory::DRAMInterface::Command::type.

◆ forceSelfRefreshExit()

bool gem5::memory::DRAMInterface::Rank::forceSelfRefreshExit ( ) const

Trigger a self-refresh exit if there are entries enqueued Exit if there are any read entries regardless of the bus state.

If we are currently issuing write commands, exit if we have any write commands enqueued as well. Could expand this in the future to analyze state of entire queue if needed.

Returns: boolean indicating self-refresh exit should be scheduled

Definition at line 1833 of file dram_interface.cc.

◆ inPwrIdleState()

bool gem5::memory::DRAMInterface::Rank::inPwrIdleState ( ) const

inline

Check if the current rank has all banks closed and is not in a low power state.

Parameters

Return true if the rank is idle from a bank and power point of view

Definition at line 384 of file dram_interface.hh.

References dram, gem5::memory::DRAMInterface::enableDRAMPowerdown, gem5::memory::DRAMInterface::PWR_IDLE, and pwrState.

◆ inRefIdleState()

bool gem5::memory::DRAMInterface::Rank::inRefIdleState ( ) const

inline

Check if there is no refresh and no preparation of refresh ongoing i.e.

the refresh state machine is in idle

Parameters

Return true if the rank is idle from a refresh point of view

Definition at line 374 of file dram_interface.hh.

References gem5::memory::DRAMInterface::REF_IDLE, and refreshState.

Referenced by gem5::memory::DRAMInterface::doBurstAccess(), and gem5::memory::DRAMInterface::respondEvent().

◆ isQueueEmpty()

bool gem5::memory::DRAMInterface::Rank::isQueueEmpty ( ) const

Check if the command queue of current rank is idle.

Parameters

Return true if the there are no commands in Q. Bus direction determines queue checked.

Definition at line 1181 of file dram_interface.cc.

Referenced by gem5::memory::DRAMInterface::respondEvent().

◆ name()

const std::string gem5::memory::DRAMInterface::Rank::name ( ) const

inline

Definition at line 353 of file dram_interface.hh.

References gem5::csprintf(), and rank.

◆ powerDownSleep()

void gem5::memory::DRAMInterface::Rank::powerDownSleep	(	PowerState	pwr_state,
		Tick	tick )

Schedule a transition to power-down (sleep)

Parameters

pwr_state	Power state to transition to
tick	Absolute tick when transition should take place

Definition at line 1513 of file dram_interface.cc.

References gem5::divCeil(), DPRINTF, gem5::memory::DRAMInterface::PWR_ACT_PDN, gem5::memory::DRAMInterface::PWR_PRE_PDN, gem5::memory::DRAMInterface::PWR_REF, gem5::memory::DRAMInterface::PWR_SREF, and gem5::Clocked::tick.

Referenced by gem5::memory::DRAMInterface::respondEvent().

◆ processActivateEvent()

void gem5::memory::DRAMInterface::Rank::processActivateEvent ( )

Definition at line 1235 of file dram_interface.cc.

References gem5::curTick(), and gem5::memory::DRAMInterface::PWR_ACT.

◆ processPowerEvent()

void gem5::memory::DRAMInterface::Rank::processPowerEvent ( )

Definition at line 1634 of file dram_interface.cc.

◆ processPrechargeEvent()

void gem5::memory::DRAMInterface::Rank::processPrechargeEvent ( )

Definition at line 1245 of file dram_interface.cc.

References gem5::curTick(), DPRINTF, gem5::memory::DRAMInterface::PWR_ACT, gem5::memory::DRAMInterface::PWR_IDLE, and gem5::memory::DRAMInterface::PWR_PRE_PDN.

◆ processRefreshEvent()

void gem5::memory::DRAMInterface::Rank::processRefreshEvent ( )

◆ processWakeUpEvent()

void gem5::memory::DRAMInterface::Rank::processWakeUpEvent ( )

Definition at line 1616 of file dram_interface.cc.

References gem5::curTick(), gem5::memory::DRAMInterface::PWR_ACT, gem5::memory::DRAMInterface::PWR_ACT_PDN, gem5::memory::DRAMInterface::PWR_IDLE, gem5::memory::DRAMInterface::PWR_PRE_PDN, and gem5::memory::DRAMInterface::PWR_SREF.

◆ processWriteDoneEvent()

void gem5::memory::DRAMInterface::Rank::processWriteDoneEvent ( )

Definition at line 1276 of file dram_interface.cc.

Referenced by Rank().

◆ resetStats()

void gem5::memory::DRAMInterface::Rank::resetStats ( )

Reset stats on a stats event.

Definition at line 1823 of file dram_interface.cc.

References gem5::curTick(), and gem5::divCeil().

◆ schedulePowerEvent()

void gem5::memory::DRAMInterface::Rank::schedulePowerEvent	(	PowerState	pwr_state,
		Tick	tick )

private

Schedule a power state transition in the future, and potentially override an already scheduled transition.

Parameters

pwr_state	Power state to transition to
tick	Tick when transition should take place

Definition at line 1492 of file dram_interface.cc.

References gem5::curTick(), DPRINTF, panic, gem5::EventManager::schedule(), and gem5::Clocked::tick.

◆ scheduleWakeUpEvent()

void gem5::memory::DRAMInterface::Rank::scheduleWakeUpEvent ( Tick exit_delay )

schedule and event to wake-up from power-down or self-refresh and update bank timing parameters

Parameters

exit_delay Relative tick defining the delay required between low-power exit and the next command

Definition at line 1564 of file dram_interface.cc.

References gem5::ArmISA::b, gem5::curTick(), gem5::divCeil(), DPRINTF, gem5::memory::DRAMInterface::PWR_ACT_PDN, gem5::memory::DRAMInterface::PWR_IDLE, gem5::memory::DRAMInterface::PWR_PRE_PDN, gem5::memory::DRAMInterface::PWR_SREF, gem5::memory::DRAMInterface::REF_PD_EXIT, and gem5::EventManager::schedule().

Referenced by gem5::memory::DRAMInterface::doBurstAccess().

◆ startup()

void gem5::memory::DRAMInterface::Rank::startup ( Tick ref_tick )

Kick off accounting for power and refresh states and schedule initial refresh.

Parameters

ref_tick Tick for first refresh

Definition at line 1157 of file dram_interface.cc.

References gem5::curTick(), and gem5::EventManager::schedule().

◆ suspend()

void gem5::memory::DRAMInterface::Rank::suspend ( )

Stop the refresh events.

Definition at line 1169 of file dram_interface.cc.

References gem5::EventManager::deschedule(), and gem5::memory::DRAMInterface::PWR_IDLE.

◆ updatePowerStats()

void gem5::memory::DRAMInterface::Rank::updatePowerStats ( )

private

Function to update Power Stats.

Definition at line 1767 of file dram_interface.cc.

References gem5::curTick(), gem5::divCeil(), gem5::sim_clock::Frequency, and gem5::memory::DRAMInterface::stats.

Member Data Documentation

◆ activateEvent

EventFunctionWrapper gem5::memory::DRAMInterface::Rank::activateEvent

Definition at line 461 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::activateBank(), and gem5::memory::DRAMInterface::respondEvent().

◆ actTicks

std::deque<Tick> gem5::memory::DRAMInterface::Rank::actTicks

List to keep track of activate ticks.

Definition at line 343 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::activateBank().

◆ banks

std::vector<Bank> gem5::memory::DRAMInterface::Rank::banks

Vector of Banks.

Each rank is made of several devices which in term are made from several banks.

Definition at line 334 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::activateBank(), gem5::memory::DRAMInterface::doBurstAccess(), and gem5::memory::DRAMInterface::prechargeBank().

◆ cmdList

std::vector<Command> gem5::memory::DRAMInterface::Rank::cmdList

List of commands issued, to be sent to DRAMPpower at refresh and stats dump.

Keep commands here since commands to different banks are added out of order. Will only pass commands up to curTick() to DRAMPower after sorting.

Definition at line 328 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::activateBank(), gem5::memory::DRAMInterface::doBurstAccess(), and gem5::memory::DRAMInterface::prechargeBank().

◆ dram

DRAMInterface& gem5::memory::DRAMInterface::Rank::dram

private

A reference to the parent DRAMInterface instance.

Definition at line 236 of file dram_interface.hh.

Referenced by inPwrIdleState().

◆ inLowPowerState

bool gem5::memory::DRAMInterface::Rank::inLowPowerState

rank is in or transitioning to power-down or self-refresh

Definition at line 288 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::doBurstAccess().

◆ lastBurstTick

Tick gem5::memory::DRAMInterface::Rank::lastBurstTick

Track when we issued the last read/write burst.

Definition at line 348 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::doBurstAccess().

◆ numBanksActive

unsigned int gem5::memory::DRAMInterface::Rank::numBanksActive

To track number of banks which are currently active for this rank.

Definition at line 340 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::activateBank(), and gem5::memory::DRAMInterface::prechargeBank().

◆ outstandingEvents

uint8_t gem5::memory::DRAMInterface::Rank::outstandingEvents

Number of ACT, RD, and WR events currently scheduled Incremented when a refresh event is started as well Used to determine when a low-power state can be entered.

Definition at line 310 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::doBurstAccess(), gem5::memory::DRAMInterface::prechargeBank(), and gem5::memory::DRAMInterface::respondEvent().

◆ power

DRAMPower gem5::memory::DRAMInterface::Rank::power

One DRAMPower instance per rank.

Definition at line 320 of file dram_interface.hh.

◆ powerEvent

EventFunctionWrapper gem5::memory::DRAMInterface::Rank::powerEvent

Definition at line 470 of file dram_interface.hh.

◆ prechargeEvent

EventFunctionWrapper gem5::memory::DRAMInterface::Rank::prechargeEvent

Definition at line 464 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::checkRefreshState(), gem5::memory::DRAMInterface::prechargeBank(), and gem5::memory::DRAMInterface::respondEvent().

◆ pwrState

PowerState gem5::memory::DRAMInterface::Rank::pwrState

Current power state.

Definition at line 278 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::doBurstAccess(), inPwrIdleState(), and gem5::memory::DRAMInterface::respondEvent().

◆ pwrStatePostRefresh

PowerState gem5::memory::DRAMInterface::Rank::pwrStatePostRefresh

private

Previous low-power state, which will be re-entered after refresh.

Definition at line 247 of file dram_interface.hh.

◆ pwrStateTick

Tick gem5::memory::DRAMInterface::Rank::pwrStateTick

private

Track when we transitioned to the current power state.

Definition at line 252 of file dram_interface.hh.

◆ pwrStateTrans

PowerState gem5::memory::DRAMInterface::Rank::pwrStateTrans

private

Since we are taking decisions out of order, we need to keep track of what power transition is happening at what time.

Definition at line 242 of file dram_interface.hh.

◆ rank

uint8_t gem5::memory::DRAMInterface::Rank::rank

Current Rank index.

Definition at line 293 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::activateBank(), name(), and gem5::memory::DRAMInterface::prechargeBank().

◆ readEntries

uint32_t gem5::memory::DRAMInterface::Rank::readEntries

Track number of packets in read queue going to this rank.

Definition at line 298 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::respondEvent().

◆ refreshDueAt

Tick gem5::memory::DRAMInterface::Rank::refreshDueAt

private

Keep track of when a refresh is due.

Definition at line 257 of file dram_interface.hh.

◆ refreshEvent

EventFunctionWrapper gem5::memory::DRAMInterface::Rank::refreshEvent

Definition at line 467 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::checkRefreshState().

◆ refreshState

RefreshState gem5::memory::DRAMInterface::Rank::refreshState

current refresh state

Definition at line 283 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::checkRefreshState(), and inRefIdleState().

◆ stats

RankStats gem5::memory::DRAMInterface::Rank::stats

protected

Definition at line 476 of file dram_interface.hh.

◆ wakeUpAllowedAt

Tick gem5::memory::DRAMInterface::Rank::wakeUpAllowedAt

delay low-power exit until this requirement is met

Definition at line 315 of file dram_interface.hh.

◆ wakeUpEvent

EventFunctionWrapper gem5::memory::DRAMInterface::Rank::wakeUpEvent

Definition at line 473 of file dram_interface.hh.

◆ writeDoneEvent

EventFunctionWrapper gem5::memory::DRAMInterface::Rank::writeDoneEvent

Definition at line 458 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::doBurstAccess().

◆ writeEntries

uint32_t gem5::memory::DRAMInterface::Rank::writeEntries

Track number of packets in write queue going to this rank.

Definition at line 303 of file dram_interface.hh.

Referenced by gem5::memory::DRAMInterface::doBurstAccess().

The documentation for this class was generated from the following files:

mem/dram_interface.hh
mem/dram_interface.cc

Public Member Functions

Public Attributes

Protected Attributes

Private Member Functions

Private Attributes

Detailed Description

Constructor & Destructor Documentation

◆ Rank()

Member Function Documentation

◆ checkDrainDone()

◆ computeStats()

◆ flushCmdList()

◆ forceSelfRefreshExit()

◆ inPwrIdleState()

◆ inRefIdleState()

◆ isQueueEmpty()

◆ name()

◆ powerDownSleep()

◆ processActivateEvent()

◆ processPowerEvent()

◆ processPrechargeEvent()

◆ processRefreshEvent()

◆ processWakeUpEvent()

◆ processWriteDoneEvent()

◆ resetStats()

◆ schedulePowerEvent()

◆ scheduleWakeUpEvent()

◆ startup()

◆ suspend()

◆ updatePowerStats()

Member Data Documentation

◆ activateEvent

◆ actTicks

◆ banks

◆ cmdList

◆ dram

◆ inLowPowerState

◆ lastBurstTick

◆ numBanksActive

◆ outstandingEvents

◆ power

◆ powerEvent

◆ prechargeEvent

◆ pwrState

◆ pwrStatePostRefresh

◆ pwrStateTick

◆ pwrStateTrans

◆ rank

◆ readEntries

◆ refreshDueAt

◆ refreshEvent

◆ refreshState

◆ stats

◆ wakeUpAllowedAt

◆ wakeUpEvent

◆ writeDoneEvent

◆ writeEntries