gem5  v22.0.0.2
Classes | Public Member Functions | Public Attributes | Protected Member Functions | Protected Attributes | List of all members
gem5::minor::Fetch2 Class Reference

This stage receives lines of data from Fetch1, separates them into instructions and passes them to Decode. More...

#include <fetch2.hh>

Inheritance diagram for gem5::minor::Fetch2:
gem5::Named

Classes

struct  Fetch2Stats
 
struct  Fetch2ThreadInfo
 Data members after this line are cycle-to-cycle state. More...
 

Public Member Functions

 Fetch2 (const std::string &name, MinorCPU &cpu_, const BaseMinorCPUParams &params, Latch< ForwardLineData >::Output inp_, Latch< BranchData >::Output branchInp_, Latch< BranchData >::Input predictionOut_, Latch< ForwardInstData >::Input out_, std::vector< InputBuffer< ForwardInstData >> &next_stage_input_buffer)
 
void evaluate ()
 Pass on input/buffer data to the output if you can. More...
 
void minorTrace () const
 
bool isDrained ()
 Is this stage drained? For Fetch2, draining is initiated by Execute halting Fetch1 causing Fetch2 to naturally drain. More...
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 

Public Attributes

std::vector< InputBuffer< ForwardLineData > > inputBuffer
 

Protected Member Functions

const ForwardLineDatagetInput (ThreadID tid)
 Get a piece of data to work on from the inputBuffer, or 0 if there is no data. More...
 
void popInput (ThreadID tid)
 Pop an element off the input buffer, if there are any. More...
 
void dumpAllInput (ThreadID tid)
 Dump the whole contents of the input buffer. More...
 
void updateBranchPrediction (const BranchData &branch)
 Update local branch prediction structures from feedback from Execute. More...
 
void predictBranch (MinorDynInstPtr inst, BranchData &branch)
 Predicts branches for the given instruction. More...
 
ThreadID getScheduledThread ()
 Use the current threading policy to determine the next thread to fetch from. More...
 

Protected Attributes

MinorCPUcpu
 Pointer back to the containing CPU. More...
 
Latch< ForwardLineData >::Output inp
 Input port carrying lines from Fetch1. More...
 
Latch< BranchData >::Output branchInp
 Input port carrying branches from Execute. More...
 
Latch< BranchData >::Input predictionOut
 Output port carrying predictions back to Fetch1. More...
 
Latch< ForwardInstData >::Input out
 Output port carrying instructions into Decode. More...
 
std::vector< InputBuffer< ForwardInstData > > & nextStageReserve
 Interface to reserve space in the next stage. More...
 
unsigned int outputWidth
 Width of output of this stage/input of next in instructions. More...
 
bool processMoreThanOneInput
 If true, more than one input word can be processed each cycle if there is room in the output to contain its processed data. More...
 
branch_prediction::BPredUnitbranchPredictor
 Branch predictor passed from Python configuration. More...
 
std::vector< Fetch2ThreadInfofetchInfo
 
ThreadID threadPriority
 
gem5::minor::Fetch2::Fetch2Stats stats
 

Detailed Description

This stage receives lines of data from Fetch1, separates them into instructions and passes them to Decode.

Definition at line 66 of file fetch2.hh.

Constructor & Destructor Documentation

◆ Fetch2()

gem5::minor::Fetch2::Fetch2 ( const std::string &  name,
MinorCPU cpu_,
const BaseMinorCPUParams &  params,
Latch< ForwardLineData >::Output  inp_,
Latch< BranchData >::Output  branchInp_,
Latch< BranchData >::Input  predictionOut_,
Latch< ForwardInstData >::Input  out_,
std::vector< InputBuffer< ForwardInstData >> &  next_stage_input_buffer 
)

Definition at line 59 of file fetch2.cc.

References fatal, inputBuffer, gem5::Named::name(), outputWidth, and sc_dt::to_string().

Member Function Documentation

◆ dumpAllInput()

void gem5::minor::Fetch2::dumpAllInput ( ThreadID  tid)
protected

Dump the whole contents of the input buffer.

Useful after a prediction changes control flow

Definition at line 120 of file fetch2.cc.

References DPRINTF, fetchInfo, inputBuffer, and popInput().

Referenced by evaluate().

◆ evaluate()

void gem5::minor::Fetch2::evaluate ( )

Pass on input/buffer data to the output if you can.

Reserve a slot in the next stage and output data

Definition at line 240 of file fetch2.cc.

References gem5::ActivityRecorder::activateStage(), gem5::ActivityRecorder::activity(), gem5::MinorCPU::activityRecorder, gem5::StaticInst::advancePC(), gem5::minor::Fetch2::Fetch2Stats::amoInstructions, gem5::minor::Fetch2::Fetch2ThreadInfo::blocked, branchInp, cpu, decoder, DPRINTF, dumpAllInput(), gem5::minor::Fetch2::Fetch2ThreadInfo::expectedStreamSeqNum, gem5::minor::ForwardLineData::fault, gem5::minor::Pipeline::Fetch2StageId, fetchInfo, gem5::minor::Fetch2::Fetch2ThreadInfo::fetchSeqNum, gem5::minor::Fetch2::Fetch2Stats::fpInstructions, gem5::ThreadContext::getDecoderPtr(), getInput(), getScheduledThread(), gem5::minor::Fetch2::Fetch2ThreadInfo::havePC, gem5::ArmISA::i, gem5::minor::ForwardLineData::id, inp, inputBuffer, gem5::minor::Fetch2::Fetch2ThreadInfo::inputIndex, gem5::minor::ForwardInstData::insts, gem5::minor::Fetch2::Fetch2Stats::intInstructions, gem5::InvalidThreadID, gem5::StaticInst::isAtomic(), gem5::minor::BranchData::isBubble(), gem5::minor::ForwardInstData::isBubble(), gem5::minor::ForwardLineData::isFault(), gem5::StaticInst::isFloating(), gem5::StaticInst::isInteger(), gem5::StaticInst::isLoad(), gem5::StaticInst::isStore(), gem5::minor::BranchData::isStreamChange(), gem5::StaticInst::isVector(), gem5::minor::Fetch2::Fetch2ThreadInfo::lastStreamSeqNum, gem5::minor::ForwardLineData::line, gem5::minor::ForwardLineData::lineBaseAddr, gem5::minor::ForwardLineData::lineWidth, gem5::minor::Fetch2::Fetch2Stats::loadInstructions, nextStageReserve, gem5::nullStaticInstPtr, out, outputWidth, gem5::minor::Fetch2::Fetch2ThreadInfo::pc, gem5::minor::ForwardLineData::pc, popInput(), predictBranch(), predictionOut, gem5::minor::InstId::predictionSeqNum, gem5::minor::Fetch2::Fetch2ThreadInfo::predictionSeqNum, processMoreThanOneInput, gem5::minor::ForwardInstData::resize(), gem5::ArmISA::set, stats, gem5::minor::Fetch2::Fetch2Stats::storeInstructions, gem5::minor::InstId::streamSeqNum, gem5::minor::InstId::threadId, gem5::minor::BranchData::threadId, gem5::minor::ForwardInstData::threadId, gem5::MinorCPU::threads, updateBranchPrediction(), and gem5::minor::Fetch2::Fetch2Stats::vecInstructions.

Referenced by gem5::minor::Pipeline::evaluate().

◆ getInput()

const ForwardLineData * gem5::minor::Fetch2::getInput ( ThreadID  tid)
protected

Get a piece of data to work on from the inputBuffer, or 0 if there is no data.

Definition at line 98 of file fetch2.cc.

References inputBuffer.

Referenced by evaluate(), and getScheduledThread().

◆ getScheduledThread()

ThreadID gem5::minor::Fetch2::getScheduledThread ( )
inlineprotected

Use the current threading policy to determine the next thread to fetch from.

Definition at line 563 of file fetch2.cc.

References cpu, fetchInfo, getInput(), gem5::InvalidThreadID, panic, gem5::auxv::Random, gem5::MinorCPU::randomPriority(), gem5::MinorCPU::roundRobinPriority(), gem5::MinorCPU::threadPolicy, and threadPriority.

Referenced by evaluate().

◆ isDrained()

bool gem5::minor::Fetch2::isDrained ( )

Is this stage drained? For Fetch2, draining is initiated by Execute halting Fetch1 causing Fetch2 to naturally drain.

Branch predictions are ignored by Fetch1 during halt

Definition at line 593 of file fetch2.cc.

References inp, inputBuffer, and predictionOut.

Referenced by gem5::minor::Pipeline::isDrained().

◆ minorTrace()

void gem5::minor::Fetch2::minorTrace ( ) const

Definition at line 634 of file fetch2.cc.

References data, fetchInfo, inputBuffer, gem5::minor::minorTrace(), and out.

Referenced by gem5::minor::Pipeline::minorTrace().

◆ popInput()

void gem5::minor::Fetch2::popInput ( ThreadID  tid)
protected

Pop an element off the input buffer, if there are any.

Definition at line 109 of file fetch2.cc.

References fetchInfo, and inputBuffer.

Referenced by dumpAllInput(), and evaluate().

◆ predictBranch()

void gem5::minor::Fetch2::predictBranch ( MinorDynInstPtr  inst,
BranchData branch 
)
protected

Predicts branches for the given instruction.

Updates the instruction's predicted... fields and also the branch which carries the prediction to Fetch1

Definition at line 192 of file fetch2.cc.

References gem5::minor::BranchData::BranchPrediction, branchPredictor, DPRINTF, gem5::minor::Fetch2::Fetch2ThreadInfo::expectedStreamSeqNum, fetchInfo, gem5::branch_prediction::BPredUnit::predict(), gem5::minor::Fetch2::Fetch2ThreadInfo::predictionSeqNum, gem5::ArmISA::set, and gem5::minor::BranchData::target.

Referenced by evaluate().

◆ updateBranchPrediction()

void gem5::minor::Fetch2::updateBranchPrediction ( const BranchData branch)
protected

Member Data Documentation

◆ branchInp

Latch<BranchData>::Output gem5::minor::Fetch2::branchInp
protected

Input port carrying branches from Execute.

This is a snoop of the data provided to F1.

Definition at line 77 of file fetch2.hh.

Referenced by evaluate().

◆ branchPredictor

branch_prediction::BPredUnit& gem5::minor::Fetch2::branchPredictor
protected

Branch predictor passed from Python configuration.

Definition at line 96 of file fetch2.hh.

Referenced by predictBranch(), and updateBranchPrediction().

◆ cpu

MinorCPU& gem5::minor::Fetch2::cpu
protected

Pointer back to the containing CPU.

Definition at line 70 of file fetch2.hh.

Referenced by evaluate(), and getScheduledThread().

◆ fetchInfo

std::vector<Fetch2ThreadInfo> gem5::minor::Fetch2::fetchInfo
protected

◆ inp

Latch<ForwardLineData>::Output gem5::minor::Fetch2::inp
protected

Input port carrying lines from Fetch1.

Definition at line 73 of file fetch2.hh.

Referenced by evaluate(), and isDrained().

◆ inputBuffer

std::vector<InputBuffer<ForwardLineData> > gem5::minor::Fetch2::inputBuffer

Definition at line 100 of file fetch2.hh.

Referenced by dumpAllInput(), evaluate(), Fetch2(), getInput(), isDrained(), minorTrace(), and popInput().

◆ nextStageReserve

std::vector<InputBuffer<ForwardInstData> >& gem5::minor::Fetch2::nextStageReserve
protected

Interface to reserve space in the next stage.

Definition at line 86 of file fetch2.hh.

Referenced by evaluate().

◆ out

Latch<ForwardInstData>::Input gem5::minor::Fetch2::out
protected

Output port carrying instructions into Decode.

Definition at line 83 of file fetch2.hh.

Referenced by evaluate(), and minorTrace().

◆ outputWidth

unsigned int gem5::minor::Fetch2::outputWidth
protected

Width of output of this stage/input of next in instructions.

Definition at line 89 of file fetch2.hh.

Referenced by evaluate(), and Fetch2().

◆ predictionOut

Latch<BranchData>::Input gem5::minor::Fetch2::predictionOut
protected

Output port carrying predictions back to Fetch1.

Definition at line 80 of file fetch2.hh.

Referenced by evaluate(), and isDrained().

◆ processMoreThanOneInput

bool gem5::minor::Fetch2::processMoreThanOneInput
protected

If true, more than one input word can be processed each cycle if there is room in the output to contain its processed data.

Definition at line 93 of file fetch2.hh.

Referenced by evaluate().

◆ stats

gem5::minor::Fetch2::Fetch2Stats gem5::minor::Fetch2::stats
protected

Referenced by evaluate().

◆ threadPriority

ThreadID gem5::minor::Fetch2::threadPriority
protected

Definition at line 162 of file fetch2.hh.

Referenced by getScheduledThread().


The documentation for this class was generated from the following files:

Generated on Thu Jul 28 2022 13:34:09 for gem5 by doxygen 1.8.17