gem5  v21.1.0.2
pipeline.hh
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37 
45 #ifndef __CPU_MINOR_PIPELINE_HH__
46 #define __CPU_MINOR_PIPELINE_HH__
47 
48 #include "cpu/minor/activity.hh"
49 #include "cpu/minor/cpu.hh"
50 #include "cpu/minor/decode.hh"
51 #include "cpu/minor/execute.hh"
52 #include "cpu/minor/fetch1.hh"
53 #include "cpu/minor/fetch2.hh"
54 #include "params/MinorCPU.hh"
55 #include "sim/ticked_object.hh"
56 
57 namespace gem5
58 {
59 
61 namespace minor
62 {
63 
73 class Pipeline : public Ticked
74 {
75  protected:
77 
80 
86 
91 
96 
97  public:
99  enum StageId
100  {
101  /* A stage representing wakeup of the whole processor */
103  /* Real pipeline stages */
105  Num_StageId /* Stage count */
106  };
107 
110 
111  public:
112  Pipeline(MinorCPU &cpu_, const MinorCPUParams &params);
113 
114  public:
117  void wakeupFetch(ThreadID tid);
118 
120  bool drain();
121 
122  void drainResume();
123 
125  bool isDrained();
126 
129  void evaluate() override;
130 
131  void minorTrace() const;
132 
140 
143 };
144 
145 } // namespace minor
146 } // namespace gem5
147 
148 #endif /* __CPU_MINOR_PIPELINE_HH__ */
gem5::minor::Pipeline::Num_StageId
@ Num_StageId
Definition: pipeline.hh:105
gem5::minor::Pipeline::wakeupFetch
void wakeupFetch(ThreadID tid)
Wake up the Fetch unit.
Definition: pipeline.cc:196
gem5::minor::Pipeline::isDrained
bool isDrained()
Test to see if the CPU is drained.
Definition: pipeline.cc:230
gem5::minor::Pipeline::f2ToD
Latch< ForwardInstData > f2ToD
Definition: pipeline.hh:83
gem5::minor::MinorActivityRecorder
ActivityRecorder with a Ticked interface.
Definition: activity.hh:58
gem5::minor::Pipeline::execute
Execute execute
Definition: pipeline.hh:87
gem5::minor::Pipeline::Pipeline
Pipeline(MinorCPU &cpu_, const MinorCPUParams &params)
Definition: pipeline.cc:58
gem5::MinorCPU::MinorCPUPort
Provide a non-protected base class for Minor's Ports as derived classes are created by Fetch1 and Exe...
Definition: cpu.hh:106
cpu.hh
minor
gem5::MinorCPU
MinorCPU is an in-order CPU model with four fixed pipeline stages:
Definition: cpu.hh:85
gem5::Ticked
Ticked attaches gem5's event queue/scheduler to evaluate calls and provides a start/stop interface to...
Definition: ticked_object.hh:61
gem5::minor::Fetch2
This stage receives lines of data from Fetch1, separates them into instructions and passes them to De...
Definition: fetch2.hh:66
gem5::minor::Pipeline::fetch1
Fetch1 fetch1
Definition: pipeline.hh:90
gem5::minor::Pipeline::eToF1
Latch< BranchData > eToF1
Definition: pipeline.hh:85
execute.hh
gem5::minor::Pipeline::Fetch1StageId
@ Fetch1StageId
Definition: pipeline.hh:104
fetch2.hh
gem5::minor::Pipeline::drain
bool drain()
Try to drain the CPU.
Definition: pipeline.cc:202
decode.hh
gem5::minor::Pipeline::ExecuteStageId
@ ExecuteStageId
Definition: pipeline.hh:104
gem5::minor::Pipeline::f1ToF2
Latch< ForwardLineData > f1ToF2
Definition: pipeline.hh:81
gem5::minor::Pipeline::cpu
MinorCPU & cpu
Definition: pipeline.hh:76
gem5::minor::Pipeline::StageId
StageId
Enumerated ids of the 'stages' for the activity recorder.
Definition: pipeline.hh:99
gem5::minor::Pipeline::minorTrace
void minorTrace() const
Definition: pipeline.cc:111
gem5::minor::Fetch1
A stage responsible for fetching "lines" from memory and passing them to Fetch2.
Definition: fetch1.hh:67
gem5::minor::Pipeline::CPUStageId
@ CPUStageId
Definition: pipeline.hh:102
gem5::minor::Pipeline::getActivityRecorder
MinorActivityRecorder * getActivityRecorder()
To give the activity recorder to the CPU.
Definition: pipeline.hh:142
gem5::minor::Pipeline::fetch2
Fetch2 fetch2
Definition: pipeline.hh:89
gem5::minor::Pipeline
The constructed pipeline.
Definition: pipeline.hh:73
gem5::minor::Latch
Wraps a MinorBuffer with Input/Output interfaces to ensure that units within the model can only see t...
Definition: buffers.hh:222
gem5::minor::Pipeline::evaluate
void evaluate() override
A custom evaluate allows report in the right place (between stages and pipeline advance)
Definition: pipeline.cc:126
gem5::minor::Pipeline::Fetch2StageId
@ Fetch2StageId
Definition: pipeline.hh:104
gem5::minor::Pipeline::activityRecorder
MinorActivityRecorder activityRecorder
Activity recording for the pipeline.
Definition: pipeline.hh:95
gem5::GEM5_DEPRECATED_NAMESPACE
GEM5_DEPRECATED_NAMESPACE(GuestABI, guest_abi)
gem5::minor::Pipeline::drainResume
void drainResume()
Definition: pipeline.cc:218
gem5::minor::Pipeline::dToE
Latch< ForwardInstData > dToE
Definition: pipeline.hh:84
ticked_object.hh
gem5::minor::Pipeline::allow_idling
bool allow_idling
Allow cycles to be skipped when the pipeline is idle.
Definition: pipeline.hh:79
gem5::minor::Execute
Execute stage.
Definition: execute.hh:68
gem5::minor::Pipeline::f2ToF1
Latch< BranchData > f2ToF1
Definition: pipeline.hh:82
gem5::minor::Pipeline::DecodeStageId
@ DecodeStageId
Definition: pipeline.hh:104
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::minor::Pipeline::getInstPort
MinorCPU::MinorCPUPort & getInstPort()
Functions below here are BaseCPU operations passed on to pipeline stages.
Definition: pipeline.cc:184
activity.hh
gem5::minor::Pipeline::getDataPort
MinorCPU::MinorCPUPort & getDataPort()
Return the DcachePort belonging to Execute for the CPU.
Definition: pipeline.cc:190
fetch1.hh
gem5::minor::Pipeline::needToSignalDrained
bool needToSignalDrained
True after drain is called but draining isn't complete.
Definition: pipeline.hh:109
gem5::ThreadID
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:242
gem5::minor::Decode
Definition: decode.hh:67
gem5::minor::Pipeline::decode
Decode decode
Definition: pipeline.hh:88

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