gem5  v21.1.0.2
Classes | Public Member Functions | Public Attributes | Protected Member Functions | Protected Attributes | List of all members
gem5::MinorCPU Class Reference

MinorCPU is an in-order CPU model with four fixed pipeline stages: More...

#include <cpu.hh>

Inheritance diagram for gem5::MinorCPU:
gem5::BaseCPU gem5::ClockedObject gem5::SimObject gem5::Clocked gem5::EventManager gem5::Serializable gem5::Drainable gem5::statistics::Group gem5::Named

Classes

class  MinorCPUPort
 Provide a non-protected base class for Minor's Ports as derived classes are created by Fetch1 and Execute. More...
 

Public Member Functions

 MinorCPU (const MinorCPUParams &params)
 
 ~MinorCPU ()
 
void init () override
 Starting, waking and initialisation. More...
 
void startup () override
 startup() is the final initialization call before simulation. More...
 
void wakeup (ThreadID tid) override
 
void regStats () override
 Stats interface from SimObject (by way of BaseCPU) More...
 
Counter totalInsts () const override
 Simple inst count interface from BaseCPU. More...
 
Counter totalOps () const override
 
void serializeThread (CheckpointOut &cp, ThreadID tid) const override
 Serialize a single thread. More...
 
void unserializeThread (CheckpointIn &cp, ThreadID tid) override
 Unserialize one thread. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize pipeline data. More...
 
void unserialize (CheckpointIn &cp) override
 Reconstruct the state of this object from a checkpoint. More...
 
DrainState drain () override
 Drain interface. More...
 
void drainResume () override
 Resume execution after a successful drain. More...
 
void signalDrainDone ()
 Signal from Pipeline that MinorCPU should signal that a drain is complete and set its drainState. More...
 
void memWriteback () override
 Write back dirty buffers to memory using functional writes. More...
 
void switchOut () override
 Switching interface from BaseCPU. More...
 
void takeOverFrom (BaseCPU *old_cpu) override
 Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in. More...
 
void activateContext (ThreadID thread_id) override
 Thread activation interface from BaseCPU. More...
 
void suspendContext (ThreadID thread_id) override
 Notify the CPU that the indicated context is now suspended. More...
 
std::vector< ThreadIDroundRobinPriority (ThreadID priority)
 Thread scheduling utility functions. More...
 
std::vector< ThreadIDrandomPriority ()
 
void tick ()
 The tick method in the MinorCPU is simply updating the cycle counters as the ticking of the pipeline stages is already handled by the Pipeline object. More...
 
void wakeupOnEvent (unsigned int stage_id)
 Interface for stages to signal that they have become active after a callback or eventq event where the pipeline itself may have already been idled. More...
 
- Public Member Functions inherited from gem5::BaseCPU
int cpuId () const
 Reads this CPU's ID. More...
 
uint32_t socketId () const
 Reads this CPU's Socket ID. More...
 
RequestorID dataRequestorId () const
 Reads this CPU's unique data requestor ID. More...
 
RequestorID instRequestorId () const
 Reads this CPU's unique instruction requestor ID. More...
 
PortgetPort (const std::string &if_name, PortID idx=InvalidPortID) override
 Get a port on this CPU. More...
 
uint32_t taskId () const
 Get cpu task id. More...
 
void taskId (uint32_t id)
 Set cpu task id. More...
 
uint32_t getPid () const
 
void setPid (uint32_t pid)
 
void workItemBegin ()
 
void workItemEnd ()
 
Tick instCount ()
 
BaseInterruptsgetInterruptController (ThreadID tid)
 
void postInterrupt (ThreadID tid, int int_num, int index)
 
void clearInterrupt (ThreadID tid, int int_num, int index)
 
void clearInterrupts (ThreadID tid)
 
bool checkInterrupts (ThreadID tid) const
 
Trace::InstTracergetTracer ()
 Provide access to the tracer pointer. More...
 
virtual void haltContext (ThreadID thread_num)
 Notify the CPU that the indicated context is now halted. More...
 
int findContext (ThreadContext *tc)
 Given a Thread Context pointer return the thread num. More...
 
virtual ThreadContextgetContext (int tn)
 Given a thread num get tho thread context for it. More...
 
unsigned numContexts ()
 Get the number of thread contexts available. More...
 
ThreadID contextToThread (ContextID cid)
 Convert ContextID to threadID. More...
 
 PARAMS (BaseCPU)
 
 BaseCPU (const Params &params, bool is_checker=false)
 
virtual ~BaseCPU ()
 
void regProbePoints () override
 Register probe points for this object. More...
 
void registerThreadContexts ()
 
void deschedulePowerGatingEvent ()
 
void schedulePowerGatingEvent ()
 
void flushTLBs ()
 Flush all TLBs in the CPU. More...
 
bool switchedOut () const
 Determine if the CPU is switched out. More...
 
virtual void verifyMemoryMode () const
 Verify that the system is in a memory mode supported by the CPU. More...
 
unsigned int cacheLineSize () const
 Get the cache line size of the system. More...
 
void scheduleInstStop (ThreadID tid, Counter insts, const char *cause)
 Schedule an event that exits the simulation loops after a predefined number of instructions. More...
 
uint64_t getCurrentInstCount (ThreadID tid)
 Get the number of instructions executed by the specified thread on this CPU. More...
 
void traceFunctions (Addr pc)
 
void armMonitor (ThreadID tid, Addr address)
 
bool mwait (ThreadID tid, PacketPtr pkt)
 
void mwaitAtomic (ThreadID tid, ThreadContext *tc, BaseMMU *mmu)
 
AddressMonitorgetCpuAddrMonitor (ThreadID tid)
 
virtual void probeInstCommit (const StaticInstPtr &inst, Addr pc)
 Helper method to trigger PMU probes for a committed instruction. More...
 
- Public Member Functions inherited from gem5::ClockedObject
 ClockedObject (const ClockedObjectParams &p)
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::SimObject
const Paramsparams () const
 
 SimObject (const Params &p)
 
virtual ~SimObject ()
 
virtual void loadState (CheckpointIn &cp)
 loadState() is called on each SimObject when restoring from a checkpoint. More...
 
virtual void initState ()
 initState() is called on each SimObject when not restoring from a checkpoint. More...
 
virtual void regProbeListeners ()
 Register probe listeners for this object. More...
 
ProbeManagergetProbeManager ()
 Get the probe manager for this object. More...
 
DrainState drain () override
 Provide a default implementation of the drain interface for objects that don't need draining. More...
 
virtual void memInvalidate ()
 Invalidate the contents of memory buffers. More...
 
void serialize (CheckpointOut &cp) const override
 Serialize an object. More...
 
void unserialize (CheckpointIn &cp) override
 Unserialize an object. More...
 
- Public Member Functions inherited from gem5::EventManager
EventQueueeventQueue () const
 
void schedule (Event &event, Tick when)
 
void deschedule (Event &event)
 
void reschedule (Event &event, Tick when, bool always=false)
 
void schedule (Event *event, Tick when)
 
void deschedule (Event *event)
 
void reschedule (Event *event, Tick when, bool always=false)
 
void wakeupEventQueue (Tick when=(Tick) -1)
 This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...
 
void setCurTick (Tick newVal)
 
 EventManager (EventManager &em)
 Event manger manages events in the event queue. More...
 
 EventManager (EventManager *em)
 
 EventManager (EventQueue *eq)
 
- Public Member Functions inherited from gem5::Serializable
 Serializable ()
 
virtual ~Serializable ()
 
void serializeSection (CheckpointOut &cp, const char *name) const
 Serialize an object into a new section. More...
 
void serializeSection (CheckpointOut &cp, const std::string &name) const
 
void unserializeSection (CheckpointIn &cp, const char *name)
 Unserialize an a child object. More...
 
void unserializeSection (CheckpointIn &cp, const std::string &name)
 
- Public Member Functions inherited from gem5::Drainable
DrainState drainState () const
 Return the current drain state of an object. More...
 
virtual void notifyFork ()
 Notify a child process of a fork. More...
 
- Public Member Functions inherited from gem5::statistics::Group
 Group (Group *parent, const char *name=nullptr)
 Construct a new statistics group. More...
 
virtual ~Group ()
 
virtual void resetStats ()
 Callback to reset stats. More...
 
virtual void preDumpStats ()
 Callback before stats are dumped. More...
 
void addStat (statistics::Info *info)
 Register a stat with this group. More...
 
const std::map< std::string, Group * > & getStatGroups () const
 Get all child groups associated with this object. More...
 
const std::vector< Info * > & getStats () const
 Get all stats associated with this object. More...
 
void addStatGroup (const char *name, Group *block)
 Add a stat block as a child of this block. More...
 
const InforesolveStat (std::string name) const
 Resolve a stat by its name within this group. More...
 
void mergeStatGroup (Group *block)
 Merge the contents (stats & children) of a block to this block. More...
 
 Group ()=delete
 
 Group (const Group &)=delete
 
Groupoperator= (const Group &)=delete
 
- Public Member Functions inherited from gem5::Named
 Named (const std::string &name_)
 
virtual ~Named ()=default
 
virtual std::string name () const
 
- Public Member Functions inherited from gem5::Clocked
void updateClockPeriod ()
 Update the tick to the current tick. More...
 
Tick clockEdge (Cycles cycles=Cycles(0)) const
 Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...
 
Cycles curCycle () const
 Determine the current cycle, corresponding to a tick aligned to a clock edge. More...
 
Tick nextCycle () const
 Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...
 
uint64_t frequency () const
 
Tick clockPeriod () const
 
double voltage () const
 
Cycles ticksToCycles (Tick t) const
 
Tick cyclesToTicks (Cycles c) const
 

Public Attributes

minor::MinorActivityRecorderactivityRecorder
 Activity recording for pipeline. More...
 
std::vector< minor::MinorThread * > threads
 These are thread state-representing objects for this CPU. More...
 
enums::ThreadPolicy threadPolicy
 Thread Scheduling Policy (RoundRobin, Random, etc) More...
 
minor::MinorStats stats
 Processor-specific statistics. More...
 
EventFunctionWrapperfetchEventWrapper
 
- Public Attributes inherited from gem5::BaseCPU
ThreadID numThreads
 Number of threads we're actually simulating (<= SMT_MAX_THREADS). More...
 
Systemsystem
 
gem5::BaseCPU::BaseCPUStats baseStats
 
Cycles syscallRetryLatency
 
- Public Attributes inherited from gem5::ClockedObject
PowerStatepowerState
 

Protected Member Functions

PortgetDataPort () override
 Return a reference to the data port. More...
 
PortgetInstPort () override
 Return a reference to the instruction port. More...
 
- Protected Member Functions inherited from gem5::BaseCPU
void updateCycleCounters (CPUState state)
 base method keeping track of cycle progression More...
 
void enterPwrGating ()
 
probing::PMUUPtr pmuProbePoint (const char *name)
 Helper method to instantiate probe points belonging to this object. More...
 
- Protected Member Functions inherited from gem5::Drainable
 Drainable ()
 
virtual ~Drainable ()
 
void signalDrainDone () const
 Signal that an object is drained. More...
 
- Protected Member Functions inherited from gem5::Clocked
 Clocked (ClockDomain &clk_domain)
 Create a clocked object and set the clock domain based on the parameters. More...
 
 Clocked (Clocked &)=delete
 
Clockedoperator= (Clocked &)=delete
 
virtual ~Clocked ()
 Virtual destructor due to inheritance. More...
 
void resetClock () const
 Reset the object's clock using the current global tick value. More...
 
virtual void clockPeriodUpdated ()
 A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...
 

Protected Attributes

minor::Pipelinepipeline
 pipeline is a container for the clockable pipeline stage objects. More...
 
- Protected Attributes inherited from gem5::BaseCPU
Tick instCnt
 Instruction count used for SPARC misc register. More...
 
int _cpuId
 
const uint32_t _socketId
 Each cpu will have a socket ID that corresponds to its physical location in the system. More...
 
RequestorID _instRequestorId
 instruction side request id that must be placed in all requests More...
 
RequestorID _dataRequestorId
 data side request id that must be placed in all requests More...
 
uint32_t _taskId
 An intrenal representation of a task identifier within gem5. More...
 
uint32_t _pid
 The current OS process ID that is executing on this processor. More...
 
bool _switchedOut
 Is the CPU switched out or active? More...
 
const unsigned int _cacheLineSize
 Cache the cache line size that we get from the system. More...
 
std::vector< BaseInterrupts * > interrupts
 
std::vector< ThreadContext * > threadContexts
 
Trace::InstTracertracer
 
Cycles previousCycle
 
CPUState previousState
 
const Cycles pwrGatingLatency
 
const bool powerGatingOnIdle
 
EventFunctionWrapper enterPwrGatingEvent
 
probing::PMUUPtr ppRetiredInsts
 Instruction commit probe point. More...
 
probing::PMUUPtr ppRetiredInstsPC
 
probing::PMUUPtr ppRetiredLoads
 Retired load instructions. More...
 
probing::PMUUPtr ppRetiredStores
 Retired store instructions. More...
 
probing::PMUUPtr ppRetiredBranches
 Retired branches (any type) More...
 
probing::PMUUPtr ppAllCycles
 CPU cycle counter even if any thread Context is suspended. More...
 
probing::PMUUPtr ppActiveCycles
 CPU cycle counter, only counts if any thread contexts is active. More...
 
ProbePointArg< bool > * ppSleeping
 ProbePoint that signals transitions of threadContexts sets. More...
 
- Protected Attributes inherited from gem5::SimObject
const SimObjectParams & _params
 Cached copy of the object parameters. More...
 
- Protected Attributes inherited from gem5::EventManager
EventQueueeventq
 A pointer to this object's event queue. More...
 

Additional Inherited Members

- Public Types inherited from gem5::ClockedObject
using Params = ClockedObjectParams
 Parameters of ClockedObject. More...
 
- Public Types inherited from gem5::SimObject
typedef SimObjectParams Params
 
- Static Public Member Functions inherited from gem5::BaseCPU
static int numSimulatedCPUs ()
 
static Counter numSimulatedInsts ()
 
static Counter numSimulatedOps ()
 
- Static Public Member Functions inherited from gem5::SimObject
static void serializeAll (const std::string &cpt_dir)
 Create a checkpoint by serializing all SimObjects in the system. More...
 
static SimObjectfind (const char *name)
 Find the SimObject with the given name and return a pointer to it. More...
 
static void setSimObjectResolver (SimObjectResolver *resolver)
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
static SimObjectResolvergetSimObjectResolver ()
 There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...
 
- Static Public Member Functions inherited from gem5::Serializable
static const std::string & currentSection ()
 Gets the fully-qualified name of the active section. More...
 
static void generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
 Generate a checkpoint file so that the serialization can be routed to it. More...
 
- Static Public Attributes inherited from gem5::BaseCPU
static const uint32_t invldPid = std::numeric_limits<uint32_t>::max()
 Invalid or unknown Pid. More...
 
- Protected Types inherited from gem5::BaseCPU
enum  CPUState { CPU_STATE_ON, CPU_STATE_SLEEP, CPU_STATE_WAKEUP }
 
- Static Protected Attributes inherited from gem5::BaseCPU
static std::unique_ptr< GlobalStatsglobalStats
 Pointer to the global stat structure. More...
 

Detailed Description

MinorCPU is an in-order CPU model with four fixed pipeline stages:

Fetch1 - fetches lines from memory Fetch2 - decomposes lines into macro-op instructions Decode - decomposes macro-ops into micro-ops Execute - executes those micro-ops

This pipeline is carried in the MinorCPU::pipeline object. The exec_context interface is not carried by MinorCPU but by minor::ExecContext objects created by minor::Execute.

Definition at line 85 of file cpu.hh.

Constructor & Destructor Documentation

◆ MinorCPU()

gem5::MinorCPU::MinorCPU ( const MinorCPUParams &  params)

◆ ~MinorCPU()

gem5::MinorCPU::~MinorCPU ( )

Definition at line 87 of file cpu.cc.

References fetchEventWrapper, pipeline, and threads.

Member Function Documentation

◆ activateContext()

void gem5::MinorCPU::activateContext ( ThreadID  thread_id)
overridevirtual

◆ drain()

DrainState gem5::MinorCPU::drain ( )
overridevirtual

Drain interface.

Implements gem5::Drainable.

Definition at line 176 of file cpu.cc.

References gem5::BaseCPU::deschedulePowerGatingEvent(), DPRINTF, gem5::Drained, gem5::Draining, and gem5::BaseCPU::switchedOut().

◆ drainResume()

void gem5::MinorCPU::drainResume ( )
overridevirtual

Resume execution after a successful drain.

Reimplemented from gem5::Drainable.

Definition at line 207 of file cpu.cc.

References DPRINTF, fatal, gem5::System::isTimingMode(), gem5::BaseCPU::numThreads, gem5::BaseCPU::schedulePowerGatingEvent(), gem5::BaseCPU::switchedOut(), gem5::BaseCPU::system, and wakeup().

◆ getDataPort()

Port & gem5::MinorCPU::getDataPort ( )
overrideprotectedvirtual

Return a reference to the data port.

Implements gem5::BaseCPU.

Definition at line 318 of file cpu.cc.

◆ getInstPort()

Port & gem5::MinorCPU::getInstPort ( )
overrideprotectedvirtual

Return a reference to the instruction port.

Implements gem5::BaseCPU.

Definition at line 312 of file cpu.cc.

◆ init()

void gem5::MinorCPU::init ( )
overridevirtual

◆ memWriteback()

void gem5::MinorCPU::memWriteback ( )
overridevirtual

Write back dirty buffers to memory using functional writes.

After returning, an object implementing this method should have written all its dirty data back to memory. This method is typically used to prepare a system with caches for checkpointing.

Reimplemented from gem5::SimObject.

Definition at line 237 of file cpu.cc.

References DPRINTF.

◆ randomPriority()

std::vector<ThreadID> gem5::MinorCPU::randomPriority ( )
inline

◆ regStats()

void gem5::MinorCPU::regStats ( )
overridevirtual

Stats interface from SimObject (by way of BaseCPU)

Reimplemented from gem5::BaseCPU.

Definition at line 121 of file cpu.cc.

References gem5::BaseCPU::regStats().

◆ roundRobinPriority()

std::vector<ThreadID> gem5::MinorCPU::roundRobinPriority ( ThreadID  priority)
inline

◆ serialize()

void gem5::MinorCPU::serialize ( CheckpointOut cp) const
overridevirtual

Serialize pipeline data.

Reimplemented from gem5::BaseCPU.

Definition at line 140 of file cpu.cc.

References gem5::BaseCPU::serialize().

◆ serializeThread()

void gem5::MinorCPU::serializeThread ( CheckpointOut cp,
ThreadID  tid 
) const
overridevirtual

Serialize a single thread.

Parameters
cpThe stream to serialize to.
tidID of the current thread.

Reimplemented from gem5::BaseCPU.

Definition at line 128 of file cpu.cc.

References threads.

◆ signalDrainDone()

void gem5::MinorCPU::signalDrainDone ( )

Signal from Pipeline that MinorCPU should signal that a drain is complete and set its drainState.

Definition at line 200 of file cpu.cc.

References DPRINTF, and gem5::Drainable::signalDrainDone().

Referenced by gem5::minor::Pipeline::evaluate().

◆ startup()

void gem5::MinorCPU::startup ( )
overridevirtual

startup() is the final initialization call before simulation.

All state is initialized (including unserialized state, if any, such as the curTick() value), so this is the appropriate place to schedule initial event(s) for objects that need them.

Reimplemented from gem5::BaseCPU.

Definition at line 165 of file cpu.cc.

References DPRINTF, gem5::BaseCPU::numThreads, and gem5::BaseCPU::startup().

◆ suspendContext()

void gem5::MinorCPU::suspendContext ( ThreadID  thread_num)
overridevirtual

Notify the CPU that the indicated context is now suspended.

Check if possible to enter a lower power state

Reimplemented from gem5::BaseCPU.

Definition at line 292 of file cpu.cc.

References DPRINTF, gem5::BaseCPU::suspendContext(), and threads.

◆ switchOut()

void gem5::MinorCPU::switchOut ( )
overridevirtual

Switching interface from BaseCPU.

Reimplemented from gem5::BaseCPU.

Definition at line 243 of file cpu.cc.

References activityRecorder, DPRINTF, gem5::ActivityRecorder::reset(), gem5::BaseCPU::switchedOut(), and gem5::BaseCPU::switchOut().

◆ takeOverFrom()

void gem5::MinorCPU::takeOverFrom ( BaseCPU cpu)
overridevirtual

Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in.

A CPU model implementing this method is expected to initialize its state from the old CPU and connect its memory (unless they are already connected) to the memories connected to the old CPU.

Parameters
cpuCPU to initialize read state from.

Reimplemented from gem5::BaseCPU.

Definition at line 255 of file cpu.cc.

References DPRINTF, and gem5::BaseCPU::takeOverFrom().

◆ tick()

void gem5::MinorCPU::tick ( )
inline

The tick method in the MinorCPU is simply updating the cycle counters as the ticking of the pipeline stages is already handled by the Pipeline object.

Definition at line 199 of file cpu.hh.

References gem5::BaseCPU::CPU_STATE_ON, and gem5::BaseCPU::updateCycleCounters().

Referenced by gem5::minor::Pipeline::evaluate().

◆ totalInsts()

Counter gem5::MinorCPU::totalInsts ( ) const
overridevirtual

Simple inst count interface from BaseCPU.

Implements gem5::BaseCPU.

Definition at line 324 of file cpu.cc.

References gem5::ArmISA::i, and threads.

◆ totalOps()

Counter gem5::MinorCPU::totalOps ( ) const
overridevirtual

Implements gem5::BaseCPU.

Definition at line 335 of file cpu.cc.

References gem5::ArmISA::i, and threads.

◆ unserialize()

void gem5::MinorCPU::unserialize ( CheckpointIn cp)
overridevirtual

Reconstruct the state of this object from a checkpoint.

Note
CPU models should normally overload the unserializeThread() method instead of the unserialize() method as this provides a uniform data format for all CPU models and promotes better code reuse.
Parameters
cpThe checkpoint use.

Reimplemented from gem5::BaseCPU.

Definition at line 147 of file cpu.cc.

References gem5::BaseCPU::unserialize().

◆ unserializeThread()

void gem5::MinorCPU::unserializeThread ( CheckpointIn cp,
ThreadID  tid 
)
overridevirtual

Unserialize one thread.

Parameters
cpThe checkpoint use.
tidID of the current thread.

Reimplemented from gem5::BaseCPU.

Definition at line 134 of file cpu.cc.

References threads.

◆ wakeup()

void gem5::MinorCPU::wakeup ( ThreadID  tid)
overridevirtual

◆ wakeupOnEvent()

void gem5::MinorCPU::wakeupOnEvent ( unsigned int  stage_id)

Interface for stages to signal that they have become active after a callback or eventq event where the pipeline itself may have already been idled.

The stage argument should be from the enumeration Pipeline::StageId

Definition at line 302 of file cpu.cc.

References gem5::ActivityRecorder::activateStage(), activityRecorder, and DPRINTF.

Referenced by activateContext(), gem5::minor::Execute::drain(), gem5::minor::Execute::drainResume(), gem5::minor::Execute::evaluate(), gem5::minor::Fetch1::evaluate(), gem5::minor::Fetch1::recvTimingResp(), gem5::minor::LSQ::recvTimingResp(), gem5::minor::Fetch1::tryToSendToTransfers(), and gem5::minor::Fetch1::wakeupFetch().

Member Data Documentation

◆ activityRecorder

minor::MinorActivityRecorder* gem5::MinorCPU::activityRecorder

Activity recording for pipeline.

This belongs to Pipeline but stages will access it through the CPU as the MinorCPU object actually mediates idling behaviour

Definition at line 96 of file cpu.hh.

Referenced by gem5::minor::Decode::evaluate(), gem5::minor::Fetch2::evaluate(), gem5::minor::Execute::evaluate(), gem5::minor::Fetch1::evaluate(), gem5::minor::Execute::issue(), MinorCPU(), switchOut(), and wakeupOnEvent().

◆ fetchEventWrapper

EventFunctionWrapper* gem5::MinorCPU::fetchEventWrapper

Definition at line 206 of file cpu.hh.

Referenced by activateContext(), MinorCPU(), and ~MinorCPU().

◆ pipeline

minor::Pipeline* gem5::MinorCPU::pipeline
protected

pipeline is a container for the clockable pipeline stage objects.

Elements of pipeline call TheISA to implement the model.

Definition at line 90 of file cpu.hh.

Referenced by ~MinorCPU().

◆ stats

minor::MinorStats gem5::MinorCPU::stats

◆ threadPolicy

enums::ThreadPolicy gem5::MinorCPU::threadPolicy

◆ threads

std::vector<minor::MinorThread *> gem5::MinorCPU::threads

The documentation for this class was generated from the following files:

Generated on Tue Sep 21 2021 12:27:47 for gem5 by doxygen 1.8.17