gem5 v24.0.0.0
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dramsim2_wrapper.cc
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1/*
2 * Copyright (c) 2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#include <cassert>
39
41
42#include <fstream>
43
44#include "DRAMSim2/MultiChannelMemorySystem.h"
45#include "base/compiler.hh"
46#include "base/logging.hh"
47
54
55namespace gem5
56{
57
58namespace memory
59{
60
61DRAMSim2Wrapper::DRAMSim2Wrapper(const std::string& config_file,
62 const std::string& system_file,
63 const std::string& working_dir,
64 const std::string& trace_file,
65 unsigned int memory_size_mb,
66 bool enable_debug) :
67 dramsim(new DRAMSim::MultiChannelMemorySystem(config_file, system_file,
68 working_dir, trace_file,
69 memory_size_mb, NULL, NULL)),
70 _clockPeriod(0.0), _queueSize(0), _burstSize(0)
71{
72 // tell DRAMSim2 to ignore its internal notion of a CPU frequency
73 dramsim->setCPUClockSpeed(0);
74
75 // switch on debug output if requested
76 if (enable_debug)
78
79 // there is no way of getting DRAMSim2 to tell us what frequency
80 // it is assuming, so we have to extract it ourselves
82 working_dir + '/' + config_file);
83
84 if (!_clockPeriod)
85 fatal("DRAMSim2 wrapper failed to get clock\n");
86
87 // we also need to know what transaction queue size DRAMSim2 is
88 // using so we can stall when responses are blocked
89 _queueSize = extractConfig<unsigned int>("TRANS_QUEUE_DEPTH=",
90 working_dir + '/' + system_file);
91
92 if (!_queueSize)
93 fatal("DRAMSim2 wrapper failed to get queue size\n");
94
95
96 // finally, get the data bus bits and burst length so we can add a
97 // sanity check for the burst size
98 unsigned int dataBusBits =
99 extractConfig<unsigned int>("JEDEC_DATA_BUS_BITS=",
100 working_dir + '/' + system_file);
101 unsigned int burstLength =
102 extractConfig<unsigned int>("BL=", working_dir + '/' + config_file);
103
104 if (!dataBusBits || !burstLength)
105 fatal("DRAMSim22 wrapper failed to get burst size\n");
106
107 _burstSize = dataBusBits * burstLength / 8;
108}
109
114
115template <typename T>
116T
117DRAMSim2Wrapper::extractConfig(const std::string& field_name,
118 const std::string& file_name) const
119{
120 std::ifstream file_stream(file_name.c_str(), ios::in);
121
122 if (!file_stream.good())
123 fatal("DRAMSim2 wrapper could not open %s for reading\n", file_name);
124
125 bool found = false;
126 T res;
127 std::string line;
128 while (!found && file_stream) {
129 getline(file_stream, line);
130 if (line.substr(0, field_name.size()) == field_name) {
131 found = true;
132 istringstream iss(line.substr(field_name.size()));
133 iss >> res;
134 }
135 }
136
137 file_stream.close();
138
139 if (!found)
140 fatal("DRAMSim2 wrapper could not find %s in %s\n", field_name,
141 file_name);
142
143 return res;
144}
145
146void
148{
149 dramsim->printStats(true);
150}
151
152void
153DRAMSim2Wrapper::setCallbacks(DRAMSim::TransactionCompleteCB* read_callback,
154 DRAMSim::TransactionCompleteCB* write_callback)
155{
156 // simply pass it on, for now we ignore the power callback
157 dramsim->RegisterCallbacks(read_callback, write_callback, NULL);
158}
159
160bool
162{
163 return dramsim->willAcceptTransaction();
164}
165
166void
167DRAMSim2Wrapper::enqueue(bool is_write, uint64_t addr)
168{
169 [[maybe_unused]] bool success = dramsim->addTransaction(is_write, addr);
170 assert(success);
171}
172
173double
175{
176 return _clockPeriod;
177}
178
179unsigned int
181{
182 return _queueSize;
183}
184
185unsigned int
187{
188 return _burstSize;
189}
190
191void
193{
194 dramsim->update();
195}
196
197} // namespace memory
198} // namespace gem5
void enqueue(bool is_write, uint64_t addr)
Enqueue a packet.
void printStats()
Print the stats gathered in DRAMsim2.
double clockPeriod() const
Get the internal clock period used by DRAMSim2, specified in ns.
unsigned int queueSize() const
Get the transaction queue size used by DRAMSim2.
unsigned int burstSize() const
Get the burst size in bytes used by DRAMSim2.
DRAMSim2Wrapper(const std::string &config_file, const std::string &system_file, const std::string &working_dir, const std::string &trace_file, unsigned int memory_size_mb, bool enable_debug)
Create an instance of the DRAMSim2 multi-channel memory controller using a specific config and system...
bool canAccept() const
Determine if the controller can accept a new packet or not.
T extractConfig(const std::string &field_name, const std::string &file_name) const
void setCallbacks(DRAMSim::TransactionCompleteCB *read_callback, DRAMSim::TransactionCompleteCB *write_callback)
Set the callbacks to use for read and write completion.
void tick()
Progress the memory controller one cycle.
DRAMSim::MultiChannelMemorySystem * dramsim
int SHOW_SIM_OUTPUT
DRAMSim2 requires SHOW_SIM_OUTPUT to be defined (declared extern in the DRAMSim2 print macros),...
DRAMSim2Wrapper declaration.
#define fatal(...)
This implements a cprintf based fatal() function.
Definition logging.hh:200
Forward declaration to avoid includes.
Bitfield< 24, 0 > iss
Bitfield< 3 > addr
Definition types.hh:84
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
Definition mem.h:38

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