gem5  v21.1.0.2
intelmp.cc
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1 /*
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37 
38 #include "arch/x86/bios/intelmp.hh"
39 
40 #include "base/logging.hh"
41 #include "base/types.hh"
42 #include "mem/port_proxy.hh"
43 #include "sim/byteswap.hh"
44 
45 // Config entry types
46 #include "params/X86IntelMPBaseConfigEntry.hh"
47 #include "params/X86IntelMPExtConfigEntry.hh"
48 
49 // General table structures
50 #include "params/X86IntelMPConfigTable.hh"
51 #include "params/X86IntelMPFloatingPointer.hh"
52 
53 // Base entry types
54 #include "params/X86IntelMPBus.hh"
55 #include "params/X86IntelMPIOAPIC.hh"
56 #include "params/X86IntelMPIOIntAssignment.hh"
57 #include "params/X86IntelMPLocalIntAssignment.hh"
58 #include "params/X86IntelMPProcessor.hh"
59 
60 // Extended entry types
61 #include "params/X86IntelMPAddrSpaceMapping.hh"
62 #include "params/X86IntelMPBusHierarchy.hh"
63 #include "params/X86IntelMPCompatAddrSpaceMod.hh"
64 
65 namespace gem5
66 {
67 
69 
70 template<class T>
71 uint8_t
73 {
74  uint64_t guestVal = htole(val);
75  proxy.writeBlob(addr, &guestVal, sizeof(T));
76 
77  uint8_t checkSum = 0;
78  while (guestVal) {
79  checkSum += guestVal;
80  guestVal >>= 8;
81  }
82  return checkSum;
83 }
84 
85 uint8_t
86 writeOutString(PortProxy& proxy, Addr addr, std::string str, int length)
87 {
88  char cleanedString[length + 1];
89  cleanedString[length] = 0;
90 
91  if (str.length() > length) {
92  memcpy(cleanedString, str.c_str(), length);
93  warn("Intel MP configuration table string \"%s\" "
94  "will be truncated to \"%s\".\n", str, (char *)&cleanedString);
95  } else {
96  memcpy(cleanedString, str.c_str(), str.length());
97  memset(cleanedString + str.length(), 0, length - str.length());
98  }
99  proxy.writeBlob(addr, &cleanedString, length);
100 
101  uint8_t checkSum = 0;
102  for (int i = 0; i < length; i++)
103  checkSum += cleanedString[i];
104 
105  return checkSum;
106 }
107 
108 Addr
110 {
111  // Make sure that either a config table is present or a default
112  // configuration was found but not both.
113  if (!tableAddr && !defaultConfig)
114  fatal("Either an MP configuration table or a default configuration "
115  "must be used.");
116  if (tableAddr && defaultConfig)
117  fatal("Both an MP configuration table and a default configuration "
118  "were set.");
119 
120  uint8_t checkSum = 0;
121 
122  proxy.writeBlob(addr, signature, 4);
123  for (int i = 0; i < 4; i++)
124  checkSum += signature[i];
125 
126  checkSum += writeOutField(proxy, addr + 4, tableAddr);
127 
128  // The length of the structure in paragraphs, aka 16 byte chunks.
129  uint8_t length = 1;
130  proxy.writeBlob(addr + 8, &length, 1);
131  checkSum += length;
132 
133  proxy.writeBlob(addr + 9, &specRev, 1);
134  checkSum += specRev;
135 
136  proxy.writeBlob(addr + 11, &defaultConfig, 1);
137  checkSum += defaultConfig;
138 
139  uint32_t features2_5 = imcrPresent ? (1 << 7) : 0;
140  checkSum += writeOutField(proxy, addr + 12, features2_5);
141 
142  checkSum = -checkSum;
143  proxy.writeBlob(addr + 10, &checkSum, 1);
144 
145  return 16;
146 }
147 
149  SimObject(p), tableAddr(0), specRev(p.spec_rev),
150  defaultConfig(p.default_config), imcrPresent(p.imcr_present)
151 {}
152 
153 Addr
155  Addr addr, uint8_t &checkSum)
156 {
157  proxy.writeBlob(addr, &type, 1);
158  checkSum += type;
159  return 1;
160 }
161 
163  const Params &p, uint8_t _type) :
164  SimObject(p), type(_type)
165 {}
166 
167 Addr
169  Addr addr, uint8_t &checkSum)
170 {
171  proxy.writeBlob(addr, &type, 1);
172  checkSum += type;
173  proxy.writeBlob(addr + 1, &length, 1);
174  checkSum += length;
175  return 1;
176 }
177 
179  uint8_t _type, uint8_t _length) :
180  SimObject(p), type(_type), length(_length)
181 {}
182 
183 const char X86ISA::intelmp::ConfigTable::signature[] = "PCMP";
184 
185 Addr
187 {
188  uint8_t checkSum = 0;
189 
190  proxy.writeBlob(addr, signature, 4);
191  for (int i = 0; i < 4; i++)
192  checkSum += signature[i];
193 
194  // Base table length goes here but will be calculated later.
195 
196  proxy.writeBlob(addr + 6, &specRev, 1);
197  checkSum += specRev;
198 
199  // The checksum goes here but is still being calculated.
200 
201  checkSum += writeOutString(proxy, addr + 8, oemID, 8);
202  checkSum += writeOutString(proxy, addr + 16, productID, 12);
203 
204  checkSum += writeOutField(proxy, addr + 28, oemTableAddr);
205  checkSum += writeOutField(proxy, addr + 32, oemTableSize);
206  checkSum += writeOutField(proxy, addr + 34, (uint16_t)baseEntries.size());
207  checkSum += writeOutField(proxy, addr + 36, localApic);
208 
209  uint8_t reserved = 0;
210  proxy.writeBlob(addr + 43, &reserved, 1);
211  checkSum += reserved;
212 
214  uint16_t offset = 44;
215  for (baseEnt = baseEntries.begin();
216  baseEnt != baseEntries.end(); baseEnt++) {
217  offset += (*baseEnt)->writeOut(proxy, addr + offset, checkSum);
218  }
219 
220  // We've found the end of the base table this point.
221  checkSum += writeOutField(proxy, addr + 4, offset);
222 
224  uint16_t extOffset = 0;
225  uint8_t extCheckSum = 0;
226  for (extEnt = extEntries.begin();
227  extEnt != extEntries.end(); extEnt++) {
228  extOffset += (*extEnt)->writeOut(proxy,
229  addr + offset + extOffset, extCheckSum);
230  }
231 
232  checkSum += writeOutField(proxy, addr + 40, extOffset);
233  extCheckSum = -extCheckSum;
234  checkSum += writeOutField(proxy, addr + 42, extCheckSum);
235 
236  // And now, we finally have the whole check sum completed.
237  checkSum = -checkSum;
238  writeOutField(proxy, addr + 7, checkSum);
239 
240  return offset + extOffset;
241 };
242 
244  specRev(p.spec_rev), oemID(p.oem_id), productID(p.product_id),
245  oemTableAddr(p.oem_table_addr), oemTableSize(p.oem_table_size),
246  localApic(p.local_apic),
247  baseEntries(p.base_entries), extEntries(p.ext_entries)
248 {}
249 
250 Addr
252  PortProxy& proxy, Addr addr, uint8_t &checkSum)
253 {
254  BaseConfigEntry::writeOut(proxy, addr, checkSum);
255  checkSum += writeOutField(proxy, addr + 1, localApicID);
256  checkSum += writeOutField(proxy, addr + 2, localApicVersion);
257  checkSum += writeOutField(proxy, addr + 3, cpuFlags);
258  checkSum += writeOutField(proxy, addr + 4, cpuSignature);
259  checkSum += writeOutField(proxy, addr + 8, featureFlags);
260 
261  uint32_t reserved = 0;
262  proxy.writeBlob(addr + 12, &reserved, 4);
263  proxy.writeBlob(addr + 16, &reserved, 4);
264  return 20;
265 }
266 
268  localApicID(p.local_apic_id), localApicVersion(p.local_apic_version),
269  cpuFlags(0), cpuSignature(0), featureFlags(p.feature_flags)
270 {
271  if (p.enable)
272  cpuFlags |= (1 << 0);
273  if (p.bootstrap)
274  cpuFlags |= (1 << 1);
275 
276  replaceBits(cpuSignature, 3, 0, p.stepping);
277  replaceBits(cpuSignature, 7, 4, p.model);
278  replaceBits(cpuSignature, 11, 8, p.family);
279 }
280 
281 Addr
283  PortProxy& proxy, Addr addr, uint8_t &checkSum)
284 {
285  BaseConfigEntry::writeOut(proxy, addr, checkSum);
286  checkSum += writeOutField(proxy, addr + 1, busID);
287  checkSum += writeOutString(proxy, addr + 2, busType, 6);
288  return 8;
289 }
290 
292  busID(p.bus_id), busType(p.bus_type)
293 {}
294 
295 Addr
297  PortProxy& proxy, Addr addr, uint8_t &checkSum)
298 {
299  BaseConfigEntry::writeOut(proxy, addr, checkSum);
300  checkSum += writeOutField(proxy, addr + 1, id);
301  checkSum += writeOutField(proxy, addr + 2, version);
302  checkSum += writeOutField(proxy, addr + 3, flags);
303  checkSum += writeOutField(proxy, addr + 4, address);
304  return 8;
305 }
306 
308  id(p.id), version(p.version), flags(0), address(p.address)
309 {
310  if (p.enable)
311  flags |= 1;
312 }
313 
314 Addr
316  PortProxy& proxy, Addr addr, uint8_t &checkSum)
317 {
318  BaseConfigEntry::writeOut(proxy, addr, checkSum);
319  checkSum += writeOutField(proxy, addr + 1, interruptType);
320  checkSum += writeOutField(proxy, addr + 2, flags);
321  checkSum += writeOutField(proxy, addr + 4, sourceBusID);
322  checkSum += writeOutField(proxy, addr + 5, sourceBusIRQ);
323  checkSum += writeOutField(proxy, addr + 6, destApicID);
324  checkSum += writeOutField(proxy, addr + 7, destApicIntIn);
325  return 8;
326 }
327 
329  IntAssignment(p, p.interrupt_type, p.polarity, p.trigger, 3,
330  p.source_bus_id, p.source_bus_irq,
331  p.dest_io_apic_id, p.dest_io_apic_intin)
332 {}
333 
335  IntAssignment(p, p.interrupt_type, p.polarity, p.trigger, 4,
336  p.source_bus_id, p.source_bus_irq,
337  p.dest_local_apic_id, p.dest_local_apic_intin)
338 {}
339 
340 Addr
342  PortProxy& proxy, Addr addr, uint8_t &checkSum)
343 {
344  ExtConfigEntry::writeOut(proxy, addr, checkSum);
345  checkSum += writeOutField(proxy, addr + 2, busID);
346  checkSum += writeOutField(proxy, addr + 3, addrType);
347  checkSum += writeOutField(proxy, addr + 4, addr);
348  checkSum += writeOutField(proxy, addr + 12, addrLength);
349  return length;
350 }
351 
353  ExtConfigEntry(p, 128, 20),
354  busID(p.bus_id), addrType(p.address_type),
355  addr(p.address), addrLength(p.length)
356 {}
357 
358 Addr
360  PortProxy& proxy, Addr addr, uint8_t &checkSum)
361 {
362  ExtConfigEntry::writeOut(proxy, addr, checkSum);
363  checkSum += writeOutField(proxy, addr + 2, busID);
364  checkSum += writeOutField(proxy, addr + 3, info);
365  checkSum += writeOutField(proxy, addr + 4, parentBus);
366 
367  uint32_t reserved = 0;
368  proxy.writeBlob(addr + 5, &reserved, 3);
369 
370  return length;
371 }
372 
374  ExtConfigEntry(p, 129, 8),
375  busID(p.bus_id), info(0), parentBus(p.parent_bus)
376 {
377  if (p.subtractive_decode)
378  info |= 1;
379 }
380 
381 Addr
383  PortProxy& proxy, Addr addr, uint8_t &checkSum)
384 {
385  ExtConfigEntry::writeOut(proxy, addr, checkSum);
386  checkSum += writeOutField(proxy, addr + 2, busID);
387  checkSum += writeOutField(proxy, addr + 3, mod);
388  checkSum += writeOutField(proxy, addr + 4, rangeList);
389  return length;
390 }
391 
393  ExtConfigEntry(p, 130, 8),
394  busID(p.bus_id), mod(0), rangeList(p.range_list)
395 {
396  if (p.add)
397  mod |= 1;
398 }
399 
400 } // namespace gem5
fatal
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:189
gem5::X86ISA::intelmp::AddrSpaceMapping::writeOut
Addr writeOut(PortProxy &proxy, Addr addr, uint8_t &checkSum)
Definition: intelmp.cc:341
warn
#define warn(...)
Definition: logging.hh:245
gem5::PortProxy::writeBlob
void writeBlob(Addr addr, const void *p, int size) const
Same as tryWriteBlob, but insists on success.
Definition: port_proxy.hh:192
gem5::X86ISA::intelmp::Processor::cpuSignature
uint32_t cpuSignature
Definition: intelmp.hh:180
gem5::X86ISA::intelmp::CompatAddrSpaceMod::writeOut
Addr writeOut(PortProxy &proxy, Addr addr, uint8_t &checkSum)
Definition: intelmp.cc:382
gem5::X86ISA::intelmp::IOAPIC::IOAPIC
IOAPIC(const Params &p)
Definition: intelmp.cc:307
gem5::X86ISA::intelmp::IOAPIC::writeOut
Addr writeOut(PortProxy &proxy, Addr addr, uint8_t &checkSum)
Definition: intelmp.cc:296
gem5::X86ISA::intelmp::BusHierarchy::info
uint8_t info
Definition: intelmp.hh:292
gem5::X86ISA::intelmp::CompatAddrSpaceMod::CompatAddrSpaceMod
CompatAddrSpaceMod(const Params &p)
Definition: intelmp.cc:392
gem5::X86ISA::intelmp::AddrSpaceMapping::AddrSpaceMapping
AddrSpaceMapping(const Params &p)
Definition: intelmp.cc:352
intelmp.hh
gem5::X86ISA::intelmp::IOAPIC::flags
uint8_t flags
Definition: intelmp.hh:210
gem5::X86ISA::mod
mod
Definition: types.hh:91
gem5::X86ISA::intelmp::ExtConfigEntry::writeOut
virtual Addr writeOut(PortProxy &proxy, Addr addr, uint8_t &checkSum)
Definition: intelmp.cc:168
gem5::replaceBits
constexpr void replaceBits(T &val, unsigned first, unsigned last, B bit_val)
A convenience function to replace bits first to last of val with bit_val in place.
Definition: bitfield.hh:197
gem5::X86ISA::offset
offset
Definition: misc.hh:1030
gem5::writeOutField
uint8_t writeOutField(PortProxy &proxy, Addr addr, T val)
Definition: intelmp.cc:72
gem5::X86ISA::intelmp::FloatingPointer::specRev
uint8_t specRev
Definition: intelmp.hh:97
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:775
gem5::X86ISA::intelmp::BaseConfigEntry
Definition: intelmp.hh:120
gem5::X86ISA::intelmp::Processor::cpuFlags
uint8_t cpuFlags
Definition: intelmp.hh:179
std::vector
STL vector class.
Definition: stl.hh:37
gem5::ArmISA::i
Bitfield< 7 > i
Definition: misc_types.hh:66
gem5::X86ISA::intelmp::ExtConfigEntry::ExtConfigEntry
ExtConfigEntry(const Params &p, uint8_t _type, uint8_t _length)
Definition: intelmp.cc:178
gem5::X86ISA::intelmp::ConfigTable::writeOut
Addr writeOut(PortProxy &proxy, Addr addr)
Definition: intelmp.cc:186
gem5::X86ISA::intelmp::BaseConfigEntry::Params
X86IntelMPBaseConfigEntryParams Params
Definition: intelmp.hh:123
gem5::X86ISA::intelmp::FloatingPointer::Params
X86IntelMPFloatingPointerParams Params
Definition: intelmp.hh:94
gem5::X86ISA::intelmp::Processor::writeOut
Addr writeOut(PortProxy &proxy, Addr addr, uint8_t &checkSum)
Definition: intelmp.cc:251
gem5::X86ISA::intelmp::FloatingPointer::tableAddr
uint32_t tableAddr
Definition: intelmp.hh:96
reserved
reserved
Definition: pcireg.h:54
gem5::X86ISA::intelmp::FloatingPointer::defaultConfig
uint8_t defaultConfig
Definition: intelmp.hh:98
gem5::X86ISA::intelmp::ConfigTable::signature
static const char signature[]
Definition: intelmp.hh:154
gem5::X86ISA::type
type
Definition: misc.hh:733
port_proxy.hh
gem5::X86ISA::intelmp::Processor::Processor
Processor(const Params &p)
Definition: intelmp.cc:267
gem5::PortProxy
This object is a proxy for a port or other object which implements the functional response protocol,...
Definition: port_proxy.hh:86
gem5::X86ISA::intelmp::BusHierarchy::BusHierarchy
BusHierarchy(const Params &p)
Definition: intelmp.cc:373
gem5::X86ISA::intelmp::FloatingPointer::signature
static const char signature[]
Definition: intelmp.hh:101
gem5::X86ISA::intelmp::BaseConfigEntry::writeOut
virtual Addr writeOut(PortProxy &proxy, Addr addr, uint8_t &checkSum)
Definition: intelmp.cc:154
gem5::X86ISA::intelmp::ExtConfigEntry::Params
X86IntelMPExtConfigEntryParams Params
Definition: intelmp.hh:137
gem5::X86ISA::intelmp::ConfigTable::ConfigTable
ConfigTable(const Params &p)
Definition: intelmp.cc:243
gem5::X86ISA::intelmp::IOIntAssignment::IOIntAssignment
IOIntAssignment(const Params &p)
Definition: intelmp.cc:328
gem5::X86ISA::intelmp::ExtConfigEntry
Definition: intelmp.hh:134
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::X86ISA::intelmp::Bus::writeOut
Addr writeOut(PortProxy &proxy, Addr addr, uint8_t &checkSum)
Definition: intelmp.cc:282
gem5::X86ISA::intelmp::ConfigTable::Params
X86IntelMPConfigTableParams Params
Definition: intelmp.hh:152
gem5::X86ISA::intelmp::BaseConfigEntry::BaseConfigEntry
BaseConfigEntry(const Params &p, uint8_t _type)
Definition: intelmp.cc:162
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::X86ISA::intelmp::Bus::Bus
Bus(const Params &p)
Definition: intelmp.cc:291
gem5::X86ISA::intelmp::BusHierarchy::writeOut
Addr writeOut(PortProxy &proxy, Addr addr, uint8_t &checkSum)
Definition: intelmp.cc:359
types.hh
gem5::writeOutString
uint8_t writeOutString(PortProxy &proxy, Addr addr, std::string str, int length)
Definition: intelmp.cc:86
gem5::X86ISA::intelmp::LocalIntAssignment::LocalIntAssignment
LocalIntAssignment(const Params &p)
Definition: intelmp.cc:334
gem5::X86ISA::intelmp::IntAssignment
Definition: intelmp.hh:219
gem5::htole
T htole(T value)
Definition: byteswap.hh:172
logging.hh
gem5::ArmISA::id
Bitfield< 33 > id
Definition: misc_types.hh:250
gem5::X86ISA::p
Bitfield< 0 > p
Definition: pagetable.hh:151
gem5::X86ISA::intelmp::FloatingPointer::imcrPresent
bool imcrPresent
Definition: intelmp.hh:99
gem5::X86ISA::intelmp::FloatingPointer::FloatingPointer
FloatingPointer(const Params &p)
Definition: intelmp.cc:148
gem5::X86ISA::intelmp::IntAssignment::writeOut
Addr writeOut(PortProxy &proxy, Addr addr, uint8_t &checkSum)
Definition: intelmp.cc:315
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::X86ISA::trigger
Bitfield< 21 > trigger
Definition: intmessage.hh:52
byteswap.hh
gem5::X86ISA::intelmp::FloatingPointer::writeOut
Addr writeOut(PortProxy &proxy, Addr addr)
Definition: intelmp.cc:109
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84
gem5::X86ISA::intelmp::CompatAddrSpaceMod::mod
uint8_t mod
Definition: intelmp.hh:307

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