gem5 v24.0.0.0
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interrupts.hh
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1/*
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27 */
28
29#ifndef __ARCH_POWER_INTERRUPT_HH__
30#define __ARCH_POWER_INTERRUPT_HH__
31
33#include "base/logging.hh"
34#include "params/PowerInterrupts.hh"
35
36namespace gem5
37{
38
39class BaseCPU;
40class ThreadContext;
41
42namespace PowerISA {
43
45{
46 public:
47 using Params = PowerInterruptsParams;
48
50
51 void
52 post(int int_num, int index)
53 {
54 panic("Interrupts::post not implemented.\n");
55 }
56
57 void
58 clear(int int_num, int index)
59 {
60 panic("Interrupts::clear not implemented.\n");
61 }
62
63 void
65 {
66 panic("Interrupts::clearAll not implemented.\n");
67 }
68
69 bool
71 {
72 panic("Interrupts::checkInterrupts not implemented.\n");
73 }
74
75 Fault
77 {
78 assert(checkInterrupts());
79 panic("Interrupts::getInterrupt not implemented.\n");
80 }
81
82 void
84 {
85 panic("Interrupts::updateIntrInfo not implemented.\n");
86 }
87};
88
89} // namespace PowerISA
90} // namespace gem5
91
92#endif // __ARCH_POWER_INTERRUPT_HH__
void clear(int int_num, int index)
Definition interrupts.hh:58
Interrupts(const Params &p)
Definition interrupts.hh:49
PowerInterruptsParams Params
Definition interrupts.hh:47
void post(int int_num, int index)
Definition interrupts.hh:52
#define panic(...)
This implements a cprintf based panic() function.
Definition logging.hh:188
Bitfield< 30, 0 > index
Bitfield< 0 > p
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
std::shared_ptr< FaultBase > Fault
Definition types.hh:249

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