gem5  v22.1.0.0
interrupts.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2011 Google
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions are
7  * met: redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer;
9  * redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution;
12  * neither the name of the copyright holders nor the names of its
13  * contributors may be used to endorse or promote products derived from
14  * this software without specific prior written permission.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #ifndef __ARCH_POWER_INTERRUPT_HH__
30 #define __ARCH_POWER_INTERRUPT_HH__
31 
33 #include "base/logging.hh"
34 #include "params/PowerInterrupts.hh"
35 
36 namespace gem5
37 {
38 
39 class BaseCPU;
40 class ThreadContext;
41 
42 namespace PowerISA {
43 
44 class Interrupts : public BaseInterrupts
45 {
46  public:
47  using Params = PowerInterruptsParams;
48 
50 
51  void
52  post(int int_num, int index)
53  {
54  panic("Interrupts::post not implemented.\n");
55  }
56 
57  void
58  clear(int int_num, int index)
59  {
60  panic("Interrupts::clear not implemented.\n");
61  }
62 
63  void
65  {
66  panic("Interrupts::clearAll not implemented.\n");
67  }
68 
69  bool
71  {
72  panic("Interrupts::checkInterrupts not implemented.\n");
73  }
74 
75  Fault
77  {
78  assert(checkInterrupts());
79  panic("Interrupts::getInterrupt not implemented.\n");
80  }
81 
82  void
84  {
85  panic("Interrupts::updateIntrInfo not implemented.\n");
86  }
87 };
88 
89 } // namespace PowerISA
90 } // namespace gem5
91 
92 #endif // __ARCH_POWER_INTERRUPT_HH__
BaseInterruptsParams Params
Definition: interrupts.hh:47
void clear(int int_num, int index)
Definition: interrupts.hh:58
Interrupts(const Params &p)
Definition: interrupts.hh:49
bool checkInterrupts() const
Definition: interrupts.hh:70
void post(int int_num, int index)
Definition: interrupts.hh:52
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:178
Bitfield< 30, 0 > index
Bitfield< 54 > p
Definition: pagetable.hh:70
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
std::shared_ptr< FaultBase > Fault
Definition: types.hh:248

Generated on Wed Dec 21 2022 10:22:24 for gem5 by doxygen 1.9.1