gem5  v21.1.0.2
integer.cc
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28 
30 
31 namespace gem5
32 {
33 
34 namespace SparcISA
35 {
36 
38 //
39 // Integer operate instructions
40 //
41 
42 bool
44  const loader::SymbolTable *symbab) const
45 {
46  if (!std::strcmp(mnemonic, "or") && srcRegIdx(0).index() == 0) {
47  printMnemonic(os, "mov");
48  printSrcReg(os, 1);
49  ccprintf(os, ", ");
50  printDestReg(os, 0);
51  return true;
52  }
53  return false;
54 }
55 
56 bool
58  const loader::SymbolTable *symbab) const
59 {
60  if (!std::strcmp(mnemonic, "or")) {
61  if (_numSrcRegs > 0 && srcRegIdx(0).index() == 0) {
62  if (imm == 0) {
63  printMnemonic(os, "clr");
64  } else {
65  printMnemonic(os, "mov");
66  ccprintf(os, " %#x, ", imm);
67  }
68  printDestReg(os, 0);
69  return true;
70  } else if (imm == 0) {
71  printMnemonic(os, "mov");
72  printSrcReg(os, 0);
73  ccprintf(os, ", ");
74  printDestReg(os, 0);
75  return true;
76  }
77  }
78  return false;
79 }
80 
81 std::string
83 {
84  std::stringstream response;
85 
86  if (printPseudoOps(response, pc, symtab))
87  return response.str();
88  printMnemonic(response, mnemonic);
89  printRegArray(response, &srcRegIdx(0), _numSrcRegs);
91  response << ", ";
92  printDestReg(response, 0);
93  return response.str();
94 }
95 
96 std::string
98 {
99  std::stringstream response;
100 
101  if (printPseudoOps(response, pc, symtab))
102  return response.str();
103  printMnemonic(response, mnemonic);
104  printRegArray(response, &srcRegIdx(0), _numSrcRegs);
105  if (_numSrcRegs > 0)
106  response << ", ";
107  ccprintf(response, "%#x", imm);
108  if (_numDestRegs > 0)
109  response << ", ";
110  printDestReg(response, 0);
111  return response.str();
112 }
113 
114 std::string
116 {
117  std::stringstream response;
118 
119  printMnemonic(response, mnemonic);
120  ccprintf(response, "%%hi(%#x), ", imm);
121  printDestReg(response, 0);
122  return response.str();
123 }
124 
125 } // namespace SparcISA
126 } // namespace gem5
gem5::SparcISA::SetHi::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: integer.cc:115
gem5::SparcISA::IntOpImm::printPseudoOps
bool printPseudoOps(std::ostream &os, Addr pc, const loader::SymbolTable *symtab) const override
Definition: integer.cc:57
gem5::SparcISA::IntOp::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: integer.cc:82
gem5::MipsISA::index
Bitfield< 30, 0 > index
Definition: pra_constants.hh:47
gem5::SparcISA::IntOpImm::imm
int64_t imm
Definition: integer.hh:72
gem5::SparcISA::SparcStaticInst::printSrcReg
void printSrcReg(std::ostream &os, int reg) const
Definition: static_inst.cc:88
gem5::SparcISA::IntOpImm::generateDisassembly
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: integer.cc:97
gem5::loader::SymbolTable
Definition: symtab.hh:65
gem5::SparcISA::SparcStaticInst::printRegArray
void printRegArray(std::ostream &os, const RegId *indexArray, int num) const
Definition: static_inst.cc:69
gem5::ccprintf
void ccprintf(cp::Print &print)
Definition: cprintf.hh:130
gem5::StaticInst::srcRegIdx
const RegId & srcRegIdx(int i) const
Return logical index (architectural reg num) of i'th source reg.
Definition: static_inst.hh:247
gem5::SparcISA::SparcStaticInst::printDestReg
void printDestReg(std::ostream &os, int reg) const
Definition: static_inst.cc:95
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
integer.hh
gem5::SparcISA::IntOp::printPseudoOps
virtual bool printPseudoOps(std::ostream &os, Addr pc, const loader::SymbolTable *symtab) const
Definition: integer.cc:43
gem5::X86ISA::os
Bitfield< 17 > os
Definition: misc.hh:809
gem5::StaticInst::_numDestRegs
int8_t _numDestRegs
See numDestRegs().
Definition: static_inst.hh:112
gem5::MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:243
gem5::SparcISA::SparcStaticInst::printMnemonic
static void printMnemonic(std::ostream &os, const char *mnemonic)
Definition: static_inst.cc:63
gem5::StaticInst::mnemonic
const char * mnemonic
Base mnemonic (e.g., "add").
Definition: static_inst.hh:281
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::StaticInst::_numSrcRegs
int8_t _numSrcRegs
See numSrcRegs().
Definition: static_inst.hh:109

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