gem5  v22.1.0.0
sve.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2017-2019 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed hereunder. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef __ARCH_ARM_INSTS_SVE_HH__
39 #define __ARCH_ARM_INSTS_SVE_HH__
40 
42 
43 namespace gem5
44 {
45 
46 namespace ArmISA {
47 
48 enum class SvePredType
49 {
50  NONE,
51  MERGE,
52  ZERO,
53  SELECT
54 };
55 
57 const char* svePredTypeToStr(SvePredType pt);
58 
61 {
62  protected:
64  int8_t imm1;
65  int8_t imm2;
66 
67  SveIndexIIOp(const char* mnem, ExtMachInst _machInst,
68  OpClass __opClass, RegIndex _dest,
69  int8_t _imm1, int8_t _imm2) :
70  ArmStaticInst(mnem, _machInst, __opClass),
71  dest(_dest), imm1(_imm1), imm2(_imm2)
72  {}
73  std::string generateDisassembly(
74  Addr pc, const loader::SymbolTable *symtab) const override;
75 };
76 
78 {
79  protected:
81  int8_t imm1;
83 
84  SveIndexIROp(const char* mnem, ExtMachInst _machInst,
85  OpClass __opClass, RegIndex _dest,
86  int8_t _imm1, RegIndex _op2) :
87  ArmStaticInst(mnem, _machInst, __opClass),
88  dest(_dest), imm1(_imm1), op2(_op2)
89  {}
90  std::string generateDisassembly(
91  Addr pc, const loader::SymbolTable *symtab) const override;
92 };
93 
95 {
96  protected:
99  int8_t imm2;
100 
101  SveIndexRIOp(const char* mnem, ExtMachInst _machInst,
102  OpClass __opClass, RegIndex _dest,
103  RegIndex _op1, int8_t _imm2) :
104  ArmStaticInst(mnem, _machInst, __opClass),
105  dest(_dest), op1(_op1), imm2(_imm2)
106  {}
107  std::string generateDisassembly(
108  Addr pc, const loader::SymbolTable *symtab) const override;
109 };
110 
112 {
113  protected:
117 
118  SveIndexRROp(const char* mnem, ExtMachInst _machInst,
119  OpClass __opClass, RegIndex _dest,
120  RegIndex _op1, RegIndex _op2) :
121  ArmStaticInst(mnem, _machInst, __opClass),
122  dest(_dest), op1(_op1), op2(_op2)
123  {}
124  std::string generateDisassembly(
125  Addr pc, const loader::SymbolTable *symtab) const override;
126 };
127 
128 // Predicate count SVE instruction.
130 {
131  protected:
134  bool srcIs32b;
135  bool destIsVec;
136 
137  SvePredCountOp(const char* mnem, ExtMachInst _machInst,
138  OpClass __opClass, RegIndex _dest, RegIndex _gp,
139  bool _srcIs32b = false, bool _destIsVec = false) :
140  ArmStaticInst(mnem, _machInst, __opClass),
141  dest(_dest), gp(_gp),
142  srcIs32b(_srcIs32b), destIsVec(_destIsVec)
143  {}
144  std::string generateDisassembly(
145  Addr pc, const loader::SymbolTable *symtab) const override;
146 };
147 
148 // Predicate count SVE instruction (predicated).
150 {
151  protected:
155 
156  SvePredCountPredOp(const char* mnem, ExtMachInst _machInst,
157  OpClass __opClass, RegIndex _dest, RegIndex _op1,
158  RegIndex _gp) :
159  ArmStaticInst(mnem, _machInst, __opClass),
160  dest(_dest), op1(_op1), gp(_gp)
161  {}
162  std::string generateDisassembly(
163  Addr pc, const loader::SymbolTable *symtab) const override;
164 };
165 
167 class SveWhileOp : public ArmStaticInst
168 {
169  protected:
171  bool srcIs32b;
172 
173  SveWhileOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
174  RegIndex _dest, RegIndex _op1, RegIndex _op2,
175  bool _srcIs32b) :
176  ArmStaticInst(mnem, _machInst, __opClass),
177  dest(_dest), op1(_op1), op2(_op2), srcIs32b(_srcIs32b)
178  {}
179  std::string generateDisassembly(
180  Addr pc, const loader::SymbolTable *symtab) const override;
181 };
182 
185 {
186  protected:
188 
189  SveCompTermOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
190  RegIndex _op1, RegIndex _op2) :
191  ArmStaticInst(mnem, _machInst, __opClass),
192  op1(_op1), op2(_op2)
193  {}
194  std::string generateDisassembly(
195  Addr pc, const loader::SymbolTable *symtab) const override;
196 };
197 
200 {
201  protected:
203 
204  SveUnaryPredOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
205  RegIndex _dest, RegIndex _op1, RegIndex _gp) :
206  ArmStaticInst(mnem, _machInst, __opClass),
207  dest(_dest), op1(_op1), gp(_gp)
208  {}
209 
210  std::string generateDisassembly(
211  Addr pc, const loader::SymbolTable *symtab) const override;
212 };
213 
216 {
217  protected:
219 
220  SveUnaryUnpredOp(const char* mnem, ExtMachInst _machInst,
221  OpClass __opClass, RegIndex _dest, RegIndex _op1) :
222  ArmStaticInst(mnem, _machInst, __opClass),
223  dest(_dest), op1(_op1)
224  {}
225 
226  std::string generateDisassembly(
227  Addr pc, const loader::SymbolTable *symtab) const override;
228 };
229 
232 {
233  protected:
235  uint64_t imm;
236 
237  SveUnaryWideImmUnpredOp(const char* mnem, ExtMachInst _machInst,
238  OpClass __opClass, RegIndex _dest,
239  uint64_t _imm) :
240  ArmStaticInst(mnem, _machInst, __opClass),
241  dest(_dest), imm(_imm)
242  {}
243 
244  std::string generateDisassembly(
245  Addr pc, const loader::SymbolTable *symtab) const override;
246 };
247 
250 {
251  protected:
253  uint64_t imm;
255 
256  bool isMerging;
257 
258  SveUnaryWideImmPredOp(const char* mnem, ExtMachInst _machInst,
259  OpClass __opClass, RegIndex _dest,
260  uint64_t _imm, RegIndex _gp, bool _isMerging) :
261  ArmStaticInst(mnem, _machInst, __opClass),
262  dest(_dest), imm(_imm), gp(_gp), isMerging(_isMerging)
263  {}
264 
265  std::string generateDisassembly(
266  Addr pc, const loader::SymbolTable *symtab) const override;
267 };
268 
271 {
272  protected:
274  uint64_t imm;
275 
276  SveBinImmUnpredConstrOp(const char* mnem, ExtMachInst _machInst,
277  OpClass __opClass, RegIndex _dest, RegIndex _op1,
278  uint64_t _imm) :
279  ArmStaticInst(mnem, _machInst, __opClass),
280  dest(_dest), op1(_op1), imm(_imm)
281  {}
282 
283  std::string generateDisassembly(
284  Addr pc, const loader::SymbolTable *symtab) const override;
285 };
286 
289 {
290  protected:
292  uint64_t imm;
293 
294  SveBinImmPredOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
295  RegIndex _dest, uint64_t _imm, RegIndex _gp) :
296  ArmStaticInst(mnem, _machInst, __opClass),
297  dest(_dest), gp(_gp), imm(_imm)
298  {}
299 
300  std::string generateDisassembly(
301  Addr pc, const loader::SymbolTable *symtab) const override;
302 };
303 
306 {
307  protected:
309  uint64_t imm;
310 
311  SveBinWideImmUnpredOp(const char* mnem, ExtMachInst _machInst,
312  OpClass __opClass, RegIndex _dest,
313  uint64_t _imm) :
314  ArmStaticInst(mnem, _machInst, __opClass),
315  dest(_dest), imm(_imm)
316  {}
317 
318  std::string generateDisassembly(
319  Addr pc, const loader::SymbolTable *symtab) const override;
320 };
321 
324 {
325  protected:
327 
328  SveBinDestrPredOp(const char* mnem, ExtMachInst _machInst,
329  OpClass __opClass, RegIndex _dest, RegIndex _op2,
330  RegIndex _gp) :
331  ArmStaticInst(mnem, _machInst, __opClass),
332  dest(_dest), op2(_op2), gp(_gp)
333  {}
334 
335  std::string generateDisassembly(
336  Addr pc, const loader::SymbolTable *symtab) const override;
337 };
338 
341 {
342  protected:
345 
346  SveBinConstrPredOp(const char* mnem, ExtMachInst _machInst,
347  OpClass __opClass, RegIndex _dest, RegIndex _op1,
348  RegIndex _op2, RegIndex _gp,
349  SvePredType _predType) :
350  ArmStaticInst(mnem, _machInst, __opClass),
351  dest(_dest), op1(_op1), op2(_op2), gp(_gp), predType(_predType)
352  {}
353 
354  std::string generateDisassembly(
355  Addr pc, const loader::SymbolTable *symtab) const override;
356 };
357 
360 {
361  protected:
363 
364  SveBinUnpredOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
365  RegIndex _dest, RegIndex _op1, RegIndex _op2) :
366  ArmStaticInst(mnem, _machInst, __opClass),
367  dest(_dest), op1(_op1), op2(_op2)
368  {}
369 
370  std::string generateDisassembly(
371  Addr pc, const loader::SymbolTable *symtab) const override;
372 };
373 
376 {
377  protected:
379  uint8_t index;
380 
381  SveBinIdxUnpredOp(const char* mnem, ExtMachInst _machInst,
382  OpClass __opClass, RegIndex _dest, RegIndex _op1,
383  RegIndex _op2, uint8_t _index) :
384  ArmStaticInst(mnem, _machInst, __opClass),
385  dest(_dest), op1(_op1), op2(_op2), index(_index)
386  {}
387 
388  std::string generateDisassembly(
389  Addr pc, const loader::SymbolTable *symtab) const override;
390 };
391 
394 {
395  protected:
397  bool isSel;
398 
399  SvePredLogicalOp(const char* mnem, ExtMachInst _machInst,
400  OpClass __opClass, RegIndex _dest, RegIndex _op1,
401  RegIndex _op2, RegIndex _gp, bool _isSel = false) :
402  ArmStaticInst(mnem, _machInst, __opClass),
403  dest(_dest), op1(_op1), op2(_op2), gp(_gp), isSel(_isSel)
404  {}
405 
406  std::string generateDisassembly(
407  Addr pc, const loader::SymbolTable *symtab) const override;
408 };
409 
412 {
413  protected:
415 
416  SvePredBinPermOp(const char* mnem, ExtMachInst _machInst,
417  OpClass __opClass, RegIndex _dest, RegIndex _op1,
418  RegIndex _op2) :
419  ArmStaticInst(mnem, _machInst, __opClass),
420  dest(_dest), op1(_op1), op2(_op2)
421  {}
422 
423  std::string generateDisassembly(
424  Addr pc, const loader::SymbolTable *symtab) const override;
425 };
426 
428 class SveCmpOp : public ArmStaticInst
429 {
430  protected:
432 
433  SveCmpOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
434  RegIndex _dest, RegIndex _op1, RegIndex _op2,
435  RegIndex _gp) :
436  ArmStaticInst(mnem, _machInst, __opClass),
437  dest(_dest), gp(_gp), op1(_op1), op2(_op2)
438  {}
439 
440  std::string generateDisassembly(
441  Addr pc, const loader::SymbolTable *symtab) const override;
442 };
443 
446 {
447  protected:
449  uint64_t imm;
450 
451  SveCmpImmOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
452  RegIndex _dest, RegIndex _op1, uint64_t _imm,
453  RegIndex _gp) :
454  ArmStaticInst(mnem, _machInst, __opClass),
455  dest(_dest), gp(_gp), op1(_op1), imm(_imm)
456  {}
457 
458  std::string generateDisassembly(
459  Addr pc, const loader::SymbolTable *symtab) const override;
460 };
461 
464 {
465  protected:
467 
468  SveTerPredOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
469  RegIndex _dest, RegIndex _op1, RegIndex _op2,
470  RegIndex _gp) :
471  ArmStaticInst(mnem, _machInst, __opClass),
472  dest(_dest), op1(_op1), op2(_op2), gp(_gp)
473  {}
474 
475  std::string generateDisassembly(
476  Addr pc, const loader::SymbolTable *symtab) const override;
477 };
478 
481 {
482  protected:
484  uint64_t imm;
485 
486  SveTerImmUnpredOp(const char* mnem, ExtMachInst _machInst,
487  OpClass __opClass, RegIndex _dest, RegIndex _op2,
488  uint64_t _imm) :
489  ArmStaticInst(mnem, _machInst, __opClass),
490  dest(_dest), op2(_op2), imm(_imm)
491  {}
492 
493  std::string generateDisassembly(
494  Addr pc, const loader::SymbolTable *symtab) const override;
495 };
496 
498 class SveReducOp : public ArmStaticInst
499 {
500  protected:
502 
503  SveReducOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
504  RegIndex _dest, RegIndex _op1, RegIndex _gp) :
505  ArmStaticInst(mnem, _machInst, __opClass),
506  dest(_dest), op1(_op1), gp(_gp)
507  {}
508 
509  std::string generateDisassembly(
510  Addr pc, const loader::SymbolTable *symtab) const override;
511 };
512 
515 {
516  protected:
518 
519  SveOrdReducOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
520  RegIndex _dest, RegIndex _op1, RegIndex _gp) :
521  ArmStaticInst(mnem, _machInst, __opClass),
522  dest(_dest), op1(_op1), gp(_gp)
523  {}
524 
525  std::string generateDisassembly(
526  Addr pc, const loader::SymbolTable *symtab) const override;
527 };
528 
530 class SvePtrueOp : public ArmStaticInst
531 {
532  protected:
534  uint8_t imm;
535 
536  SvePtrueOp(const char* mnem, ExtMachInst _machInst,
537  OpClass __opClass, RegIndex _dest, uint8_t _imm) :
538  ArmStaticInst(mnem, _machInst, __opClass),
539  dest(_dest), imm(_imm)
540  {}
541 
542  std::string generateDisassembly(
543  Addr pc, const loader::SymbolTable *symtab) const override;
544 };
545 
548 {
549  protected:
553  bool op2IsWide;
554 
555  SveIntCmpOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
556  RegIndex _dest, RegIndex _op1, RegIndex _op2,
557  RegIndex _gp, bool _op2IsWide = false) :
558  ArmStaticInst(mnem, _machInst, __opClass),
559  dest(_dest), op1(_op1), op2(_op2), gp(_gp), op2IsWide(_op2IsWide)
560  {}
561  std::string generateDisassembly(
562  Addr pc, const loader::SymbolTable *symtab) const override;
563 };
564 
567 {
568  protected:
571  int64_t imm;
573 
574  SveIntCmpImmOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
575  RegIndex _dest, RegIndex _op1, int64_t _imm,
576  RegIndex _gp) :
577  ArmStaticInst(mnem, _machInst, __opClass),
578  dest(_dest), op1(_op1), imm(_imm), gp(_gp)
579  {}
580  std::string generateDisassembly(
581  Addr pc, const loader::SymbolTable *symtab) const override;
582 };
583 
585 class SveAdrOp : public ArmStaticInst
586 {
587  public:
589  {
593  };
594 
595  protected:
597  uint8_t mult;
599 
600  SveAdrOp(const char* mnem, ExtMachInst _machInst,
601  OpClass __opClass, RegIndex _dest, RegIndex _op1,
602  RegIndex _op2, uint8_t _mult,
603  SveAdrOffsetFormat _offsetFormat) :
604  ArmStaticInst(mnem, _machInst, __opClass),
605  dest(_dest), op1(_op1), op2(_op2), mult(_mult),
606  offsetFormat(_offsetFormat)
607  {}
608  std::string generateDisassembly(
609  Addr pc, const loader::SymbolTable *symtab) const override;
610 };
611 
614 {
615  protected:
617  uint8_t pattern;
618  uint8_t imm;
619  bool dstIsVec;
620  bool dstIs32b;
621  uint8_t esize;
622 
623  SveElemCountOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
624  RegIndex _dest, uint8_t _pattern, uint8_t _imm,
625  bool _dstIsVec, bool _dstIs32b) :
626  ArmStaticInst(mnem, _machInst, __opClass),
627  dest(_dest), pattern(_pattern), imm(_imm), dstIsVec(_dstIsVec),
628  dstIs32b(_dstIs32b)
629  {}
630  std::string generateDisassembly(
631  Addr pc, const loader::SymbolTable *symtab) const override;
632 };
633 
636 {
637  protected:
641  bool isMerging;
642 
643  SvePartBrkOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
644  RegIndex _dest, RegIndex _gp, RegIndex _op1,
645  bool _isMerging) :
646  ArmStaticInst(mnem, _machInst, __opClass),
647  dest(_dest), gp(_gp), op1(_op1), isMerging(_isMerging)
648  {}
649  std::string generateDisassembly(
650  Addr pc, const loader::SymbolTable *symtab) const override;
651 };
652 
655 {
656  protected:
661 
662  SvePartBrkPropOp(const char* mnem, ExtMachInst _machInst,
663  OpClass __opClass, RegIndex _dest,
664  RegIndex _op1, RegIndex _op2, RegIndex _gp) :
665  ArmStaticInst(mnem, _machInst, __opClass),
666  dest(_dest), op1(_op1), op2(_op2), gp(_gp)
667  {}
668  std::string generateDisassembly(
669  Addr pc, const loader::SymbolTable *symtab) const override;
670 };
671 
674 {
675  protected:
680  bool scalar;
681  bool simdFp;
682  size_t scalar_width;
683 
684  SveSelectOp(const char* mnem, ExtMachInst _machInst,
685  OpClass __opClass, RegIndex _dest,
686  RegIndex _op1, RegIndex _gp,
687  bool _conditional, bool _scalar,
688  bool _simdFp) :
689  ArmStaticInst(mnem, _machInst, __opClass),
690  dest(_dest), op1(_op1), gp(_gp), conditional(_conditional),
691  scalar(_scalar), simdFp(_simdFp)
692  {}
693  std::string generateDisassembly(
694  Addr pc, const loader::SymbolTable *symtab) const override;
695 };
696 
699 {
700  protected:
704 
705  SveUnaryPredPredOp(const char* mnem, ExtMachInst _machInst,
706  OpClass __opClass, RegIndex _dest,
707  RegIndex _op1, RegIndex _gp) :
708  ArmStaticInst(mnem, _machInst, __opClass),
709  dest(_dest), op1(_op1), gp(_gp)
710  {}
711  std::string generateDisassembly(
712  Addr pc, const loader::SymbolTable *symtab) const override;
713 };
714 
716 class SveTblOp : public ArmStaticInst
717 {
718  protected:
722 
723  SveTblOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
724  RegIndex _dest, RegIndex _op1, RegIndex _op2) :
725  ArmStaticInst(mnem, _machInst, __opClass),
726  dest(_dest), op1(_op1), op2(_op2)
727  {}
728  std::string generateDisassembly(
729  Addr pc, const loader::SymbolTable *symtab) const override;
730 };
731 
734 {
735  protected:
738 
739  SveUnpackOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
740  RegIndex _dest, RegIndex _op1) :
741  ArmStaticInst(mnem, _machInst, __opClass),
742  dest(_dest), op1(_op1)
743  {}
744  std::string generateDisassembly(
745  Addr pc, const loader::SymbolTable *symtab) const override;
746 };
747 
750 {
751  protected:
754 
755  SvePredTestOp(const char* mnem, ExtMachInst _machInst, OpClass __opClass,
756  RegIndex _op1, RegIndex _gp) :
757  ArmStaticInst(mnem, _machInst, __opClass),
758  op1(_op1), gp(_gp)
759  {}
760  std::string generateDisassembly(
761  Addr pc, const loader::SymbolTable *symtab) const override;
762 };
763 
766 {
767  protected:
769 
770  SvePredUnaryWImplicitSrcOp(const char* mnem, ExtMachInst _machInst,
771  OpClass __opClass, RegIndex _dest) :
772  ArmStaticInst(mnem, _machInst, __opClass),
773  dest(_dest)
774  {}
775  std::string generateDisassembly(
776  Addr pc, const loader::SymbolTable *symtab) const override;
777 };
778 
781 {
782  protected:
785 
786  SvePredUnaryWImplicitSrcPredOp(const char* mnem, ExtMachInst _machInst,
787  OpClass __opClass, RegIndex _dest,
788  RegIndex _gp) :
789  ArmStaticInst(mnem, _machInst, __opClass),
790  dest(_dest), gp(_gp)
791  {}
792  std::string generateDisassembly(
793  Addr pc, const loader::SymbolTable *symtab) const override;
794 };
795 
798 {
799  protected:
801 
802  SvePredUnaryWImplicitDstOp(const char* mnem, ExtMachInst _machInst,
803  OpClass __opClass, RegIndex _op1) :
804  ArmStaticInst(mnem, _machInst, __opClass),
805  op1(_op1)
806  {}
807  std::string generateDisassembly(
808  Addr pc, const loader::SymbolTable *symtab) const override;
809 };
810 
813 {
814  protected:
815  SveWImplicitSrcDstOp(const char* mnem, ExtMachInst _machInst,
816  OpClass __opClass) :
817  ArmStaticInst(mnem, _machInst, __opClass)
818  {}
819  std::string generateDisassembly(
820  Addr pc, const loader::SymbolTable *symtab) const override;
821 };
822 
825 {
826  protected:
829  uint64_t imm;
830 
831  SveBinImmUnpredDestrOp(const char* mnem, ExtMachInst _machInst,
832  OpClass __opClass, RegIndex _dest, RegIndex _op1,
833  uint64_t _imm) :
834  ArmStaticInst(mnem, _machInst, __opClass),
835  dest(_dest), op1(_op1), imm(_imm)
836  {}
837  std::string generateDisassembly(
838  Addr pc, const loader::SymbolTable *symtab) const override;
839 };
840 
843 {
844  protected:
846  uint64_t imm;
847 
848  SveBinImmIdxUnpredOp(const char* mnem, ExtMachInst _machInst,
849  OpClass __opClass, RegIndex _dest, RegIndex _op1,
850  uint64_t _imm) :
851  ArmStaticInst(mnem, _machInst, __opClass),
852  dest(_dest), op1(_op1), imm(_imm)
853  {}
854 
855  std::string generateDisassembly(
856  Addr pc, const loader::SymbolTable *symtab) const override;
857 };
858 
861 {
862  protected:
864  bool simdFp;
865 
866  SveUnarySca2VecUnpredOp(const char* mnem, ExtMachInst _machInst,
867  OpClass __opClass, RegIndex _dest, RegIndex _op1,
868  bool _simdFp) :
869  ArmStaticInst(mnem, _machInst, __opClass),
870  dest(_dest), op1(_op1), simdFp(_simdFp)
871  {}
872 
873  std::string generateDisassembly(
874  Addr pc, const loader::SymbolTable *symtab) const override;
875 };
876 
879 {
880  protected:
882  uint64_t imm;
883  uint8_t esize;
884 
885  public:
886  SveDotProdIdxOp(const char* mnem, ExtMachInst _machInst,
887  OpClass __opClass, RegIndex _dest, RegIndex _op1,
888  RegIndex _op2, uint64_t _imm) :
889  ArmStaticInst(mnem, _machInst, __opClass),
890  dest(_dest), op1(_op1), op2(_op2), imm(_imm)
891  {}
892 
893  std::string generateDisassembly(
894  Addr pc, const loader::SymbolTable *symtab) const override;
895 };
896 
899 {
900  protected:
902  uint8_t esize;
903 
904  public:
905  SveDotProdOp(const char* mnem, ExtMachInst _machInst,
906  OpClass __opClass, RegIndex _dest, RegIndex _op1,
907  RegIndex _op2) :
908  ArmStaticInst(mnem, _machInst, __opClass),
909  dest(_dest), op1(_op1), op2(_op2)
910  {}
911 
912  std::string generateDisassembly(
913  Addr pc, const loader::SymbolTable *symtab) const override;
914 };
915 
918 {
919  protected:
921  uint8_t rot;
922 
923  public:
924  SveComplexOp(const char* mnem, ExtMachInst _machInst,
925  OpClass __opClass, RegIndex _dest, RegIndex _op1,
926  RegIndex _op2, RegIndex _gp, uint8_t _rot) :
927  ArmStaticInst(mnem, _machInst, __opClass),
928  dest(_dest), op1(_op1), op2(_op2), gp(_gp), rot(_rot)
929  {}
930 
931  std::string generateDisassembly(
932  Addr pc, const loader::SymbolTable *symtab) const override;
933 };
934 
937 {
938  protected:
940  uint8_t rot, imm;
941 
942  public:
943  SveComplexIdxOp(const char* mnem, ExtMachInst _machInst,
944  OpClass __opClass, RegIndex _dest, RegIndex _op1,
945  RegIndex _op2, uint8_t _rot, uint8_t _imm) :
946  ArmStaticInst(mnem, _machInst, __opClass),
947  dest(_dest), op1(_op1), op2(_op2), rot(_rot), imm(_imm)
948  {}
949 
950  std::string generateDisassembly(
951  Addr pc, const loader::SymbolTable *symtab) const override;
952 };
953 
954 
957 std::string sveDisasmPredCountImm(uint8_t imm);
958 
963 unsigned int sveDecodePredCount(uint8_t imm, unsigned int num_elems);
964 
969 uint64_t sveExpandFpImmAddSub(uint8_t imm, uint8_t size);
970 
976 uint64_t sveExpandFpImmMaxMin(uint8_t imm, uint8_t size);
977 
982 uint64_t sveExpandFpImmMul(uint8_t imm, uint8_t size);
983 
984 } // namespace ArmISA
985 } // namespace gem5
986 
987 #endif // __ARCH_ARM_INSTS_SVE_HH__
SveAdrOffsetFormat offsetFormat
Definition: sve.hh:598
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:517
SveAdrOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, uint8_t _mult, SveAdrOffsetFormat _offsetFormat)
Definition: sve.hh:600
@ SveAdrOffsetUnpackedUnsigned
Definition: sve.hh:592
@ SveAdrOffsetUnpackedSigned
Definition: sve.hh:591
Binary, constructive, predicated SVE instruction.
Definition: sve.hh:341
SveBinConstrPredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, RegIndex _gp, SvePredType _predType)
Definition: sve.hh:346
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:290
Binary, destructive, predicated (merging) SVE instruction.
Definition: sve.hh:324
SveBinDestrPredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op2, RegIndex _gp)
Definition: sve.hh:328
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:274
Binary, unpredicated SVE instruction.
Definition: sve.hh:376
SveBinIdxUnpredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, uint8_t _index)
Definition: sve.hh:381
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:323
Binary with immediate index, destructive, unpredicated SVE instruction.
Definition: sve.hh:843
SveBinImmIdxUnpredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, uint64_t _imm)
Definition: sve.hh:848
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:734
Binary with immediate, destructive, predicated (merging) SVE instruction.
Definition: sve.hh:289
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:244
SveBinImmPredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, uint64_t _imm, RegIndex _gp)
Definition: sve.hh:294
Binary with immediate, destructive, unpredicated SVE instruction.
Definition: sve.hh:271
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:230
SveBinImmUnpredConstrOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, uint64_t _imm)
Definition: sve.hh:276
SVE vector - immediate binary operation.
Definition: sve.hh:825
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:718
SveBinImmUnpredDestrOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, uint64_t _imm)
Definition: sve.hh:831
Binary, unpredicated SVE instruction with indexed operand.
Definition: sve.hh:360
SveBinUnpredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2)
Definition: sve.hh:364
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:309
Binary with wide immediate, destructive, unpredicated SVE instruction.
Definition: sve.hh:306
SveBinWideImmUnpredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, uint64_t _imm)
Definition: sve.hh:311
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:260
SVE compare-with-immediate instructions, predicated (zeroing).
Definition: sve.hh:446
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:389
SveCmpImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, uint64_t _imm, RegIndex _gp)
Definition: sve.hh:451
SVE compare instructions, predicated (zeroing).
Definition: sve.hh:429
SveCmpOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, RegIndex _gp)
Definition: sve.hh:433
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:374
Compare and terminate loop SVE instruction.
Definition: sve.hh:185
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:165
SveCompTermOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _op1, RegIndex _op2)
Definition: sve.hh:189
SVE Complex Instructions (indexed)
Definition: sve.hh:937
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:816
SveComplexIdxOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, uint8_t _rot, uint8_t _imm)
Definition: sve.hh:943
SVE Complex Instructions (vectors)
Definition: sve.hh:918
SveComplexOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, RegIndex _gp, uint8_t _rot)
Definition: sve.hh:924
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:796
SVE dot product instruction (indexed)
Definition: sve.hh:879
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:765
SveDotProdIdxOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, uint64_t _imm)
Definition: sve.hh:886
SVE dot product instruction (vectors)
Definition: sve.hh:899
SveDotProdOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2)
Definition: sve.hh:905
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:782
Element count SVE instruction.
Definition: sve.hh:614
SveElemCountOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, uint8_t _pattern, uint8_t _imm, bool _dstIsVec, bool _dstIs32b)
Definition: sve.hh:623
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:541
Index generation instruction, immediate operands.
Definition: sve.hh:61
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:96
SveIndexIIOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, int8_t _imm1, int8_t _imm2)
Definition: sve.hh:67
SveIndexIROp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, int8_t _imm1, RegIndex _op2)
Definition: sve.hh:84
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:107
SveIndexRIOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, int8_t _imm2)
Definition: sve.hh:101
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:119
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:132
SveIndexRROp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2)
Definition: sve.hh:118
Integer compare with immediate SVE instruction.
Definition: sve.hh:567
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:501
SveIntCmpImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, int64_t _imm, RegIndex _gp)
Definition: sve.hh:574
Integer compare SVE instruction.
Definition: sve.hh:548
SveIntCmpOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, RegIndex _gp, bool _op2IsWide=false)
Definition: sve.hh:555
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:481
SVE ordered reductions.
Definition: sve.hh:515
SveOrdReducOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _gp)
Definition: sve.hh:519
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:451
Partition break SVE instruction.
Definition: sve.hh:636
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:569
SvePartBrkOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _gp, RegIndex _op1, bool _isMerging)
Definition: sve.hh:643
Partition break with propagation SVE instruction.
Definition: sve.hh:655
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:583
SvePartBrkPropOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, RegIndex _gp)
Definition: sve.hh:662
Predicate binary permute instruction.
Definition: sve.hh:412
SvePredBinPermOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2)
Definition: sve.hh:416
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:360
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:75
SvePredCountOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _gp, bool _srcIs32b=false, bool _destIsVec=false)
Definition: sve.hh:137
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:61
SvePredCountPredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _gp)
Definition: sve.hh:156
Predicate logical instruction.
Definition: sve.hh:394
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:340
SvePredLogicalOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, RegIndex _gp, bool _isSel=false)
Definition: sve.hh:399
SVE predicate test.
Definition: sve.hh:750
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:664
SvePredTestOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _op1, RegIndex _gp)
Definition: sve.hh:755
SVE unary predicate instructions with implicit destination operand.
Definition: sve.hh:798
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:699
SvePredUnaryWImplicitDstOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _op1)
Definition: sve.hh:802
SVE unary predicate instructions with implicit source operand.
Definition: sve.hh:766
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:676
SvePredUnaryWImplicitSrcOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest)
Definition: sve.hh:770
SVE unary predicate instructions, predicated, with implicit source operand.
Definition: sve.hh:781
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:686
SvePredUnaryWImplicitSrcPredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _gp)
Definition: sve.hh:786
PTRUE, PTRUES.
Definition: sve.hh:531
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:467
SvePtrueOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, uint8_t _imm)
Definition: sve.hh:536
SVE reductions.
Definition: sve.hh:499
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:437
SveReducOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _gp)
Definition: sve.hh:503
Scalar element select SVE instruction.
Definition: sve.hh:674
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:599
SveSelectOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _gp, bool _conditional, bool _scalar, bool _simdFp)
Definition: sve.hh:684
SVE table lookup/permute using vector of element indices (TBL)
Definition: sve.hh:717
SveTblOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2)
Definition: sve.hh:723
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:639
Ternary with immediate, destructive, unpredicated SVE instruction.
Definition: sve.hh:481
SveTerImmUnpredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op2, uint64_t _imm)
Definition: sve.hh:486
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:421
Ternary, destructive, predicated (merging) SVE instruction.
Definition: sve.hh:464
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:405
SveTerPredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, RegIndex _gp)
Definition: sve.hh:468
Unary, constructive, predicated (merging) SVE instruction.
Definition: sve.hh:200
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:177
SveUnaryPredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _gp)
Definition: sve.hh:204
SVE unary operation on predicate (predicated)
Definition: sve.hh:699
SveUnaryPredPredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _gp)
Definition: sve.hh:705
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:625
Unary unpredicated scalar to vector instruction.
Definition: sve.hh:861
SveUnarySca2VecUnpredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, bool _simdFp)
Definition: sve.hh:866
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:749
Unary, constructive, unpredicated SVE instruction.
Definition: sve.hh:216
SveUnaryUnpredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1)
Definition: sve.hh:220
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:191
Unary with wide immediate, constructive, predicated SVE instruction.
Definition: sve.hh:250
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:215
SveUnaryWideImmPredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, uint64_t _imm, RegIndex _gp, bool _isMerging)
Definition: sve.hh:258
Unary with wide immediate, constructive, unpredicated SVE instruction.
Definition: sve.hh:232
SveUnaryWideImmUnpredOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, uint64_t _imm)
Definition: sve.hh:237
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:203
SVE unpack and widen predicate.
Definition: sve.hh:734
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:652
SveUnpackOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1)
Definition: sve.hh:739
SVE unary predicate instructions with implicit destination operand.
Definition: sve.hh:813
SveWImplicitSrcDstOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
Definition: sve.hh:815
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:709
While predicate generation SVE instruction.
Definition: sve.hh:168
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: sve.cc:146
SveWhileOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, bool _srcIs32b)
Definition: sve.hh:173
SvePredType
Definition: sve.hh:49
Bitfield< 7, 0 > imm
Definition: types.hh:132
uint64_t sveExpandFpImmAddSub(uint8_t imm, uint8_t size)
Expand 1-bit floating-point immediate to 0.5 or 1.0 (FADD, FSUB, FSUBR).
Definition: sve.cc:910
unsigned int sveDecodePredCount(uint8_t imm, unsigned int num_elems)
Returns the actual number of elements active for PTRUE(S) instructions.
Definition: sve.cc:867
const char * svePredTypeToStr(SvePredType pt)
Returns the specifier for the predication type pt as a string.
Definition: sve.cc:48
std::string sveDisasmPredCountImm(uint8_t imm)
Returns the symbolic name associated with pattern imm for PTRUE(S) instructions.
Definition: sve.cc:835
uint64_t sveExpandFpImmMul(uint8_t imm, uint8_t size)
Expand 1-bit floating-point immediate to 0.5 or 2.0 (FMUL).
Definition: sve.cc:951
uint64_t sveExpandFpImmMaxMin(uint8_t imm, uint8_t size)
Expand 1-bit floating-point immediate to 0.0 or 1.0 (FMAX, FMAXNM, FMIN, FMINNM).
Definition: sve.cc:932
Bitfield< 4 > pc
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint16_t RegIndex
Definition: types.hh:176
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147

Generated on Wed Dec 21 2022 10:22:26 for gem5 by doxygen 1.9.1