gem5  v22.1.0.0
tage_sc_l_64KB.hh
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1 /*
2  * Copyright (c) 2018 Metempsy Technology Consulting
3  * All rights reserved.
4  *
5  * Copyright (c) 2006 INRIA (Institut National de Recherche en
6  * Informatique et en Automatique / French National Research Institute
7  * for Computer Science and Applied Mathematics)
8  *
9  * All rights reserved.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions are
13  * met: redistributions of source code must retain the above copyright
14  * notice, this list of conditions and the following disclaimer;
15  * redistributions in binary form must reproduce the above copyright
16  * notice, this list of conditions and the following disclaimer in the
17  * documentation and/or other materials provided with the distribution;
18  * neither the name of the copyright holders nor the names of its
19  * contributors may be used to endorse or promote products derived from
20  * this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  *
34  * Author: AndrĂ© Seznec, Pau Cabre, Javier Bueno
35  *
36  */
37 
38 /*
39  * 64KB TAGE-SC-L branch predictor (devised by Andre Seznec)
40  *
41  * Most of the code in this file has been adapted from cbp64KB/predictor.h in
42  * http://www.jilp.org/cbp2016/code/AndreSeznecLimited.tar.gz
43  */
44 
45 #ifndef __CPU_PRED_TAGE_SC_L_64KB_HH__
46 #define __CPU_PRED_TAGE_SC_L_64KB_HH__
47 
48 #include "cpu/pred/tage_sc_l.hh"
49 #include "params/TAGE_SC_L_64KB.hh"
50 #include "params/TAGE_SC_L_64KB_StatisticalCorrector.hh"
51 #include "params/TAGE_SC_L_TAGE_64KB.hh"
52 
53 namespace gem5
54 {
55 
56 namespace branch_prediction
57 {
58 
60 {
61  public:
62  TAGE_SC_L_TAGE_64KB(const TAGE_SC_L_TAGE_64KBParams &p) : TAGE_SC_L_TAGE(p)
63  {}
64 
65  int gindex_ext(int index, int bank) const override;
66 
67  uint16_t gtag(ThreadID tid, Addr pc, int bank) const override;
68 
70  bool alloc, bool taken, TAGEBase::BranchInfo* bi, int nrand) override;
71 
72  void handleTAGEUpdate(
73  Addr branch_pc, bool taken, TAGEBase::BranchInfo* bi) override;
74 };
75 
77 {
80 
81  // global branch history variation GEHL
82  const unsigned pnb;
83  const unsigned logPnb;
87 
88  // Second local history GEHL
89  const unsigned snb;
90  const unsigned logSnb;
94 
95  // Third local history GEHL
96  const unsigned tnb;
97  const unsigned logTnb;
101 
102  // Second IMLI GEHL
103  const unsigned imnb;
104  const unsigned logImnb;
108 
110  {
112  };
113 
115 
116  public:
118  const TAGE_SC_L_64KB_StatisticalCorrectorParams &p);
119 
120  unsigned getIndBiasBank(Addr branch_pc, BranchInfo* bi, int hitBank,
121  int altBank) const override;
122 
123  int gPredictions(ThreadID tid, Addr branch_pc, BranchInfo* bi,
124  int & lsum, int64_t phist) override;
125 
126  int gIndexLogsSubstr(int nbr, int i) override;
127 
128  void scHistoryUpdate(Addr branch_pc, const StaticInstPtr &inst, bool taken,
129  BranchInfo * tage_bi, Addr corrTarget) override;
130 
131  void gUpdates(ThreadID tid, Addr pc, bool taken, BranchInfo* bi,
132  int64_t phist) override;
133 };
134 
135 class TAGE_SC_L_64KB : public TAGE_SC_L
136 {
137  public:
138  TAGE_SC_L_64KB(const TAGE_SC_L_64KBParams &params);
139 };
140 
141 } // namespace branch_prediction
142 } // namespace gem5
143 
144 #endif // __CPU_PRED_TAGE_SC_L_64KB_HH__
void scHistoryUpdate(Addr branch_pc, const StaticInstPtr &inst, bool taken, BranchInfo *tage_bi, Addr corrTarget) override
void gUpdates(ThreadID tid, Addr pc, bool taken, BranchInfo *bi, int64_t phist) override
int gPredictions(ThreadID tid, Addr branch_pc, BranchInfo *bi, int &lsum, int64_t phist) override
unsigned getIndBiasBank(Addr branch_pc, BranchInfo *bi, int hitBank, int altBank) const override
TAGE_SC_L_64KB_StatisticalCorrector(const TAGE_SC_L_64KB_StatisticalCorrectorParams &p)
TAGE_SC_L_64KB(const TAGE_SC_L_64KBParams &params)
void handleTAGEUpdate(Addr branch_pc, bool taken, TAGEBase::BranchInfo *bi) override
Handles the update of the TAGE entries.
TAGE_SC_L_TAGE_64KB(const TAGE_SC_L_TAGE_64KBParams &p)
uint16_t gtag(ThreadID tid, Addr pc, int bank) const override
Computes the partial tag of a tagged table.
int gindex_ext(int index, int bank) const override
void handleAllocAndUReset(bool alloc, bool taken, TAGEBase::BranchInfo *bi, int nrand) override
Handles Allocation and U bits reset on an update.
const Params & params() const
Definition: sim_object.hh:176
Bitfield< 7 > i
Definition: misc_types.hh:67
Bitfield< 4 > pc
Bitfield< 30, 0 > index
Bitfield< 20, 16 > bi
Definition: types.hh:80
Bitfield< 54 > p
Definition: pagetable.hh:70
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
int16_t ThreadID
Thread index/ID type.
Definition: types.hh:235
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147

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