gem5 v24.0.0.0
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tage_sc_l.hh
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1/*
2 * Copyright (c) 2022-2023 The University of Edinburgh
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2018 Metempsy Technology Consulting
15 * All rights reserved.
16 *
17 * Copyright (c) 2006 INRIA (Institut National de Recherche en
18 * Informatique et en Automatique / French National Research Institute
19 * for Computer Science and Applied Mathematics)
20 *
21 * All rights reserved.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions are
25 * met: redistributions of source code must retain the above copyright
26 * notice, this list of conditions and the following disclaimer;
27 * redistributions in binary form must reproduce the above copyright
28 * notice, this list of conditions and the following disclaimer in the
29 * documentation and/or other materials provided with the distribution;
30 * neither the name of the copyright holders nor the names of its
31 * contributors may be used to endorse or promote products derived from
32 * this software without specific prior written permission.
33 *
34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 *
46 * Author: André Seznec, Pau Cabre, Javier Bueno
47 *
48 */
49
50/*
51 * TAGE-SC-L branch predictor base class (devised by Andre Seznec)
52 * It consits of a TAGE + a statistical corrector (SC) + a loop predictor (L)
53 */
54
55#ifndef __CPU_PRED_TAGE_SC_L_HH__
56#define __CPU_PRED_TAGE_SC_L_HH__
57
58#include "cpu/pred/ltage.hh"
60#include "params/TAGE_SC_L.hh"
61#include "params/TAGE_SC_L_LoopPredictor.hh"
62#include "params/TAGE_SC_L_TAGE.hh"
63
64namespace gem5
65{
66
67namespace branch_prediction
68{
69
71{
72 const unsigned firstLongTagTable;
73 const unsigned longTagsSize;
74 const unsigned shortTagsSize;
75
76 const unsigned logTagTableSize;
77
78 const unsigned shortTagsTageFactor;
79 const unsigned longTagsTageFactor;
80
81 const bool truncatePathHist;
82
83 public:
85 {
86 bool lowConf;
88 bool altConf;
89 bool medConf;
91 lowConf(false), highConf(false), altConf(false), medConf(false)
92 {}
93 virtual ~BranchInfo()
94 {}
95 };
96
97 virtual TAGEBase::BranchInfo *makeBranchInfo() override;
98
109
110 void calculateParameters() override;
111
112 void buildTageTables() override;
113
115 ThreadID tid, Addr branch_pc, TAGEBase::BranchInfo* bi) override;
116
117 unsigned getUseAltIdx(TAGEBase::BranchInfo* bi, Addr branch_pc) override;
118
119 void updateHistories(
120 ThreadID tid, Addr branch_pc, bool taken, TAGEBase::BranchInfo* b,
121 bool speculative, const StaticInstPtr &inst,
122 Addr target) override;
123
124 int bindex(Addr pc_in) const override;
125 int gindex(ThreadID tid, Addr pc, int bank) const override;
126 virtual int gindex_ext(int index, int bank) const = 0;
127 int F(int phist, int size, int bank) const override;
128
129 virtual uint16_t gtag(ThreadID tid, Addr pc, int bank) const override = 0;
130
131 void squash(ThreadID tid, bool taken, TAGEBase::BranchInfo *bi,
132 Addr target) override;
133
135 ThreadHistory & tHist, int brtype, bool taken,
136 Addr branch_pc, Addr target);
137
138 void adjustAlloc(bool & alloc, bool taken, bool pred_taken) override;
139
140 virtual void handleAllocAndUReset(bool alloc, bool taken,
141 TAGEBase::BranchInfo* bi, int nrand) override = 0;
142
143 void handleUReset() override;
144
145 virtual void handleTAGEUpdate(
146 Addr branch_pc, bool taken, TAGEBase::BranchInfo* bi) override = 0;
147
149
150 bool getBimodePred(Addr branch_pc,
151 TAGEBase::BranchInfo* tage_bi) const override;
152
153 void extraAltCalc(TAGEBase::BranchInfo* bi) override;
154
155};
156
158{
159 public:
160 TAGE_SC_L_LoopPredictor(const TAGE_SC_L_LoopPredictorParams &p)
162 {}
163
164 virtual bool calcConf(int index) const override;
165 virtual bool optionalAgeInc() const override;
166};
167
168class TAGE_SC_L: public LTAGE
169{
171 public:
172 TAGE_SC_L(const TAGE_SC_LParams &params);
173
174 bool predict(ThreadID tid, Addr pc, bool cond_branch, void* &b) override;
175
176 void update(ThreadID tid, Addr pc, bool taken,
177 void * &bp_history, bool squashed,
178 const StaticInstPtr & inst, Addr target) override;
179
180 protected:
181
183 {
185
187 LoopPredictor &lp)
188 : LTageBranchInfo(tage, lp), scBranchInfo(sc.makeBranchInfo())
189 {}
190
192 {
193 delete scBranchInfo;
194 }
195 };
196
197 // more provider types
198 enum
199 {
201 };
202
203};
204
205} // namespace branch_prediction
206} // namespace gem5
207
208#endif // __CPU_PRED_TAGE_SC_L_HH__
TAGE_SC_L_LoopPredictor(const TAGE_SC_L_LoopPredictorParams &p)
Definition tage_sc_l.hh:160
virtual bool optionalAgeInc() const override
Definition tage_sc_l.cc:74
virtual bool calcConf(int index) const override
Definition tage_sc_l.cc:67
void updatePathAndGlobalHistory(ThreadHistory &tHist, int brtype, bool taken, Addr branch_pc, Addr target)
Definition tage_sc_l.cc:242
virtual void handleAllocAndUReset(bool alloc, bool taken, TAGEBase::BranchInfo *bi, int nrand) override=0
Handles Allocation and U bits reset on an update.
void extraAltCalc(TAGEBase::BranchInfo *bi) override
Extra steps for calculating altTaken For this base TAGE class it does nothing.
Definition tage_sc_l.cc:368
void calculateIndicesAndTags(ThreadID tid, Addr branch_pc, TAGEBase::BranchInfo *bi) override
On a prediction, calculates the TAGE indices and tags for all the different history lengths.
Definition tage_sc_l.cc:140
int bindex(Addr pc_in) const override
Computes the index used to access the bimodal table.
Definition tage_sc_l.cc:235
int calcDep(TAGEBase::BranchInfo *bi)
Definition tage_sc_l.cc:317
bool getBimodePred(Addr branch_pc, TAGEBase::BranchInfo *tage_bi) const override
Get a branch prediction from the bimodal predictor.
Definition tage_sc_l.cc:352
TAGE_SC_L_TAGE(const TAGE_SC_L_TAGEParams &p)
Definition tage_sc_l.hh:99
virtual void handleTAGEUpdate(Addr branch_pc, bool taken, TAGEBase::BranchInfo *bi) override=0
Handles the update of the TAGE entries.
virtual TAGEBase::BranchInfo * makeBranchInfo() override
Definition tage_sc_l.cc:85
int gindex(ThreadID tid, Addr pc, int bank) const override
Computes the index used to access a partially tagged table.
Definition tage_sc_l.cc:192
virtual int gindex_ext(int index, int bank) const =0
int F(int phist, int size, int bank) const override
Utility function to shuffle the path history depending on which tagged table we are accessing.
Definition tage_sc_l.cc:211
void calculateParameters() override
Calculates the history lengths and some other paramters in derived classes.
Definition tage_sc_l.cc:90
void squash(ThreadID tid, bool taken, TAGEBase::BranchInfo *bi, Addr target) override
Restores speculatively updated path and direction histories.
Definition tage_sc_l.cc:301
void adjustAlloc(bool &alloc, bool taken, bool pred_taken) override
Extra calculation to tell whether TAGE allocaitons may happen or not on an update For this base TAGE ...
Definition tage_sc_l.cc:308
void buildTageTables() override
Instantiates the TAGE table entries.
Definition tage_sc_l.cc:123
unsigned getUseAltIdx(TAGEBase::BranchInfo *bi, Addr branch_pc) override
Calculation of the index for useAltPredForNewlyAllocated On this base TAGE implementation it is alway...
Definition tage_sc_l.cc:183
virtual uint16_t gtag(ThreadID tid, Addr pc, int bank) const override=0
Computes the partial tag of a tagged table.
void updateHistories(ThreadID tid, Addr branch_pc, bool taken, TAGEBase::BranchInfo *b, bool speculative, const StaticInstPtr &inst, Addr target) override
(Speculatively) updates global histories (path and direction).
Definition tage_sc_l.cc:277
void handleUReset() override
Handles the U bits reset.
Definition tage_sc_l.cc:328
bool predict(ThreadID tid, Addr pc, bool cond_branch, void *&b) override
Get a branch prediction from LTAGE.
Definition tage_sc_l.cc:377
void update(ThreadID tid, Addr pc, bool taken, void *&bp_history, bool squashed, const StaticInstPtr &inst, Addr target) override
Updates the BP with taken/not taken information.
Definition tage_sc_l.cc:425
TAGE_SC_L(const TAGE_SC_LParams &params)
Definition tage_sc_l.cc:79
StatisticalCorrector * statisticalCorrector
Definition tage_sc_l.hh:170
const Params & params() const
Bitfield< 7 > b
Bitfield< 4 > pc
Bitfield< 30, 0 > index
Bitfield< 0 > p
Bitfield< 20, 16 > bi
Definition types.hh:80
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
int16_t ThreadID
Thread index/ID type.
Definition types.hh:235
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
TageSCLBranchInfo(TAGEBase &tage, StatisticalCorrector &sc, LoopPredictor &lp)
Definition tage_sc_l.hh:186
StatisticalCorrector::BranchInfo * scBranchInfo
Definition tage_sc_l.hh:184

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