gem5 v24.0.0.0
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tage_sc_l_8KB.hh
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1/*
2 * Copyright (c) 2018 Metempsy Technology Consulting
3 * All rights reserved.
4 *
5 * Copyright (c) 2006 INRIA (Institut National de Recherche en
6 * Informatique et en Automatique / French National Research Institute
7 * for Computer Science and Applied Mathematics)
8 *
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions are
13 * met: redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer;
15 * redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution;
18 * neither the name of the copyright holders nor the names of its
19 * contributors may be used to endorse or promote products derived from
20 * this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
23 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
24 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
25 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 * Author: André Seznec, Pau Cabre, Javier Bueno
35 *
36 */
37
38/*
39 * 8KB TAGE-SC-L branch predictor (devised by Andre Seznec)
40 */
41
42#ifndef __CPU_PRED_TAGE_SC_L_8KB_HH__
43#define __CPU_PRED_TAGE_SC_L_8KB_HH__
44
45#include "cpu/pred/tage_sc_l.hh"
46#include "params/TAGE_SC_L_8KB.hh"
47#include "params/TAGE_SC_L_8KB_StatisticalCorrector.hh"
48#include "params/TAGE_SC_L_TAGE_8KB.hh"
49
50namespace gem5
51{
52
53namespace branch_prediction
54{
55
57{
58 public:
59 TAGE_SC_L_TAGE_8KB(const TAGE_SC_L_TAGE_8KBParams &p) : TAGE_SC_L_TAGE(p)
60 {}
61
62 void initFoldedHistories(ThreadHistory & history) override;
63 int gindex_ext(int index, int bank) const override;
64
65 uint16_t gtag(ThreadID tid, Addr pc, int bank) const override;
66
68 bool alloc, bool taken, TAGEBase::BranchInfo* bi, int nrand) override;
69
71 Addr branch_pc, bool taken, TAGEBase::BranchInfo* bi) override;
72
73 void resetUctr(uint8_t & u) override;
74};
75
77{
78 // global branch history GEHL
79 const unsigned gnb;
80 const unsigned logGnb;
84
86 {
90 int64_t globalHist; // global history
91 };
92
94
95 public:
97 const TAGE_SC_L_8KB_StatisticalCorrectorParams &p);
98
99 unsigned getIndBiasBank( Addr branch_pc, BranchInfo* bi, int hitBank,
100 int altBank) const override;
101
102 int gPredictions( ThreadID tid, Addr branch_pc,
103 BranchInfo* bi, int & lsum, int64_t phist) override;
104
105 int gIndexLogsSubstr(int nbr, int i) override;
106
107 void scHistoryUpdate(
108 Addr branch_pc, const StaticInstPtr &inst, bool taken,
109 BranchInfo * tage_bi, Addr corrTarget) override;
110
111 void gUpdates(ThreadID tid, Addr pc, bool taken, BranchInfo* bi,
112 int64_t phist) override;
113};
114
116{
117 public:
118 TAGE_SC_L_8KB(const TAGE_SC_L_8KBParams &params);
119};
120
121} // namespace branch_prediction
122} // namespace gem5
123
124#endif // __CPU_PRED_TAGE_SC_L_8KB_HH__
TAGE_SC_L_8KB_StatisticalCorrector(const TAGE_SC_L_8KB_StatisticalCorrectorParams &p)
void scHistoryUpdate(Addr branch_pc, const StaticInstPtr &inst, bool taken, BranchInfo *tage_bi, Addr corrTarget) override
unsigned getIndBiasBank(Addr branch_pc, BranchInfo *bi, int hitBank, int altBank) const override
int gPredictions(ThreadID tid, Addr branch_pc, BranchInfo *bi, int &lsum, int64_t phist) override
void gUpdates(ThreadID tid, Addr pc, bool taken, BranchInfo *bi, int64_t phist) override
TAGE_SC_L_8KB(const TAGE_SC_L_8KBParams &params)
void handleAllocAndUReset(bool alloc, bool taken, TAGEBase::BranchInfo *bi, int nrand) override
Handles Allocation and U bits reset on an update.
uint16_t gtag(ThreadID tid, Addr pc, int bank) const override
Computes the partial tag of a tagged table.
TAGE_SC_L_TAGE_8KB(const TAGE_SC_L_TAGE_8KBParams &p)
void initFoldedHistories(ThreadHistory &history) override
Initialization of the folded histories.
int gindex_ext(int index, int bank) const override
void resetUctr(uint8_t &u) override
Algorithm for resetting a single U counter.
void handleTAGEUpdate(Addr branch_pc, bool taken, TAGEBase::BranchInfo *bi) override
Handles the update of the TAGE entries.
STL vector class.
Definition stl.hh:37
const Params & params() const
Bitfield< 7 > i
Definition misc_types.hh:67
Bitfield< 22 > u
Bitfield< 4 > pc
Bitfield< 30, 0 > index
Bitfield< 0 > p
Bitfield< 20, 16 > bi
Definition types.hh:80
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
int16_t ThreadID
Thread index/ID type.
Definition types.hh:235
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147

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