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HsailISA::Call Member List

This is the complete list of members for HsailISA::Call, including all inherited members.

_flagsGPUStaticInstprotected
_instAddrGPUStaticInstprotected
_instNumGPUStaticInstprotected
_ipdInstNumGPUStaticInstprotected
calcAddr(Wavefront *w, GPUDynInstPtr m)HsailISA::Call
Call(const Brig::BrigInstBase *ib, const BrigObject *obj)HsailISA::Callinline
completeAcc(GPUDynInstPtr gpuDynInst)GPUStaticInstinlinevirtual
destHsailISA::Call
disassemble()GPUStaticInst
disassemblyGPUStaticInstprotected
dynamic_id_countGPUStaticInststatic
execAtomic(GPUDynInstPtr gpuDynInst)GPUStaticInstinlinevirtual
execAtomicAcq(GPUDynInstPtr gpuDynInst)GPUStaticInstinlinevirtual
execLdAcq(GPUDynInstPtr gpuDynInst)GPUStaticInstinlinevirtual
execPseudoInst(Wavefront *w, GPUDynInstPtr gpuDynInst)HsailISA::Call
execSt(GPUDynInstPtr gpuDynInst)GPUStaticInstinlinevirtual
execute(GPUDynInstPtr gpuDynInst)HsailISA::Callinlinevirtual
executed_asGPUStaticInst
func_ptrHsailISA::Call
generateDisassembly()HsailISA::Callinlinevirtual
getNumOperands()HsailISA::Callinlinevirtual
getOperandSize(int operandIndex)HsailISA::Callinlinevirtual
getRegisterIndex(int operandIndex, GPUDynInstPtr gpuDynInst)HsailISA::Callinlinevirtual
getTargetPc()GPUStaticInstinlinevirtual
GPUStaticInst(const std::string &opcode)GPUStaticInst
hsailCodeHsailISA::HsailGPUStaticInstprotected
HsailGPUStaticInst(const BrigObject *obj, const std::string &opcode)HsailISA::HsailGPUStaticInst
initiateAcc(GPUDynInstPtr gpuDynInst)GPUStaticInstinlinevirtual
instAddr(int inst_addr)GPUStaticInstinline
instAddr() constGPUStaticInstinline
instNum(int num)GPUStaticInstinline
instNum()GPUStaticInstinline
instSize() const overrideHsailISA::HsailGPUStaticInstinlinevirtual
ipdInstNum(int num)GPUStaticInstinline
ipdInstNum() constGPUStaticInstinline
isAcquire() constGPUStaticInstinline
isAcquireRelease() constGPUStaticInstinline
isALU() constGPUStaticInstinline
isArgLoad() constGPUStaticInstinline
isArgSeg() constGPUStaticInstinline
isAtomic() constGPUStaticInstinline
isAtomicAdd() constGPUStaticInstinline
isAtomicAnd() constGPUStaticInstinline
isAtomicCAS() constGPUStaticInstinline
isAtomicDec() constGPUStaticInstinline
isAtomicExch() constGPUStaticInstinline
isAtomicInc() constGPUStaticInstinline
isAtomicMax() constGPUStaticInstinline
isAtomicMin() constGPUStaticInstinline
isAtomicNoRet() constGPUStaticInstinline
isAtomicOr() constGPUStaticInstinline
isAtomicRet() constGPUStaticInstinline
isAtomicSub() constGPUStaticInstinline
isAtomicXor() constGPUStaticInstinline
isBarrier() constGPUStaticInstinline
isBranch() constGPUStaticInstinline
isCondRegister(int operandIndex)HsailISA::Callinlinevirtual
isDeviceScope() constGPUStaticInstinline
isDstOperand(int operandIndex)HsailISA::Callinlinevirtual
isFlat() constGPUStaticInstinline
isGloballyCoherent() constGPUStaticInstinline
isGlobalMem() constGPUStaticInstinline
isGlobalSeg() constGPUStaticInstinline
isGroupSeg() constGPUStaticInstinline
isKernArgSeg() constGPUStaticInstinline
isLoad() constGPUStaticInstinline
isLocalMem() constGPUStaticInstinline
isMemFence() constGPUStaticInstinline
isMemRef() constGPUStaticInstinline
isNoOrder() constGPUStaticInstinline
isNop() constGPUStaticInstinline
isNoScope() constGPUStaticInstinline
isPrivateSeg() constGPUStaticInstinline
isPseudoOp()HsailISA::Callinline
isReadOnlySeg() constGPUStaticInstinline
isRelaxedOrder() constGPUStaticInstinline
isRelease() constGPUStaticInstinline
isReturn() constGPUStaticInstinline
isScalar() constGPUStaticInstinline
isScalarRegister(int operandIndex)HsailISA::Callinlinevirtual
isSpecialOp() constGPUStaticInstinline
isSpillSeg() constGPUStaticInstinline
isSrcOperand(int operandIndex)HsailISA::Callinlinevirtual
isStore() constGPUStaticInstinline
isSystemCoherent() constGPUStaticInstinline
isSystemScope() constGPUStaticInstinline
isUnconditionalJump() constGPUStaticInstinline
isValid() const overrideHsailISA::HsailGPUStaticInstinlinevirtual
isVectorRegister(int operandIndex)HsailISA::Callinlinevirtual
isWaitcnt() constGPUStaticInstinline
isWavefrontScope() constGPUStaticInstinline
isWorkgroupScope() constGPUStaticInstinline
isWorkitemScope() constGPUStaticInstinline
MagicAtomicNRAddGlobalU32Reg(Wavefront *w, GPUDynInstPtr gpuDynInst)HsailISA::Call
MagicAtomicNRAddGroupU32Reg(Wavefront *w, GPUDynInstPtr gpuDynInst)HsailISA::Call
MagicJoinWFBar(Wavefront *w)HsailISA::Call
MagicLoadGlobalU32Reg(Wavefront *w, GPUDynInstPtr gpuDynInst)HsailISA::Call
MagicMaskLower(Wavefront *w)HsailISA::Call
MagicMaskUpper(Wavefront *w)HsailISA::Call
MagicMostSigBroadcast(Wavefront *w)HsailISA::Call
MagicMostSigThread(Wavefront *w)HsailISA::Call
MagicPanic(Wavefront *w)HsailISA::Call
MagicPrefixSum(Wavefront *w)HsailISA::Call
MagicPrintLane(Wavefront *w)HsailISA::Call
MagicPrintLane64(Wavefront *w)HsailISA::Call
MagicPrintWF32(Wavefront *w)HsailISA::Call
MagicPrintWF32ID(Wavefront *w)HsailISA::Call
MagicPrintWF64(Wavefront *w)HsailISA::Call
MagicPrintWFFloat(Wavefront *w)HsailISA::Call
MagicPrintWFID64(Wavefront *w)HsailISA::Call
MagicReduction(Wavefront *w)HsailISA::Call
MagicSimBreak(Wavefront *w)HsailISA::Call
MagicWaitWFBar(Wavefront *w)HsailISA::Call
MagicXactCasLd(Wavefront *w)HsailISA::Call
nextInstAddr() constGPUStaticInstinline
numDstRegOperands()HsailISA::Callinlinevirtual
numSrcRegOperands()HsailISA::Callinlinevirtual
opcodeGPUStaticInstprotected
readsSCC() constGPUStaticInstinline
readsVCC() constGPUStaticInstinline
setFlag(Flags flag)GPUStaticInstinline
src0HsailISA::Call
src1HsailISA::Call
writesSCC() constGPUStaticInstinline
writesVCC() constGPUStaticInstinline

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