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gem5
v19.0.0.0
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gem5
v19.0.0.0
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This is the complete list of members for ThreadContext, including all inherited members.
| activate()=0 | ThreadContext | pure virtual |
| Active enum value | ThreadContext | |
| clearArchRegs()=0 | ThreadContext | pure virtual |
| compare(ThreadContext *one, ThreadContext *two) | ThreadContext | static |
| contextId() const =0 | ThreadContext | pure virtual |
| copyArchRegs(ThreadContext *tc)=0 | ThreadContext | pure virtual |
| cpuId() const =0 | ThreadContext | pure virtual |
| DefaultFloatResult | ThreadContext | static |
| DefaultIntResult | ThreadContext | static |
| descheduleInstCountEvent(Event *event)=0 | ThreadContext | pure virtual |
| dumpFuncProfile()=0 | ThreadContext | pure virtual |
| exit() | ThreadContext | inlinevirtual |
| flattenRegId(const RegId ®Id) const =0 | ThreadContext | pure virtual |
| floatResult | ThreadContext | |
| floats | ThreadContext | static |
| getCheckerCpuPtr()=0 | ThreadContext | pure virtual |
| getCpuPtr()=0 | ThreadContext | pure virtual |
| getCurrentInstCount()=0 | ThreadContext | pure virtual |
| getDecoderPtr()=0 | ThreadContext | pure virtual |
| getDTBPtr()=0 | ThreadContext | pure virtual |
| getIsaPtr()=0 | ThreadContext | pure virtual |
| getITBPtr()=0 | ThreadContext | pure virtual |
| getKernelStats()=0 | ThreadContext | pure virtual |
| getPhysProxy()=0 | ThreadContext | pure virtual |
| getProcessPtr()=0 | ThreadContext | pure virtual |
| getQuiesceEvent()=0 | ThreadContext | pure virtual |
| getSystemPtr()=0 | ThreadContext | pure virtual |
| getVirtProxy()=0 | ThreadContext | pure virtual |
| getWritableVecPredReg(const RegId ®)=0 | ThreadContext | pure virtual |
| getWritableVecPredRegFlat(RegIndex idx)=0 | ThreadContext | pure virtual |
| getWritableVecReg(const RegId ®)=0 | ThreadContext | pure virtual |
| getWritableVecRegFlat(RegIndex idx)=0 | ThreadContext | pure virtual |
| halt()=0 | ThreadContext | pure virtual |
| Halted enum value | ThreadContext | |
| Halting enum value | ThreadContext | |
| initMemProxies(ThreadContext *tc)=0 | ThreadContext | pure virtual |
| instAddr() const =0 | ThreadContext | pure virtual |
| intOffset | ThreadContext | |
| intResult | ThreadContext | |
| ints | ThreadContext | static |
| MachInst typedef | ThreadContext | protected |
| microPC() const =0 | ThreadContext | pure virtual |
| nextInstAddr() const =0 | ThreadContext | pure virtual |
| pcState() const =0 | ThreadContext | pure virtual |
| pcState(const TheISA::PCState &val)=0 | ThreadContext | pure virtual |
| pcStateNoRecord(const TheISA::PCState &val)=0 | ThreadContext | pure virtual |
| profileClear()=0 | ThreadContext | pure virtual |
| profileSample()=0 | ThreadContext | pure virtual |
| quiesce() | ThreadContext | |
| quiesceTick(Tick resume) | ThreadContext | |
| readCCReg(RegIndex reg_idx) const =0 | ThreadContext | pure virtual |
| readCCRegFlat(RegIndex idx) const =0 | ThreadContext | pure virtual |
| readFloatReg(RegIndex reg_idx) const =0 | ThreadContext | pure virtual |
| readFloatRegFlat(RegIndex idx) const =0 | ThreadContext | pure virtual |
| readFuncExeInst() const =0 | ThreadContext | pure virtual |
| readIntReg(RegIndex reg_idx) const =0 | ThreadContext | pure virtual |
| readIntRegFlat(RegIndex idx) const =0 | ThreadContext | pure virtual |
| readLastActivate()=0 | ThreadContext | pure virtual |
| readLastSuspend()=0 | ThreadContext | pure virtual |
| readMiscReg(RegIndex misc_reg)=0 | ThreadContext | pure virtual |
| readMiscRegNoEffect(RegIndex misc_reg) const =0 | ThreadContext | pure virtual |
| readStCondFailures() const =0 | ThreadContext | pure virtual |
| readVec16BitLaneReg(const RegId ®) const =0 | ThreadContext | pure virtual |
| readVec32BitLaneReg(const RegId ®) const =0 | ThreadContext | pure virtual |
| readVec64BitLaneReg(const RegId ®) const =0 | ThreadContext | pure virtual |
| readVec8BitLaneReg(const RegId ®) const =0 | ThreadContext | pure virtual |
| readVecElem(const RegId ®) const =0 | ThreadContext | pure virtual |
| readVecElemFlat(RegIndex idx, const ElemIndex &elemIdx) const =0 | ThreadContext | pure virtual |
| readVecPredReg(const RegId ®) const =0 | ThreadContext | pure virtual |
| readVecPredRegFlat(RegIndex idx) const =0 | ThreadContext | pure virtual |
| readVecReg(const RegId ®) const =0 | ThreadContext | pure virtual |
| readVecRegFlat(RegIndex idx) const =0 | ThreadContext | pure virtual |
| regStats(const std::string &name)=0 | ThreadContext | pure virtual |
| remove(PCEvent *event)=0 | PCEventScope | pure virtual |
| schedule(PCEvent *event)=0 | PCEventScope | pure virtual |
| scheduleInstCountEvent(Event *event, Tick count)=0 | ThreadContext | pure virtual |
| setCCReg(RegIndex reg_idx, RegVal val)=0 | ThreadContext | pure virtual |
| setCCRegFlat(RegIndex idx, RegVal val)=0 | ThreadContext | pure virtual |
| setContextId(ContextID id)=0 | ThreadContext | pure virtual |
| setFloatReg(RegIndex reg_idx, RegVal val)=0 | ThreadContext | pure virtual |
| setFloatRegFlat(RegIndex idx, RegVal val)=0 | ThreadContext | pure virtual |
| setIntReg(RegIndex reg_idx, RegVal val)=0 | ThreadContext | pure virtual |
| setIntRegFlat(RegIndex idx, RegVal val)=0 | ThreadContext | pure virtual |
| setMiscReg(RegIndex misc_reg, RegVal val)=0 | ThreadContext | pure virtual |
| setMiscRegNoEffect(RegIndex misc_reg, RegVal val)=0 | ThreadContext | pure virtual |
| setNPC(Addr val) | ThreadContext | inline |
| setProcessPtr(Process *p)=0 | ThreadContext | pure virtual |
| setStatus(Status new_status)=0 | ThreadContext | pure virtual |
| setStCondFailures(unsigned sc_failures)=0 | ThreadContext | pure virtual |
| setThreadId(int id)=0 | ThreadContext | pure virtual |
| setVecElem(const RegId ®, const VecElem &val)=0 | ThreadContext | pure virtual |
| setVecElemFlat(RegIndex idx, const ElemIndex &elemIdx, const VecElem &val)=0 | ThreadContext | pure virtual |
| setVecLane(const RegId ®, const LaneData< LaneSize::Byte > &val)=0 | ThreadContext | pure virtual |
| setVecLane(const RegId ®, const LaneData< LaneSize::TwoByte > &val)=0 | ThreadContext | pure virtual |
| setVecLane(const RegId ®, const LaneData< LaneSize::FourByte > &val)=0 | ThreadContext | pure virtual |
| setVecLane(const RegId ®, const LaneData< LaneSize::EightByte > &val)=0 | ThreadContext | pure virtual |
| setVecPredReg(const RegId ®, const VecPredRegContainer &val)=0 | ThreadContext | pure virtual |
| setVecPredRegFlat(RegIndex idx, const VecPredRegContainer &val)=0 | ThreadContext | pure virtual |
| setVecReg(const RegId ®, const VecRegContainer &val)=0 | ThreadContext | pure virtual |
| setVecRegFlat(RegIndex idx, const VecRegContainer &val)=0 | ThreadContext | pure virtual |
| socketId() const =0 | ThreadContext | pure virtual |
| status() const =0 | ThreadContext | pure virtual |
| Status enum name | ThreadContext | |
| suspend()=0 | ThreadContext | pure virtual |
| Suspended enum value | ThreadContext | |
| syscall(Fault *fault)=0 | ThreadContext | pure virtual |
| takeOverFrom(ThreadContext *old_context)=0 | ThreadContext | pure virtual |
| threadId() const =0 | ThreadContext | pure virtual |
| VecElem typedef | ThreadContext | protected |
| VecPredRegContainer typedef | ThreadContext | protected |
| VecRegContainer typedef | ThreadContext | protected |
| ~ThreadContext() | ThreadContext | inlinevirtual |