gem5
v20.1.0.0
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The memory controller is a single-channel memory controller capturing the most important timing constraints associated with a contemporary controller. More...
#include <mem_ctrl.hh>
Classes | |
struct | CtrlStats |
class | MemoryPort |
Public Member Functions | |
MemCtrl (const MemCtrlParams *p) | |
bool | allIntfDrained () const |
Ensure that all interfaced have drained commands. More... | |
DrainState | drain () override |
Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are partially executed or are partially in flight. More... | |
Tick | verifySingleCmd (Tick cmd_tick, Tick max_cmds_per_burst) |
Check for command bus contention for single cycle command. More... | |
Tick | verifyMultiCmd (Tick cmd_tick, Tick max_cmds_per_burst, Tick max_multi_cmd_split=0) |
Check for command bus contention for multi-cycle (2 currently) command. More... | |
bool | respondEventScheduled () const |
Is there a respondEvent scheduled? More... | |
bool | requestEventScheduled () const |
Is there a read/write burst Event scheduled? More... | |
void | restartScheduler (Tick tick) |
restart the controller This can be used by interfaces to restart the scheduler after maintainence commands complete More... | |
bool | inReadBusState (bool next_state) const |
Check the current direction of the memory channel. More... | |
bool | inWriteBusState (bool next_state) const |
Check the current direction of the memory channel. More... | |
Port & | getPort (const std::string &if_name, PortID idx=InvalidPortID) override |
Get a port with a given name and index. More... | |
virtual void | init () override |
init() is called after all C++ SimObjects have been created and all ports are connected. More... | |
virtual void | startup () override |
startup() is the final initialization call before simulation. More... | |
virtual void | drainResume () override |
Resume execution after a successful drain. More... | |
Public Member Functions inherited from QoS::MemCtrl | |
MemCtrl (const QoSMemCtrlParams *) | |
QoS Memory base class. More... | |
virtual | ~MemCtrl () |
BusState | getBusState () const |
Gets the current bus state. More... | |
BusState | getBusStateNext () const |
Gets the next bus state. More... | |
bool | hasRequestor (RequestorID id) const |
hasRequestor returns true if the selected requestor(ID) has been registered in the memory controller, which happens if the memory controller has received at least a packet from that requestor. More... | |
uint64_t | getReadQueueSize (const uint8_t prio) const |
Gets a READ queue size. More... | |
uint64_t | getWriteQueueSize (const uint8_t prio) const |
Gets a WRITE queue size. More... | |
uint64_t | getTotalReadQueueSize () const |
Gets the total combined READ queues size. More... | |
uint64_t | getTotalWriteQueueSize () const |
Gets the total combined WRITE queues size. More... | |
Tick | getServiceTick (const uint8_t prio) const |
Gets the last service tick related to a QoS Priority. More... | |
uint8_t | numPriorities () const |
Gets the total number of priority levels in the QoS memory controller. More... | |
System * | system () const |
read the system pointer More... | |
Public Member Functions inherited from ClockedObject | |
ClockedObject (const ClockedObjectParams *p) | |
const Params * | params () const |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
Public Member Functions inherited from SimObject | |
const Params * | params () const |
SimObject (const Params *_params) | |
virtual | ~SimObject () |
virtual const std::string | name () const |
virtual void | loadState (CheckpointIn &cp) |
loadState() is called on each SimObject when restoring from a checkpoint. More... | |
virtual void | initState () |
initState() is called on each SimObject when not restoring from a checkpoint. More... | |
virtual void | regProbePoints () |
Register probe points for this object. More... | |
virtual void | regProbeListeners () |
Register probe listeners for this object. More... | |
ProbeManager * | getProbeManager () |
Get the probe manager for this object. More... | |
DrainState | drain () override |
Provide a default implementation of the drain interface for objects that don't need draining. More... | |
virtual void | memWriteback () |
Write back dirty buffers to memory using functional writes. More... | |
virtual void | memInvalidate () |
Invalidate the contents of memory buffers. More... | |
void | serialize (CheckpointOut &cp) const override |
Serialize an object. More... | |
void | unserialize (CheckpointIn &cp) override |
Unserialize an object. More... | |
Public Member Functions inherited from EventManager | |
EventQueue * | eventQueue () const |
void | schedule (Event &event, Tick when) |
void | deschedule (Event &event) |
void | reschedule (Event &event, Tick when, bool always=false) |
void | schedule (Event *event, Tick when) |
void | deschedule (Event *event) |
void | reschedule (Event *event, Tick when, bool always=false) |
void | wakeupEventQueue (Tick when=(Tick) -1) |
This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More... | |
void | setCurTick (Tick newVal) |
EventManager (EventManager &em) | |
Event manger manages events in the event queue. More... | |
EventManager (EventManager *em) | |
EventManager (EventQueue *eq) | |
Public Member Functions inherited from Serializable | |
Serializable () | |
virtual | ~Serializable () |
void | serializeSection (CheckpointOut &cp, const char *name) const |
Serialize an object into a new section. More... | |
void | serializeSection (CheckpointOut &cp, const std::string &name) const |
void | unserializeSection (CheckpointIn &cp, const char *name) |
Unserialize an a child object. More... | |
void | unserializeSection (CheckpointIn &cp, const std::string &name) |
Public Member Functions inherited from Drainable | |
DrainState | drainState () const |
Return the current drain state of an object. More... | |
virtual void | notifyFork () |
Notify a child process of a fork. More... | |
Public Member Functions inherited from Stats::Group | |
Group (Group *parent, const char *name=nullptr) | |
Construct a new statistics group. More... | |
virtual | ~Group () |
virtual void | regStats () |
Callback to set stat parameters. More... | |
virtual void | resetStats () |
Callback to reset stats. More... | |
virtual void | preDumpStats () |
Callback before stats are dumped. More... | |
void | addStat (Stats::Info *info) |
Register a stat with this group. More... | |
const std::map< std::string, Group * > & | getStatGroups () const |
Get all child groups associated with this object. More... | |
const std::vector< Info * > & | getStats () const |
Get all stats associated with this object. More... | |
void | addStatGroup (const char *name, Group *block) |
Add a stat block as a child of this block. More... | |
const Info * | resolveStat (std::string name) const |
Resolve a stat by its name within this group. More... | |
Group ()=delete | |
Group (const Group &)=delete | |
Group & | operator= (const Group &)=delete |
Public Member Functions inherited from Clocked | |
void | updateClockPeriod () |
Update the tick to the current tick. More... | |
Tick | clockEdge (Cycles cycles=Cycles(0)) const |
Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More... | |
Cycles | curCycle () const |
Determine the current cycle, corresponding to a tick aligned to a clock edge. More... | |
Tick | nextCycle () const |
Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More... | |
uint64_t | frequency () const |
Tick | clockPeriod () const |
double | voltage () const |
Cycles | ticksToCycles (Tick t) const |
Tick | cyclesToTicks (Cycles c) const |
Protected Member Functions | |
Tick | recvAtomic (PacketPtr pkt) |
void | recvFunctional (PacketPtr pkt) |
bool | recvTimingReq (PacketPtr pkt) |
Protected Member Functions inherited from QoS::MemCtrl | |
void | addRequestor (const RequestorID id) |
Initializes dynamically counters and statistics for a given Requestor. More... | |
void | logRequest (BusState dir, RequestorID id, uint8_t qos, Addr addr, uint64_t entries) |
Called upon receiving a request or updates statistics and updates queues status. More... | |
void | logResponse (BusState dir, RequestorID id, uint8_t qos, Addr addr, uint64_t entries, double delay) |
Called upon receiving a response, updates statistics and updates queues status. More... | |
template<typename Queues > | |
uint8_t | qosSchedule (std::initializer_list< Queues * > queues_ptr, uint64_t queue_entry_size, const PacketPtr pkt) |
Assign priority to a packet by executing the configured QoS policy. More... | |
uint8_t | schedule (RequestorID id, uint64_t data) |
uint8_t | schedule (const PacketPtr pkt) |
BusState | selectNextBusState () |
Returns next bus direction (READ or WRITE) based on configured policy. More... | |
void | setCurrentBusState () |
Set current bus direction (READ or WRITE) from next selected one. More... | |
void | recordTurnaroundStats () |
Record statistics on turnarounds based on busStateNext and busState values. More... | |
template<typename Queues > | |
void | escalate (std::initializer_list< Queues * > queues, uint64_t queue_entry_size, RequestorID id, uint8_t tgt_prio) |
Escalates/demotes priority of all packets belonging to the passed requestor to given priority value. More... | |
template<typename Queues > | |
void | escalateQueues (Queues &queues, uint64_t queue_entry_size, RequestorID id, uint8_t curr_prio, uint8_t tgt_prio) |
Escalates/demotes priority of all packets belonging to the passed requestor to given priority value in a specified cluster of queues (e.g. More... | |
Protected Member Functions inherited from Drainable | |
Drainable () | |
virtual | ~Drainable () |
void | signalDrainDone () const |
Signal that an object is drained. More... | |
Protected Member Functions inherited from Clocked | |
Clocked (ClockDomain &clk_domain) | |
Create a clocked object and set the clock domain based on the parameters. More... | |
Clocked (Clocked &)=delete | |
Clocked & | operator= (Clocked &)=delete |
virtual | ~Clocked () |
Virtual destructor due to inheritance. More... | |
void | resetClock () const |
Reset the object's clock using the current global tick value. More... | |
virtual void | clockPeriodUpdated () |
A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More... | |
Private Member Functions | |
void | processNextReqEvent () |
Bunch of things requires to setup "events" in gem5 When event "respondEvent" occurs for example, the method processRespondEvent is called; no parameters are allowed in these methods. More... | |
void | processRespondEvent () |
bool | readQueueFull (unsigned int pkt_count) const |
Check if the read queue has room for more entries. More... | |
bool | writeQueueFull (unsigned int pkt_count) const |
Check if the write queue has room for more entries. More... | |
void | addToReadQueue (PacketPtr pkt, unsigned int pkt_count, bool is_dram) |
When a new read comes in, first check if the write q has a pending request to the same address. If not, decode the address to populate rank/bank/row, create one or mutliple "mem_pkt", and push them to the back of the read queue. More... | |
void | addToWriteQueue (PacketPtr pkt, unsigned int pkt_count, bool is_dram) |
Decode the incoming pkt, create a mem_pkt and push to the back of the write queue. More... | |
void | doBurstAccess (MemPacket *mem_pkt) |
Actually do the burst based on media specific access function. More... | |
void | accessAndRespond (PacketPtr pkt, Tick static_latency) |
When a packet reaches its "readyTime" in the response Q, use the "access()" method in AbstractMemory to actually create the response packet, and send it back to the outside world requestor. More... | |
bool | packetReady (MemPacket *pkt) |
Determine if there is a packet that can issue. More... | |
Tick | minReadToWriteDataGap () |
Calculate the minimum delay used when scheduling a read-to-write transision. More... | |
Tick | minWriteToReadDataGap () |
Calculate the minimum delay used when scheduling a write-to-read transision. More... | |
MemPacketQueue::iterator | chooseNext (MemPacketQueue &queue, Tick extra_col_delay) |
The memory schduler/arbiter - picks which request needs to go next, based on the specified policy such as FCFS or FR-FCFS and moves it to the head of the queue. More... | |
MemPacketQueue::iterator | chooseNextFRFCFS (MemPacketQueue &queue, Tick extra_col_delay) |
For FR-FCFS policy reorder the read/write queue depending on row buffer hits and earliest bursts available in memory. More... | |
Tick | getBurstWindow (Tick cmd_tick) |
Calculate burst window aligned tick. More... | |
void | printQs () const |
Used for debugging to observe the contents of the queues. More... | |
Addr | burstAlign (Addr addr, bool is_dram) const |
Burst-align an address. More... | |
std::vector< MemPacketQueue > & | selQueue (bool is_read) |
Select either the read or write queue. More... | |
void | pruneBurstTick () |
Remove commands that have already issued from burstTicks. More... | |
Private Attributes | |
MemoryPort | port |
Our incoming port, for a multi-ported controller add a crossbar in front of it. More... | |
bool | isTimingMode |
Remember if the memory system is in timing mode. More... | |
bool | retryRdReq |
Remember if we have to retry a request when available. More... | |
bool | retryWrReq |
EventFunctionWrapper | nextReqEvent |
EventFunctionWrapper | respondEvent |
std::vector< MemPacketQueue > | readQueue |
The controller's main read and write queues, with support for QoS reordering. More... | |
std::vector< MemPacketQueue > | writeQueue |
std::unordered_set< Addr > | isInWriteQueue |
To avoid iterating over the write queue to check for overlapping transactions, maintain a set of burst addresses that are currently queued. More... | |
std::deque< MemPacket * > | respQueue |
Response queue where read packets wait after we're done working with them, but it's not time to send the response yet. More... | |
std::unordered_multiset< Tick > | burstTicks |
Holds count of commands issued in burst window starting at defined Tick. More... | |
DRAMInterface *const | dram |
Create pointer to interface of the actual dram media when connected. More... | |
NVMInterface *const | nvm |
Create pointer to interface of the actual nvm media when connected. More... | |
const uint32_t | readBufferSize |
The following are basic design parameters of the memory controller, and are initialized based on parameter values. More... | |
const uint32_t | writeBufferSize |
const uint32_t | writeHighThreshold |
const uint32_t | writeLowThreshold |
const uint32_t | minWritesPerSwitch |
uint32_t | writesThisTime |
uint32_t | readsThisTime |
Enums::MemSched | memSchedPolicy |
Memory controller configuration initialized based on parameter values. More... | |
const Tick | frontendLatency |
Pipeline latency of the controller frontend. More... | |
const Tick | backendLatency |
Pipeline latency of the backend and PHY. More... | |
const Tick | commandWindow |
Length of a command window, used to check command bandwidth. More... | |
Tick | nextBurstAt |
Till when must we wait before issuing next RD/WR burst? More... | |
Tick | prevArrival |
Tick | nextReqTime |
The soonest you have to start thinking about the next request is the longest access time that can occur before nextBurstAt. More... | |
CtrlStats | stats |
std::unique_ptr< Packet > | pendingDelete |
Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent call. More... | |
Additional Inherited Members | |
Public Types inherited from QoS::MemCtrl | |
enum | BusState { READ, WRITE } |
Bus Direction. More... | |
Public Types inherited from ClockedObject | |
typedef ClockedObjectParams | Params |
Parameters of ClockedObject. More... | |
Public Types inherited from SimObject | |
typedef SimObjectParams | Params |
Static Public Member Functions inherited from SimObject | |
static void | serializeAll (CheckpointOut &cp) |
Serialize all SimObjects in the system. More... | |
static SimObject * | find (const char *name) |
Find the SimObject with the given name and return a pointer to it. More... | |
Static Public Member Functions inherited from Serializable | |
static const std::string & | currentSection () |
Gets the fully-qualified name of the active section. More... | |
static void | serializeAll (const std::string &cpt_dir) |
Serializes all the SimObjects. More... | |
static void | unserializeGlobals (CheckpointIn &cp) |
Public Attributes inherited from ClockedObject | |
PowerState * | powerState |
Protected Attributes inherited from QoS::MemCtrl | |
const std::unique_ptr< Policy > | policy |
QoS Policy, assigns QoS priority to the incoming packets. More... | |
const std::unique_ptr< TurnaroundPolicy > | turnPolicy |
QoS Bus Turnaround Policy: selects the bus direction (READ/WRITE) More... | |
const std::unique_ptr< QueuePolicy > | queuePolicy |
QoS Queue Policy: selects packet among same-priority queue. More... | |
const uint8_t | _numPriorities |
Number of configured QoS priorities. More... | |
const bool | qosPriorityEscalation |
Enables QoS priority escalation. More... | |
const bool | qosSyncroScheduler |
Enables QoS synchronized scheduling invokes the QoS scheduler on all requestors, at every packet arrival. More... | |
std::unordered_map< RequestorID, const std::string > | requestors |
Hash of requestor ID - requestor name. More... | |
std::unordered_map< RequestorID, std::vector< uint64_t > > | packetPriorities |
Hash of requestors - number of packets queued per priority. More... | |
std::unordered_map< RequestorID, std::unordered_map< uint64_t, std::deque< uint64_t > > > | requestTimes |
Hash of requestors - address of request - queue of times of request. More... | |
std::vector< Tick > | serviceTick |
Vector of QoS priorities/last service time. More... | |
std::vector< uint64_t > | readQueueSizes |
Read request packets queue length in #packets, per QoS priority. More... | |
std::vector< uint64_t > | writeQueueSizes |
Write request packets queue length in #packets, per QoS priority. More... | |
uint64_t | totalReadQueueSize |
Total read request packets queue length in #packets. More... | |
uint64_t | totalWriteQueueSize |
Total write request packets queue length in #packets. More... | |
BusState | busState |
Bus state used to control the read/write switching and drive the scheduling of the next request. More... | |
BusState | busStateNext |
bus state for next request event triggered More... | |
QoS::MemCtrl::MemCtrlStats | stats |
System * | _system |
Pointer to the System object. More... | |
Protected Attributes inherited from SimObject | |
const SimObjectParams * | _params |
Cached copy of the object parameters. More... | |
Protected Attributes inherited from EventManager | |
EventQueue * | eventq |
A pointer to this object's event queue. More... | |
The memory controller is a single-channel memory controller capturing the most important timing constraints associated with a contemporary controller.
For multi-channel memory systems, the controller is combined with a crossbar model, with the channel address interleaving taking part in the crossbar.
As a basic design principle, this controller model is not cycle callable, but instead uses events to: 1) decide when new decisions can be made, 2) when resources become available, 3) when things are to be considered done, and 4) when to send things back. The controller interfaces to media specific interfaces to enable flexible topoloties. Through these simple principles, the model delivers high performance, and lots of flexibility, allowing users to evaluate the system impact of a wide range of memory technologies.
For more details, please see Hansson et al, "Simulating DRAM controllers for future system architecture exploration", Proc. ISPASS, 2014. If you use this model as part of your research please cite the paper.
Definition at line 236 of file mem_ctrl.hh.
MemCtrl::MemCtrl | ( | const MemCtrlParams * | p | ) |
Definition at line 54 of file mem_ctrl.cc.
References processNextReqEvent().
When a packet reaches its "readyTime" in the response Q, use the "access()" method in AbstractMemory to actually create the response packet, and send it back to the outside world requestor.
pkt | The packet from the outside world |
static_latency | Static latency to add before sending the packet |
Definition at line 622 of file mem_ctrl.cc.
References AbstractMemory::access(), AddrRange::contains(), curTick(), DPRINTF, dram, Packet::getAddr(), AbstractMemory::getAddrRange(), Packet::headerDelay, Packet::isResponse(), Packet::needsResponse(), nvm, panic, Packet::payloadDelay, pendingDelete, port, Packet::print(), and QueuedResponsePort::schedTimingResp().
Referenced by addToReadQueue(), addToWriteQueue(), and processRespondEvent().
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private |
When a new read comes in, first check if the write q has a pending request to the same address. If not, decode the address to populate rank/bank/row, create one or mutliple "mem_pkt", and push them to the back of the read queue.
\ If this is the only read request in the system, schedule an event to start servicing it.
pkt | The request packet from the outside world |
pkt_count | The number of memory bursts the pkt |
is_dram | Does this packet access DRAM? translate to. If pkt size is larger then one full burst, then pkt_count is greater than one. |
Definition at line 181 of file mem_ctrl.cc.
References accessAndRespond(), MemPacket::addr, addr, MemCtrl::CtrlStats::avgRdQLen, burstAlign(), MemPacket::burstHelper, BurstHelper::burstsServiced, MemInterface::bytesPerBurst(), MemCtrl::CtrlStats::bytesReadWrQ, ceilLog2(), curTick(), MemInterface::decodePacket(), DPRINTF, dram, frontendLatency, Packet::getAddr(), Packet::getSize(), isInWriteQueue, Packet::isWrite(), QoS::MemCtrl::logRequest(), MaxTick, nextReqEvent, nvm, MipsISA::p, MemPacket::qosValue(), Packet::qosValue(), MemPacket::rank, MemCtrl::CtrlStats::rdQLenPdf, QoS::MemCtrl::READ, MemCtrl::CtrlStats::readBursts, MemCtrl::CtrlStats::readPktSize, readQueue, readQueueFull(), MemPacket::readyTime, Packet::requestorId(), MemCtrl::CtrlStats::requestorReadAccesses, respQueue, QoS::MemCtrl::schedule(), Event::scheduled(), MemCtrl::CtrlStats::servicedByWrQ, DRAMInterface::setupRank(), NVMInterface::setupRank(), stats, QoS::MemCtrl::totalReadQueueSize, and writeQueue.
Referenced by recvTimingReq().
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private |
Decode the incoming pkt, create a mem_pkt and push to the back of the write queue.
\If the write q length is more than the threshold specified by the user, ie the queue is beginning to get full, stop reads, and start draining writes.
pkt | The request packet from the outside world |
pkt_count | The number of memory bursts the pkt |
is_dram | Does this packet access DRAM? translate to. If pkt size is larger then one full burst, then pkt_count is greater than one. |
Definition at line 300 of file mem_ctrl.cc.
References accessAndRespond(), MemPacket::addr, addr, MemCtrl::CtrlStats::avgWrQLen, burstAlign(), MemInterface::bytesPerBurst(), ceilLog2(), curTick(), MemInterface::decodePacket(), DPRINTF, dram, frontendLatency, Packet::getAddr(), Packet::getSize(), isInWriteQueue, Packet::isWrite(), QoS::MemCtrl::logRequest(), MemCtrl::CtrlStats::mergedWrBursts, nextReqEvent, nvm, MemPacket::qosValue(), Packet::qosValue(), MemPacket::rank, Packet::requestorId(), MemCtrl::CtrlStats::requestorWriteAccesses, QoS::MemCtrl::schedule(), Event::scheduled(), DRAMInterface::setupRank(), NVMInterface::setupRank(), stats, QoS::MemCtrl::totalWriteQueueSize, QoS::MemCtrl::WRITE, writeBufferSize, MemCtrl::CtrlStats::writeBursts, MemCtrl::CtrlStats::writePktSize, writeQueue, and MemCtrl::CtrlStats::wrQLenPdf.
Referenced by recvTimingReq().
bool MemCtrl::allIntfDrained | ( | ) | const |
Ensure that all interfaced have drained commands.
Definition at line 1367 of file mem_ctrl.cc.
References DRAMInterface::allRanksDrained(), NVMInterface::allRanksDrained(), dram, and nvm.
Referenced by drain(), processNextReqEvent(), and processRespondEvent().
Burst-align an address.
addr | The potentially unaligned address |
is_dram | Does this packet access DRAM? |
Definition at line 1166 of file mem_ctrl.cc.
References addr, MemInterface::bytesPerBurst(), dram, and nvm.
Referenced by addToReadQueue(), addToWriteQueue(), and processNextReqEvent().
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private |
The memory schduler/arbiter - picks which request needs to go next, based on the specified policy such as FCFS or FR-FCFS and moves it to the head of the queue.
Prioritizes accesses to the same rank as previous burst unless controller is switching command type.
queue | Queued requests to consider |
extra_col_delay | Any extra delay due to a read/write switch |
Definition at line 545 of file mem_ctrl.cc.
References chooseNextFRFCFS(), DPRINTF, ArmISA::i, memSchedPolicy, packetReady(), and panic.
Referenced by processNextReqEvent().
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private |
For FR-FCFS policy reorder the read/write queue depending on row buffer hits and earliest bursts available in memory.
queue | Queued requests to consider |
extra_col_delay | Any extra delay due to a read/write switch |
Definition at line 580 of file mem_ctrl.cc.
References DRAMInterface::chooseNextFRFCFS(), NVMInterface::chooseNextFRFCFS(), curTick(), DPRINTF, dram, MaxTick, nextBurstAt, and nvm.
Referenced by chooseNext().
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private |
Actually do the burst based on media specific access function.
Update bus statistics when complete.
mem_pkt | The memory packet created from the outside world pkt |
Definition at line 800 of file mem_ctrl.cc.
References MemPacket::addr, DRAMInterface::addRankToRankDelay(), NVMInterface::addRankToRankDelay(), DRAMInterface::commandOffset(), NVMInterface::commandOffset(), DRAMInterface::doBurstAccess(), NVMInterface::doBurstAccess(), DPRINTF, dram, MemPacket::entryTime, MemPacket::isDram(), MemPacket::isRead(), nextBurstAt, nextReqTime, nvm, pruneBurstTick(), readsThisTime, MemPacket::readyTime, MemPacket::requestorId(), MemCtrl::CtrlStats::requestorReadBytes, MemCtrl::CtrlStats::requestorReadTotalLat, MemCtrl::CtrlStats::requestorWriteBytes, MemCtrl::CtrlStats::requestorWriteTotalLat, selQueue(), MemPacket::size, stats, and writesThisTime.
Referenced by processNextReqEvent().
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overridevirtual |
Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are partially executed or are partially in flight.
Draining is mostly used before forking and creating a check point.
This function notifies an object that it needs to drain its state.
If the object does not need further simulation to drain internal buffers, it returns DrainState::Drained and automatically switches to the Drained state. If the object needs more simulation, it returns DrainState::Draining and automatically enters the Draining state. Other return values are invalid.
Implements Drainable.
Definition at line 1378 of file mem_ctrl.cc.
References allIntfDrained(), curTick(), DPRINTF, Drained, Draining, DRAMInterface::drainRanks(), dram, nextReqEvent, respQueue, QoS::MemCtrl::schedule(), Event::scheduled(), QoS::MemCtrl::totalReadQueueSize, and QoS::MemCtrl::totalWriteQueueSize.
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overridevirtual |
Resume execution after a successful drain.
Reimplemented from Drainable.
Definition at line 1405 of file mem_ctrl.cc.
References dram, System::isTimingMode(), isTimingMode, startup(), DRAMInterface::startup(), DRAMInterface::suspend(), and QoS::MemCtrl::system().
Calculate burst window aligned tick.
cmd_tick | Initial tick of command |
Definition at line 679 of file mem_ctrl.cc.
References commandWindow.
Referenced by verifyMultiCmd(), and verifySingleCmd().
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overridevirtual |
Get a port with a given name and index.
This is used at binding time and returns a reference to a protocol-agnostic port.
gem5 has a request and response port interface. All memory objects are connected together via ports. These ports provide a rigid interface between these memory objects. These ports implement three different memory system modes: timing, atomic, and functional. The most important mode is the timing mode and here timing mode is used for conducting cycle-level timing experiments. The other modes are only used in special circumstances and should not be used to conduct cycle-level timing experiments. The other modes are only used in special circumstances. These ports allow SimObjects to communicate with each other.
if_name | Port name |
idx | Index in the case of a VectorPort |
Reimplemented from SimObject.
Definition at line 1357 of file mem_ctrl.cc.
References SimObject::getPort(), and port.
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init() is called after all C++ SimObjects have been created and all ports are connected.
Initializations that are independent of unserialization but rely on a fully instantiated and connected SimObject graph should be done here.
Reimplemented from SimObject.
Definition at line 97 of file mem_ctrl.cc.
References fatal, Port::isConnected(), SimObject::name(), port, and ResponsePort::sendRangeChange().
bool MemCtrl::inReadBusState | ( | bool | next_state | ) | const |
Check the current direction of the memory channel.
next_state | Check either the current or next bus state |
Definition at line 774 of file mem_ctrl.cc.
References QoS::MemCtrl::busState, QoS::MemCtrl::busStateNext, and QoS::MemCtrl::READ.
Referenced by NVMInterface::burstReady(), NVMInterface::isBusy(), and DRAMInterface::minBankPrep().
bool MemCtrl::inWriteBusState | ( | bool | next_state | ) | const |
Check the current direction of the memory channel.
next_state | Check either the current or next bus state |
Definition at line 787 of file mem_ctrl.cc.
References QoS::MemCtrl::busState, QoS::MemCtrl::busStateNext, and QoS::MemCtrl::WRITE.
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Calculate the minimum delay used when scheduling a read-to-write transision.
return | minimum delay |
Definition at line 1150 of file mem_ctrl.cc.
References dram, MaxTick, MemInterface::minReadToWriteDataGap(), and nvm.
Referenced by processNextReqEvent().
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Calculate the minimum delay used when scheduling a write-to-read transision.
return | minimum delay |
Definition at line 1158 of file mem_ctrl.cc.
References dram, MaxTick, MemInterface::minWriteToReadDataGap(), and nvm.
Referenced by processNextReqEvent().
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Determine if there is a packet that can issue.
pkt | The packet to evaluate |
Definition at line 1143 of file mem_ctrl.cc.
References DRAMInterface::burstReady(), NVMInterface::burstReady(), dram, MemPacket::isDram(), and nvm.
Referenced by chooseNext().
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Used for debugging to observe the contents of the queues.
Definition at line 381 of file mem_ctrl.cc.
References DPRINTF, readQueue, respQueue, and writeQueue.
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Bunch of things requires to setup "events" in gem5 When event "respondEvent" occurs for example, the method processRespondEvent is called; no parameters are allowed in these methods.
Definition at line 857 of file mem_ctrl.cc.
References allIntfDrained(), burstAlign(), QoS::MemCtrl::busState, QoS::MemCtrl::busStateNext, MemInterface::bytesPerBurst(), chooseNext(), NVMInterface::chooseRead(), curTick(), doBurstAccess(), DPRINTF, Draining, Drainable::drainState(), dram, DRAMInterface::isBusy(), NVMInterface::isBusy(), isInWriteQueue, QoS::MemCtrl::logResponse(), minReadToWriteDataGap(), minWritesPerSwitch, minWriteToReadDataGap(), nextReqEvent, nextReqTime, QoS::MemCtrl::numPriorities(), NVMInterface::numWritesQueued, nvm, port, MemCtrl::CtrlStats::rdPerTurnAround, QoS::MemCtrl::READ, readQueue, readsThisTime, NVMInterface::readsWaitingToIssue(), QoS::MemCtrl::recordTurnaroundStats(), respondEvent, respQueue, retryWrReq, Stats::DistBase< Derived, Stor >::sample(), QoS::MemCtrl::schedule(), Event::scheduled(), QoS::MemCtrl::selectNextBusState(), ResponsePort::sendRetryReq(), Drainable::signalDrainDone(), stats, QoS::MemCtrl::totalReadQueueSize, QoS::MemCtrl::totalWriteQueueSize, QoS::MemCtrl::turnPolicy, QoS::MemCtrl::WRITE, writeBufferSize, writeHighThreshold, writeLowThreshold, writeQueue, NVMInterface::writeRespQueueFull(), writesThisTime, and MemCtrl::CtrlStats::wrPerTurnAround.
Referenced by MemCtrl().
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Definition at line 483 of file mem_ctrl.cc.
References accessAndRespond(), allIntfDrained(), backendLatency, BurstHelper::burstCount, MemPacket::burstHelper, BurstHelper::burstsServiced, DRAMInterface::checkRefreshState(), curTick(), DPRINTF, Draining, Drainable::drainState(), dram, frontendLatency, MemPacket::isDram(), MemPacket::pkt, port, MemPacket::rank, respondEvent, DRAMInterface::respondEvent(), respQueue, retryRdReq, QoS::MemCtrl::schedule(), Event::scheduled(), ResponsePort::sendRetryReq(), Drainable::signalDrainDone(), QoS::MemCtrl::totalReadQueueSize, and QoS::MemCtrl::totalWriteQueueSize.
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Remove commands that have already issued from burstTicks.
Definition at line 666 of file mem_ctrl.cc.
References burstTicks, curTick(), and DPRINTF.
Referenced by doBurstAccess().
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Check if the read queue has room for more entries.
pkt_count | The number of entries needed in the read queue |
Definition at line 158 of file mem_ctrl.cc.
References DPRINTF, readBufferSize, respQueue, and QoS::MemCtrl::totalReadQueueSize.
Referenced by addToReadQueue(), and recvTimingReq().
Definition at line 123 of file mem_ctrl.cc.
References AbstractMemory::access(), DRAMInterface::accessLatency(), NVMInterface::accessLatency(), Packet::cacheResponding(), Packet::cmdString(), AddrRange::contains(), DPRINTF, dram, Packet::getAddr(), AbstractMemory::getAddrRange(), Packet::hasData(), nvm, panic, panic_if, and Packet::print().
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Definition at line 1342 of file mem_ctrl.cc.
References AddrRange::contains(), dram, AbstractMemory::functionalAccess(), Packet::getAddr(), AbstractMemory::getAddrRange(), nvm, panic, and Packet::print().
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Definition at line 406 of file mem_ctrl.cc.
References addToReadQueue(), addToWriteQueue(), MemInterface::bytesPerBurst(), MemCtrl::CtrlStats::bytesReadSys, MemCtrl::CtrlStats::bytesWrittenSys, Packet::cacheResponding(), Packet::cmdString(), AddrRange::contains(), curTick(), divCeil(), DPRINTF, dram, Packet::getAddr(), AbstractMemory::getAddrRange(), Packet::getSize(), Packet::isRead(), Packet::isWrite(), MemCtrl::CtrlStats::numRdRetry, MemCtrl::CtrlStats::numWrRetry, nvm, ArmISA::offset, panic, panic_if, prevArrival, Packet::print(), QoS::MemCtrl::qosSchedule(), readQueue, readQueueFull(), MemCtrl::CtrlStats::readReqs, retryRdReq, retryWrReq, stats, MemCtrl::CtrlStats::totGap, writeQueue, writeQueueFull(), and MemCtrl::CtrlStats::writeReqs.
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Is there a read/write burst Event scheduled?
Definition at line 667 of file mem_ctrl.hh.
References nextReqEvent, and Event::scheduled().
Referenced by NVMInterface::processReadReadyEvent(), and NVMInterface::processWriteRespondEvent().
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Is there a respondEvent scheduled?
Definition at line 660 of file mem_ctrl.hh.
References respondEvent, and Event::scheduled().
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restart the controller This can be used by interfaces to restart the scheduler after maintainence commands complete
Tick | to schedule next event |
Definition at line 676 of file mem_ctrl.hh.
References nextReqEvent, QoS::MemCtrl::schedule(), and Clocked::tick.
Referenced by NVMInterface::processReadReadyEvent(), and NVMInterface::processWriteRespondEvent().
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Select either the read or write queue.
is_read | The current burst is a read, select read queue |
Definition at line 600 of file mem_ctrl.hh.
References readQueue, and writeQueue.
Referenced by doBurstAccess().
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startup() is the final initialization call before simulation.
All state is initialized (including unserialized state, if any, such as the curTick() value), so this is the appropriate place to schedule initial event(s) for objects that need them.
Reimplemented from SimObject.
Definition at line 107 of file mem_ctrl.cc.
References DRAMInterface::commandOffset(), NVMInterface::commandOffset(), curTick(), dram, System::isTimingMode(), isTimingMode, nextBurstAt, nvm, and QoS::MemCtrl::system().
Referenced by drainResume().
Tick MemCtrl::verifyMultiCmd | ( | Tick | cmd_tick, |
Tick | max_cmds_per_burst, | ||
Tick | max_multi_cmd_split = 0 |
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Check for command bus contention for multi-cycle (2 currently) command.
If there is contention, shift command(s) to next burst. Check verifies that the commands issued per burst is less than a defined max number, maxCommandsPerWindow. Therefore, contention per cycle is not verified and instead is done based on a burst window.
cmd_tick | Initial tick of command, to be verified |
max_multi_cmd_split | Maximum delay between commands |
max_cmds_per_burst | Number of commands that can issue in a burst window |
Definition at line 710 of file mem_ctrl.cc.
References burstTicks, commandWindow, DPRINTF, and getBurstWindow().
Referenced by DRAMInterface::activateBank(), NVMInterface::chooseRead(), DRAMInterface::doBurstAccess(), and NVMInterface::doBurstAccess().
Check for command bus contention for single cycle command.
If there is contention, shift command to next burst. Check verifies that the commands issued per burst is less than a defined max number, maxCommandsPerWindow. Therefore, contention per cycle is not verified and instead is done based on a burst window.
cmd_tick | Initial tick of command, to be verified |
max_cmds_per_burst | Number of commands that can issue in a burst window |
Definition at line 687 of file mem_ctrl.cc.
References burstTicks, commandWindow, DPRINTF, and getBurstWindow().
Referenced by DRAMInterface::activateBank(), NVMInterface::chooseRead(), DRAMInterface::doBurstAccess(), NVMInterface::doBurstAccess(), and DRAMInterface::prechargeBank().
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Check if the write queue has room for more entries.
pkt_count | The number of entries needed in the write queue |
Definition at line 170 of file mem_ctrl.cc.
References DPRINTF, QoS::MemCtrl::totalWriteQueueSize, and writeBufferSize.
Referenced by recvTimingReq().
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Pipeline latency of the backend and PHY.
Along with the frontend contribution, this latency is added to reads serviced by the memory.
Definition at line 503 of file mem_ctrl.hh.
Referenced by processRespondEvent().
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Holds count of commands issued in burst window starting at defined Tick.
This is used to ensure that the command bandwidth does not exceed the allowable media constraints.
Definition at line 459 of file mem_ctrl.hh.
Referenced by pruneBurstTick(), verifyMultiCmd(), and verifySingleCmd().
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Length of a command window, used to check command bandwidth.
Definition at line 509 of file mem_ctrl.hh.
Referenced by getBurstWindow(), verifyMultiCmd(), and verifySingleCmd().
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Create pointer to interface of the actual dram media when connected.
Definition at line 464 of file mem_ctrl.hh.
Referenced by accessAndRespond(), addToReadQueue(), addToWriteQueue(), allIntfDrained(), burstAlign(), chooseNextFRFCFS(), doBurstAccess(), drain(), drainResume(), minReadToWriteDataGap(), minWriteToReadDataGap(), packetReady(), processNextReqEvent(), processRespondEvent(), recvAtomic(), recvFunctional(), recvTimingReq(), and startup().
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Pipeline latency of the controller frontend.
The frontend contribution is added to writes (that complete when they are in the write buffer) and reads that are serviced the write buffer.
Definition at line 496 of file mem_ctrl.hh.
Referenced by addToReadQueue(), addToWriteQueue(), and processRespondEvent().
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To avoid iterating over the write queue to check for overlapping transactions, maintain a set of burst addresses that are currently queued.
Since we merge writes to the same location we never have more than one address to the same burst address.
Definition at line 442 of file mem_ctrl.hh.
Referenced by addToReadQueue(), addToWriteQueue(), and processNextReqEvent().
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Remember if the memory system is in timing mode.
Definition at line 273 of file mem_ctrl.hh.
Referenced by drainResume(), and startup().
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Memory controller configuration initialized based on parameter values.
Definition at line 489 of file mem_ctrl.hh.
Referenced by chooseNext().
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Definition at line 481 of file mem_ctrl.hh.
Referenced by processNextReqEvent().
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Till when must we wait before issuing next RD/WR burst?
Definition at line 514 of file mem_ctrl.hh.
Referenced by chooseNextFRFCFS(), doBurstAccess(), and startup().
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Definition at line 288 of file mem_ctrl.hh.
Referenced by addToReadQueue(), addToWriteQueue(), drain(), processNextReqEvent(), requestEventScheduled(), and restartScheduler().
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The soonest you have to start thinking about the next request is the longest access time that can occur before nextBurstAt.
Assuming you need to precharge, open a new row, and access, it is tRP + tRCD + tCL.
Definition at line 524 of file mem_ctrl.hh.
Referenced by doBurstAccess(), and processNextReqEvent().
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Create pointer to interface of the actual nvm media when connected.
Definition at line 469 of file mem_ctrl.hh.
Referenced by accessAndRespond(), addToReadQueue(), addToWriteQueue(), allIntfDrained(), burstAlign(), chooseNextFRFCFS(), doBurstAccess(), minReadToWriteDataGap(), minWriteToReadDataGap(), packetReady(), processNextReqEvent(), recvAtomic(), recvFunctional(), recvTimingReq(), and startup().
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Upstream caches need this packet until true is returned, so hold it for deletion until a subsequent call.
Definition at line 592 of file mem_ctrl.hh.
Referenced by accessAndRespond().
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Our incoming port, for a multi-ported controller add a crossbar in front of it.
Definition at line 268 of file mem_ctrl.hh.
Referenced by accessAndRespond(), getPort(), init(), processNextReqEvent(), and processRespondEvent().
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Definition at line 516 of file mem_ctrl.hh.
Referenced by recvTimingReq().
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The following are basic design parameters of the memory controller, and are initialized based on parameter values.
The rowsPerBank is determined based on the capacity, number of ranks and banks, the burst size, and the row buffer size.
Definition at line 477 of file mem_ctrl.hh.
Referenced by readQueueFull().
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The controller's main read and write queues, with support for QoS reordering.
Definition at line 432 of file mem_ctrl.hh.
Referenced by addToReadQueue(), printQs(), processNextReqEvent(), recvTimingReq(), and selQueue().
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Definition at line 483 of file mem_ctrl.hh.
Referenced by doBurstAccess(), and processNextReqEvent().
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Definition at line 291 of file mem_ctrl.hh.
Referenced by processNextReqEvent(), processRespondEvent(), and respondEventScheduled().
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Response queue where read packets wait after we're done working with them, but it's not time to send the response yet.
The responses are stored separately mostly to keep the code clean and help with events scheduling. For all logical purposes such as sizing the read queue, this and the main read queue need to be added together.
Definition at line 452 of file mem_ctrl.hh.
Referenced by addToReadQueue(), drain(), printQs(), processNextReqEvent(), processRespondEvent(), and readQueueFull().
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Remember if we have to retry a request when available.
Definition at line 278 of file mem_ctrl.hh.
Referenced by processRespondEvent(), and recvTimingReq().
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Definition at line 279 of file mem_ctrl.hh.
Referenced by processNextReqEvent(), and recvTimingReq().
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Definition at line 586 of file mem_ctrl.hh.
Referenced by addToReadQueue(), addToWriteQueue(), doBurstAccess(), processNextReqEvent(), and recvTimingReq().
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Definition at line 478 of file mem_ctrl.hh.
Referenced by addToWriteQueue(), processNextReqEvent(), and writeQueueFull().
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Definition at line 479 of file mem_ctrl.hh.
Referenced by processNextReqEvent().
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Definition at line 480 of file mem_ctrl.hh.
Referenced by processNextReqEvent().
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Definition at line 433 of file mem_ctrl.hh.
Referenced by addToReadQueue(), addToWriteQueue(), printQs(), processNextReqEvent(), recvTimingReq(), and selQueue().
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Definition at line 482 of file mem_ctrl.hh.
Referenced by doBurstAccess(), and processNextReqEvent().