gem5  v22.0.0.1
Public Member Functions | List of all members
gem5::X86ISA::InitInterrupt Class Reference

#include <faults.hh>

Inheritance diagram for gem5::X86ISA::InitInterrupt:
gem5::X86ISA::X86Interrupt gem5::X86ISA::X86FaultBase gem5::FaultBase

Public Member Functions

 InitInterrupt (uint8_t _vector)
 
void invoke (ThreadContext *tc, const StaticInstPtr &inst=nullStaticInstPtr) override
 
- Public Member Functions inherited from gem5::X86ISA::X86FaultBase
virtual uint8_t getVector () const
 Get the vector of an interrupt. More...
 
- Public Member Functions inherited from gem5::FaultBase
virtual ~FaultBase ()
 

Additional Inherited Members

- Protected Member Functions inherited from gem5::X86ISA::X86Interrupt
 X86FaultBase (const char *_faultName, const char *_mnem, const uint8_t _vector, uint64_t _errorCode=(uint64_t) -1)
 
- Protected Member Functions inherited from gem5::X86ISA::X86FaultBase
 X86FaultBase (const char *_faultName, const char *_mnem, const uint8_t _vector, uint64_t _errorCode=(uint64_t) -1)
 
const char * name () const override
 
virtual bool isBenign ()
 
virtual const char * mnemonic () const
 
virtual std::string describe () const
 
- Protected Attributes inherited from gem5::X86ISA::X86FaultBase
const char * faultName
 
const char * mnem
 
uint8_t vector
 
uint64_t errorCode
 

Detailed Description

Definition at line 349 of file faults.hh.

Constructor & Destructor Documentation

◆ InitInterrupt()

gem5::X86ISA::InitInterrupt::InitInterrupt ( uint8_t  _vector)
inline

Definition at line 352 of file faults.hh.

Member Function Documentation

◆ invoke()

void gem5::X86ISA::InitInterrupt::invoke ( ThreadContext tc,
const StaticInstPtr inst = nullStaticInstPtr 
)
overridevirtual

Reimplemented from gem5::X86ISA::X86FaultBase.

Definition at line 182 of file faults.cc.

References gem5::X86ISA::misc_reg::Cr0, gem5::X86ISA::misc_reg::Cr2, gem5::X86ISA::misc_reg::Cr3, gem5::X86ISA::misc_reg::Cr4, gem5::X86ISA::misc_reg::Cs, gem5::X86ISA::misc_reg::CsAttr, gem5::X86ISA::misc_reg::CsBase, gem5::X86ISA::misc_reg::CsEffBase, gem5::X86ISA::misc_reg::CsLimit, DPRINTF, gem5::X86ISA::misc_reg::Dr0, gem5::X86ISA::misc_reg::Dr1, gem5::X86ISA::misc_reg::Dr2, gem5::X86ISA::misc_reg::Dr3, gem5::X86ISA::misc_reg::Dr6, gem5::X86ISA::misc_reg::Dr7, gem5::X86ISA::misc_reg::Efer, gem5::X86ISA::misc_reg::Ftw, gem5::X86ISA::misc_reg::IdtrBase, gem5::X86ISA::misc_reg::IdtrLimit, gem5::X86ISA::index, gem5::IntRegClass, gem5::X86ISA::misc_reg::M5Reg, gem5::X86ISA::misc_reg::Mxcsr, gem5::PowerISA::float_reg::NumArchRegs, gem5::X86ISA::segment_idx::NumIdxs, gem5::X86ISA::pc, gem5::ThreadContext::pcState(), gem5::ThreadContext::readMiscReg(), gem5::X86ISA::misc_reg::Rflags, gem5::romMicroPC(), gem5::X86ISA::seg, gem5::X86ISA::misc_reg::segAttr(), gem5::X86ISA::misc_reg::segBase(), gem5::X86ISA::misc_reg::segEffBase(), gem5::X86ISA::misc_reg::segLimit(), gem5::X86ISA::misc_reg::segSel(), gem5::ThreadContext::setMiscReg(), gem5::ThreadContext::setReg(), gem5::X86ISA::misc_reg::Tr, gem5::X86ISA::misc_reg::TrAttr, gem5::X86ISA::misc_reg::TrBase, gem5::X86ISA::misc_reg::TrLimit, gem5::X86ISA::misc_reg::TsgBase, gem5::X86ISA::misc_reg::TsgLimit, gem5::X86ISA::misc_reg::Tsl, gem5::X86ISA::misc_reg::TslAttr, gem5::X86ISA::misc_reg::TslBase, and gem5::X86ISA::misc_reg::TslLimit.

Referenced by gem5::X86ISA::BareMetalWorkload::initState(), and gem5::X86ISA::FsWorkload::initState().


The documentation for this class was generated from the following files:

Generated on Sat Jun 18 2022 08:15:20 for gem5 by doxygen 1.8.17