gem5  v22.1.0.0
mmu.hh
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37 
38 #ifndef __ARCH_ARM_FASTMODEL_IRIS_MMU_HH__
39 #define __ARCH_ARM_FASTMODEL_IRIS_MMU_HH__
40 
41 #include "arch/arm/page_size.hh"
42 #include "arch/generic/mmu.hh"
43 
44 #include "params/IrisMMU.hh"
45 
46 namespace gem5
47 {
48 
49 namespace Iris
50 {
51 
52 class MMU : public BaseMMU
53 {
54  public:
55  MMU(const Params &p) : BaseMMU(p) {}
56 
59  Mode mode, Request::Flags flags) override
60  {
62  ArmISA::PageBytes, start, size, tc, this, mode, flags));
63  }
64 };
65 
66 } // namespace Iris
67 
68 } // namespace gem5
69 
70 #endif // __ARCH_ARM_FASTMODEL_IRIS_MMU_HH__
BaseMMUParams Params
Definition: mmu.hh:88
TranslationGenPtr translateFunctional(Addr start, Addr size, ThreadContext *tc, Mode mode, Request::Flags flags) override
Definition: mmu.hh:58
MMU(const Params &p)
Definition: mmu.hh:55
uint8_t flags
Definition: helpers.cc:66
Bitfield< 4, 0 > mode
Definition: misc_types.hh:74
const Addr PageBytes
Definition: page_size.hh:53
Bitfield< 54 > p
Definition: pagetable.hh:70
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
std::unique_ptr< TranslationGen > TranslationGenPtr

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