gem5  v22.1.0.0
fs_workload.cc
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40 
41 #include "arch/arm/fs_workload.hh"
42 
43 #include "arch/arm/faults.hh"
45 #include "base/loader/symtab.hh"
46 #include "cpu/thread_context.hh"
47 #include "dev/arm/gic_v2.hh"
48 #include "kern/system_events.hh"
49 #include "params/ArmFsWorkload.hh"
50 
51 namespace gem5
52 {
53 
54 namespace ArmISA
55 {
56 
57 void
59 {
60  PCState new_pc = tc->pcState().as<PCState>();
61  if (inAArch64(tc)) {
62  new_pc.set(tc->getReg(int_reg::X30));
63  } else {
64  new_pc.set(tc->getReg(ReturnAddressReg) & ~1ULL);
65  }
66 
67  CheckerCPU *checker = tc->getCheckerCpuPtr();
68  if (checker) {
69  tc->pcStateNoRecord(new_pc);
70  } else {
71  tc->pcState(new_pc);
72  }
73 }
74 
76 {
77  if (kernelObj) {
80  }
81 
82  bootLoaders.reserve(p.boot_loader.size());
83  for (const auto &bl : p.boot_loader) {
84  std::unique_ptr<loader::ObjectFile> bl_obj;
85  bl_obj.reset(loader::createObjectFile(bl));
86 
87  fatal_if(!bl_obj, "Could not read bootloader: %s", bl);
88  bootLoaders.emplace_back(std::move(bl_obj));
89  }
90 
92 
93  fatal_if(!bootLoaders.empty() && !bootldr,
94  "Can't find a matching boot loader / kernel combination!");
95 
96  if (bootldr)
98 }
99 
100 void
102 {
104 
105  // Reset CP15?? What does that mean -- ali
106 
107  // FPEXC.EN = 0
108 
109  for (auto *tc: system->threads) {
110  Reset().invoke(tc);
111  tc->activate();
112  }
113 
114  auto *arm_sys = dynamic_cast<ArmSystem *>(system);
115 
116  if (bootldr) {
117  bool is_gic_v2 =
120 
121  inform("Using bootloader at address %#x", bootldr->entryPoint());
122 
123  // The address of the boot loader so we know
124  // where to branch to after the reset fault
125  // All other values needed by the boot loader to know what to do
126  fatal_if(!params().cpu_release_addr,
127  "cpu_release_addr must be set with bootloader");
128 
129  fatal_if(!arm_sys->params().gic_cpu_addr && is_gic_v2,
130  "gic_cpu_addr must be set with bootloader");
131 
132  for (auto *tc: arm_sys->threads) {
133  tc->setReg(int_reg::R3, kernelEntry);
134  if (is_gic_v2)
135  tc->setReg(int_reg::R4, arm_sys->params().gic_cpu_addr);
136  if (getArch() == loader::Arm)
137  tc->setReg(int_reg::R5, params().cpu_release_addr);
138  }
139  inform("Using kernel entry physical address at %#x\n", kernelEntry);
140  } else {
141  // Set the initial PC to be at start of the kernel code
142  if (!arm_sys->highestELIs64())
143  arm_sys->threads[0]->pcState(kernelObj->entryPoint());
144  }
145 }
146 
149 {
150  if (obj) {
151  for (auto &bl : bootLoaders) {
152  if (bl->getArch() == obj->getArch())
153  return bl.get();
154  }
155  } else if (!bootLoaders.empty()) {
156  return bootLoaders[0].get();
157  }
158 
159  return nullptr;
160 }
161 
162 } // namespace ArmISA
163 } // namespace gem5
loader::ObjectFile * getBootLoader(loader::ObjectFile *const obj)
Get a boot loader that matches the kernel.
Definition: fs_workload.cc:148
loader::ObjectFile * bootldr
Pointer to the bootloader object.
Definition: fs_workload.hh:77
loader::Arch getArch() const override
Definition: fs_workload.hh:136
std::vector< std::unique_ptr< loader::ObjectFile > > bootLoaders
Bootloaders.
Definition: fs_workload.hh:72
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: fs_workload.cc:101
Addr kernelEntry
This differs from entry since it takes into account where the kernel is loaded in memory (with loadAd...
Definition: fs_workload.hh:84
FsWorkload(const Params &p)
Definition: fs_workload.cc:75
void returnFromFuncIn(ThreadContext *tc) override
Definition: fs_workload.cc:58
BaseGic * getGIC() const
Get a pointer to the system's GIC.
Definition: system.hh:177
virtual bool supportsVersion(GicVersion version)=0
Check if version supported.
CheckerCPU class.
Definition: cpu.hh:85
void set(Addr val)
Force this PC to reflect a particular value, resetting all its other fields around it.
Definition: pcstate.hh:362
Addr loadAddrMask() const
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
loader::ObjectFile * kernelObj
Addr loadAddrOffset() const
Target & as()
Definition: pcstate.hh:72
SimObjectParams Params
Definition: sim_object.hh:170
PortProxy physProxy
Port to physical memory used for writing object files into ram at boot.
Definition: system.hh:326
Threads threads
Definition: system.hh:313
ThreadContext is the external interface to all thread state for anything outside of the CPU.
virtual void pcStateNoRecord(const PCStateBase &val)=0
virtual RegVal getReg(const RegId &reg) const
virtual const PCStateBase & pcState() const =0
virtual CheckerCPU * getCheckerCpuPtr()=0
System * system
Definition: workload.hh:80
virtual MemoryImage buildImage() const =0
bool write(const PortProxy &proxy) const
Definition: memory_image.cc:54
const SymbolTable & symtab() const
Definition: object_file.hh:131
SymbolTablePtr globals() const
Generates a new symbol table containing only global symbols.
Definition: symtab.hh:267
bool insert(const Symbol &symbol)
Insert a new symbol in the table if it does not already exist.
Definition: symtab.cc:55
Implementation of a GICv2.
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:226
const Params & params() const
Definition: sim_object.hh:176
#define inform(...)
Definition: logging.hh:247
constexpr RegId X30
Definition: int.hh:270
constexpr RegId R4
Definition: int.hh:190
constexpr RegId R3
Definition: int.hh:189
constexpr RegId R5
Definition: int.hh:191
constexpr auto & ReturnAddressReg
Definition: int.hh:655
bool inAArch64(ThreadContext *tc)
Definition: utility.cc:117
Bitfield< 54 > p
Definition: pagetable.hh:70
SymbolTable debugSymbolTable
Global unified debugging symbol table (for target).
Definition: symtab.cc:44
ObjectFile * createObjectFile(const std::string &fname, bool raw)
Definition: object_file.cc:135
@ Reset
Definition: types.hh:70
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....

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