gem5  v21.1.0.2
fs_workload.cc
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40 
41 #include "arch/arm/fs_workload.hh"
42 
43 #include "arch/arm/faults.hh"
45 #include "base/loader/symtab.hh"
46 #include "cpu/thread_context.hh"
47 #include "dev/arm/gic_v2.hh"
48 #include "kern/system_events.hh"
49 #include "params/ArmFsWorkload.hh"
50 
51 namespace gem5
52 {
53 
54 namespace ArmISA
55 {
56 
57 void
59 {
60  PCState newPC = tc->pcState();
61  if (inAArch64(tc)) {
62  newPC.set(tc->readIntReg(INTREG_X30));
63  } else {
64  newPC.set(tc->readIntReg(ReturnAddressReg) & ~1ULL);
65  }
66 
67  CheckerCPU *checker = tc->getCheckerCpuPtr();
68  if (checker) {
69  tc->pcStateNoRecord(newPC);
70  } else {
71  tc->pcState(newPC);
72  }
73 }
74 
76 {
77  if (kernelObj) {
80  }
81 
82  bootLoaders.reserve(p.boot_loader.size());
83  for (const auto &bl : p.boot_loader) {
84  std::unique_ptr<loader::ObjectFile> bl_obj;
85  bl_obj.reset(loader::createObjectFile(bl));
86 
87  fatal_if(!bl_obj, "Could not read bootloader: %s", bl);
88  bootLoaders.emplace_back(std::move(bl_obj));
89  }
90 
92 
93  fatal_if(!bootLoaders.empty() && !bootldr,
94  "Can't find a matching boot loader / kernel combination!");
95 
96  if (bootldr)
98 }
99 
100 void
102 {
104 
105  // Reset CP15?? What does that mean -- ali
106 
107  // FPEXC.EN = 0
108 
109  for (auto *tc: system->threads) {
110  Reset().invoke(tc);
111  tc->activate();
112  }
113 
114  auto *arm_sys = dynamic_cast<ArmSystem *>(system);
115 
116  if (bootldr) {
117  bool is_gic_v2 =
120 
121  inform("Using bootloader at address %#x", bootldr->entryPoint());
122 
123  // The address of the boot loader so we know
124  // where to branch to after the reset fault
125  // All other values needed by the boot loader to know what to do
126  fatal_if(!params().cpu_release_addr,
127  "cpu_release_addr must be set with bootloader");
128 
129  fatal_if(!arm_sys->params().gic_cpu_addr && is_gic_v2,
130  "gic_cpu_addr must be set with bootloader");
131 
132  for (auto *tc: arm_sys->threads) {
133  tc->setIntReg(3, kernelEntry);
134  if (is_gic_v2)
135  tc->setIntReg(4, arm_sys->params().gic_cpu_addr);
136  if (getArch() == loader::Arm)
137  tc->setIntReg(5, params().cpu_release_addr);
138  }
139  inform("Using kernel entry physical address at %#x\n", kernelEntry);
140  } else {
141  // Set the initial PC to be at start of the kernel code
142  if (!arm_sys->highestELIs64())
143  arm_sys->threads[0]->pcState(kernelObj->entryPoint());
144  }
145 }
146 
149 {
150  if (obj) {
151  for (auto &bl : bootLoaders) {
152  if (bl->getArch() == obj->getArch())
153  return bl.get();
154  }
155  } else if (!bootLoaders.empty()) {
156  return bootLoaders[0].get();
157  }
158 
159  return nullptr;
160 }
161 
162 } // namespace ArmISA
163 } // namespace gem5
gem5::ThreadContext::pcStateNoRecord
virtual void pcStateNoRecord(const TheISA::PCState &val)=0
gem5::ArmISA::FsWorkload::bootldr
loader::ObjectFile * bootldr
Pointer to the bootloader object.
Definition: fs_workload.hh:77
gem5::ArmISA::FsWorkload::kernelEntry
Addr kernelEntry
This differs from entry since it takes into account where the kernel is loaded in memory (with loadAd...
Definition: fs_workload.hh:84
gem5::loader::ObjectFile
Definition: object_file.hh:85
gem5::ArmISA::FsWorkload::bootLoaders
std::vector< std::unique_ptr< loader::ObjectFile > > bootLoaders
Bootloaders.
Definition: fs_workload.hh:72
gem5::loader::SymbolTable::globals
SymbolTablePtr globals() const
Generates a new symbol table containing only global symbols.
Definition: symtab.hh:267
gem5::loader::ObjectFile::entryPoint
Addr entryPoint() const
Definition: object_file.hh:125
gem5::System::physProxy
PortProxy physProxy
Port to physical memory used for writing object files into ram at boot.
Definition: system.hh:332
fs_workload.hh
gem5::ArmISA::ReturnAddressReg
const int ReturnAddressReg
Definition: int.hh:546
gem5::ArmISA::inAArch64
bool inAArch64(ThreadContext *tc)
Definition: utility.cc:120
gem5::loader::ObjectFile::symtab
const SymbolTable & symtab() const
Definition: object_file.hh:119
gem5::KernelWorkload::kernelObj
loader::ObjectFile * kernelObj
Definition: kernel_workload.hh:69
gem5::PowerISA::PCState
Definition: pcstate.hh:42
gem5::ArmSystem::getGIC
BaseGic * getGIC() const
Get a pointer to the system's GIC.
Definition: system.hh:198
gem5::ArmISA::FsWorkload::FsWorkload
FsWorkload(const Params &p)
Definition: fs_workload.cc:75
gem5::PowerISA::PCState::set
void set(Addr val)
Definition: pcstate.hh:53
gem5::KernelWorkload
Definition: kernel_workload.hh:45
gem5::SimObject::Params
SimObjectParams Params
Definition: sim_object.hh:170
gem5::ThreadContext
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition: thread_context.hh:93
gem5::SimObject::params
const Params & params() const
Definition: sim_object.hh:176
gem5::KernelWorkload::loadAddrMask
Addr loadAddrMask() const
Definition: kernel_workload.hh:81
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::CheckerCPU
CheckerCPU class.
Definition: cpu.hh:84
gem5::BaseGic::supportsVersion
virtual bool supportsVersion(GicVersion version)=0
Check if version supported.
gem5::loader::ObjectFile::getArch
Arch getArch() const
Definition: object_file.hh:115
gem5::ThreadContext::pcState
virtual TheISA::PCState pcState() const =0
faults.hh
gem5::ThreadContext::readIntReg
virtual RegVal readIntReg(RegIndex reg_idx) const =0
gem5::ArmISA::FsWorkload::getArch
loader::Arch getArch() const override
Definition: fs_workload.hh:136
gem5::ps2::Reset
@ Reset
Definition: types.hh:70
gem5::loader::createObjectFile
ObjectFile * createObjectFile(const std::string &fname, bool raw)
Definition: object_file.cc:123
gem5::ArmSystem
Definition: system.hh:62
inform
#define inform(...)
Definition: logging.hh:246
gem5::loader::SymbolTable::insert
bool insert(const Symbol &symbol)
Insert a new symbol in the table if it does not already exist.
Definition: symtab.cc:55
gem5::System::threads
Threads threads
Definition: system.hh:316
gem5::ArmISA::FsWorkload::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: fs_workload.cc:101
system_events.hh
gem5::loader::MemoryImage::write
bool write(const PortProxy &proxy) const
Definition: memory_image.cc:54
gem5::Workload::system
System * system
Definition: workload.hh:78
gem5::loader::ImageFile::buildImage
virtual MemoryImage buildImage() const =0
symtab.hh
gem5::loader::debugSymbolTable
SymbolTable debugSymbolTable
Global unified debugging symbol table (for target).
Definition: symtab.cc:44
gem5::ArmISA::FsWorkload::getBootLoader
loader::ObjectFile * getBootLoader(loader::ObjectFile *const obj)
Get a boot loader that matches the kernel.
Definition: fs_workload.cc:148
gic_v2.hh
fatal_if
#define fatal_if(cond,...)
Conditional fatal macro that checks the supplied condition and only causes a fatal error if the condi...
Definition: logging.hh:225
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::BaseGic::GicVersion::GIC_V2
@ GIC_V2
object_file.hh
gem5::loader::Arm
@ Arm
Definition: object_file.hh:59
gem5::KernelWorkload::loadAddrOffset
Addr loadAddrOffset() const
Definition: kernel_workload.hh:82
gem5::ThreadContext::getCheckerCpuPtr
virtual CheckerCPU * getCheckerCpuPtr()=0
thread_context.hh
gem5::ArmISA::SkipFunc::returnFromFuncIn
void returnFromFuncIn(ThreadContext *tc) override
Definition: fs_workload.cc:58
gem5::KernelWorkload::initState
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
Definition: kernel_workload.cc:96

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