gem5 v24.0.0.0
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fs_workload.hh
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1/*
2 * Copyright (c) 2010-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2005 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 */
40
41#ifndef __ARCH_ARM_LINUX_FS_WORKLOAD_HH__
42#define __ARCH_ARM_LINUX_FS_WORKLOAD_HH__
43
44#include <cstdio>
45#include <map>
46#include <string>
47
48#include "arch/arm/aapcs32.hh"
49#include "arch/arm/aapcs64.hh"
51#include "arch/arm/system.hh"
52#include "base/output.hh"
53#include "kern/linux/events.hh"
54#include "params/ArmFsLinux.hh"
55
56namespace gem5
57{
58
59namespace ArmISA
60{
61
63{
64 public:
65 using SkipFunc::SkipFunc;
66 using ABI = Aapcs32Vfp;
67};
68
70{
71 public:
72 using SkipFunc::SkipFunc;
73 using ABI = Aapcs64;
74};
75
77{
78 protected:
83 PCEvent *debugPrintk = nullptr;
84
85 PCEvent *dumpStats = nullptr;
86
87 public:
89 PARAMS(ArmFsLinux);
90
94
99 std::map<uint32_t, uint32_t> taskMap;
100
104
105 FsLinux(const Params &p);
106 ~FsLinux();
107
108 void initState() override;
109
110 void startup() override;
111
114 void mapPid(ThreadContext* tc, uint32_t pid);
115
116 public: // Exported Python methods
120 void dumpDmesg();
121
122 private:
125
127 PCEvent *kernelOops = nullptr;
128
134 PCEvent *skipUDelay = nullptr;
135
142};
143
144class DumpStats : public PCEvent
145{
146 public:
147 DumpStats(PCEventScope *s, const std::string &desc, Addr addr)
148 : PCEvent(s, desc, addr)
149 {}
150
151 void process(ThreadContext* tc) override;
152 protected:
153 virtual void getTaskDetails(ThreadContext *tc, uint32_t &pid,
154 uint32_t &tgid, std::string &next_task_str, int32_t &mm);
155
156};
157
158class DumpStats64 : public DumpStats
159{
160 public:
162
163 private:
164 void getTaskDetails(ThreadContext *tc, uint32_t &pid, uint32_t &tgid,
165 std::string &next_task_str, int32_t &mm) override;
166};
167
168} // namespace ArmISA
169} // namespace gem5
170
171#endif // __ARCH_ARM_LINUX_FS_WORKLOAD_HH__
void getTaskDetails(ThreadContext *tc, uint32_t &pid, uint32_t &tgid, std::string &next_task_str, int32_t &mm) override
Extracts the information used by the DumpStatsPCEvent64 by reading the task_struct pointer passed to ...
virtual void getTaskDetails(ThreadContext *tc, uint32_t &pid, uint32_t &tgid, std::string &next_task_str, int32_t &mm)
Extracts the information used by the DumpStatsPCEvent by reading the thread_info pointer passed to __...
void process(ThreadContext *tc) override
This function is called whenever the the kernel function "__switch_to" is called to change running ta...
DumpStats(PCEventScope *s, const std::string &desc, Addr addr)
void initState() override
initState() is called on each SimObject when not restoring from a checkpoint.
PCEvent * kernelPanic
Event to halt the simulator if the kernel calls panic()
bool enableContextSwitchStatsDump
When enabled, dump stats/task info on context switches for Streamline and per-thread cache occupancy ...
std::map< uint32_t, uint32_t > taskMap
This map stores a mapping of OS process IDs to internal Task IDs.
FsLinux(const Params &p)
PCEvent * skipConstUDelay
Another PC based skip event for const_udelay().
PCEvent * debugPrintk
PC based event to skip the dprink() call and emulate its functionality.
void startup() override
startup() is the final initialization call before simulation.
PARAMS(ArmFsLinux)
Boilerplate params code.
OutputStream * taskFile
This is a file that is placed in the run directory that prints out mappings between taskIds and OS pr...
void dumpDmesg()
Dump the kernel's dmesg buffer to stdout.
PCEvent * kernelOops
Event to halt the simulator if the kernel calls oopses
PCEvent * skipUDelay
PC based event to skip udelay(<time>) calls and quiesce the processor for the appropriate amount of t...
void mapPid(ThreadContext *tc, uint32_t pid)
This function creates a new task Id for the given pid.
SimObjectParams Params
ThreadContext is the external interface to all thread state for anything outside of the CPU.
Definition mm.h:9
Bitfield< 4 > s
Bitfield< 0 > p
Bitfield< 3 > addr
Definition types.hh:84
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147

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