gem5  v22.0.0.2
arm_cpu.hh
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37 
38 #ifndef __ARCH_ARM_KVM_ARM_CPU_HH__
39 #define __ARCH_ARM_KVM_ARM_CPU_HH__
40 
41 #include <set>
42 #include <vector>
43 
44 #include "arch/arm/pcstate.hh"
45 #include "cpu/kvm/base.hh"
46 #include "params/ArmKvmCPU.hh"
47 
48 namespace gem5
49 {
50 
63 class ArmKvmCPU : public BaseKvmCPU
64 {
65  public:
66  ArmKvmCPU(const ArmKvmCPUParams &params);
67  virtual ~ArmKvmCPU();
68 
69  void startup();
70 
71  void dump();
72 
73  protected:
75  {
77  const uint64_t id;
79  const RegIndex idx;
81  const char *name;
82  };
83 
85  {
87  const uint64_t id;
91  const char *name;
92  };
93 
95 
96  Tick kvmRun(Tick ticks);
97 
98  void updateKvmState();
99  void updateThreadContext();
100  void
102  {
103  pc.as<X86ISA::PCState>().setNPC(pc->instAddr());
104  }
105 
109  const RegIndexVector &getRegList() const;
110 
111  void kvmArmVCpuInit(uint32_t target);
112  void kvmArmVCpuInit(const struct kvm_vcpu_init &init);
113 
114  ArmISA::MiscRegIndex decodeCoProcReg(uint64_t id) const;
115 
116  ArmISA::MiscRegIndex decodeVFPCtrlReg(uint64_t id) const;
117 
127  bool isInvariantReg(uint64_t id);
128 
131 
132  private:
140  bool getRegList(struct kvm_reg_list &regs) const;
141 
142  void dumpKvmStateCore();
143  void dumpKvmStateMisc();
144  void dumpKvmStateCoProc(uint64_t id);
145  void dumpKvmStateVFP(uint64_t id);
146 
147  void updateKvmStateCore();
148  void updateKvmStateMisc();
149  void updateKvmStateCoProc(uint64_t id, bool show_warnings);
150  void updateKvmStateVFP(uint64_t id, bool show_warnings);
151 
152  void updateTCStateCore();
153  void updateTCStateMisc();
154  void updateTCStateCoProc(uint64_t id, bool show_warnings);
155  void updateTCStateVFP(uint64_t id, bool show_warnings);
156 
157 
162 
168 
174  static const std::set<uint64_t> invariant_regs;
175 };
176 
177 } // namespace gem5
178 
179 #endif // __ARCH_ARM_KVM_ARM_CPU_HH__
gem5::ArmKvmCPU::updateTCStateVFP
void updateTCStateVFP(uint64_t id, bool show_warnings)
Definition: arm_cpu.cc:901
gem5::ArmKvmCPU::kvmRun
Tick kvmRun(Tick ticks)
Request KVM to run the guest for a given number of ticks.
Definition: arm_cpu.cc:368
gem5::ArmKvmCPU::KvmIntRegInfo::name
const char * name
Name in debug output.
Definition: arm_cpu.hh:81
gem5::ArmKvmCPU::invariant_regs
static const std::set< uint64_t > invariant_regs
List of co-processor registers that KVM requires to be identical on both the host and the guest.
Definition: arm_cpu.hh:174
gem5::ArmKvmCPU::dumpKvmStateVFP
void dumpKvmStateVFP(uint64_t id)
Definition: arm_cpu.cc:641
gem5::ArmKvmCPU::updateTCStateCore
void updateTCStateCore()
Definition: arm_cpu.cc:802
gem5::ArmKvmCPU::kvmArmVCpuInit
void kvmArmVCpuInit(uint32_t target)
Definition: arm_cpu.cc:436
gem5::ArmKvmCPU::RegIndexVector
std::vector< uint64_t > RegIndexVector
Definition: arm_cpu.hh:94
gem5::ArmKvmCPU::decodeCoProcReg
ArmISA::MiscRegIndex decodeCoProcReg(uint64_t id) const
Definition: arm_cpu.cc:455
std::vector< uint64_t >
gem5::ArmKvmCPU::updateTCStateCoProc
void updateTCStateCoProc(uint64_t id, bool show_warnings)
Definition: arm_cpu.cc:865
gem5::ArmKvmCPU::updateKvmState
void updateKvmState()
Update the KVM state from the current thread context.
Definition: arm_cpu.cc:396
gem5::ArmKvmCPU
ARM implementation of a KVM-based hardware virtualized CPU.
Definition: arm_cpu.hh:63
gem5::ArmKvmCPU::KvmCoreMiscRegInfo::idx
const ArmISA::MiscRegIndex idx
gem5 index
Definition: arm_cpu.hh:89
gem5::ArmKvmCPU::irqAsserted
bool irqAsserted
Cached state of the IRQ line.
Definition: arm_cpu.hh:159
gem5::ArmKvmCPU::dumpKvmStateCore
void dumpKvmStateCore()
Definition: arm_cpu.cc:541
gem5::ArmKvmCPU::updateTCStateMisc
void updateTCStateMisc()
Definition: arm_cpu.cc:832
gem5::ArmKvmCPU::updateKvmStateMisc
void updateKvmStateMisc()
Definition: arm_cpu.cc:688
gem5::ArmKvmCPU::dumpKvmStateCoProc
void dumpKvmStateCoProc(uint64_t id)
Definition: arm_cpu.cc:599
gem5::ArmKvmCPU::updateKvmStateVFP
void updateKvmStateVFP(uint64_t id, bool show_warnings)
Definition: arm_cpu.cc:760
gem5::BaseKvmCPU
Base class for KVM based CPU models.
Definition: base.hh:87
gem5::ArmKvmCPU::KvmCoreMiscRegInfo::name
const char * name
Name in debug output.
Definition: arm_cpu.hh:91
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::ArmKvmCPU::~ArmKvmCPU
virtual ~ArmKvmCPU()
Definition: arm_cpu.cc:348
gem5::ArmKvmCPU::ArmKvmCPU
ArmKvmCPU(const ArmKvmCPUParams &params)
Definition: arm_cpu.cc:342
gem5::ArmKvmCPU::updateKvmStateCoProc
void updateKvmStateCoProc(uint64_t id, bool show_warnings)
Definition: arm_cpu.cc:726
gem5::ArmKvmCPU::startup
void startup()
Definition: arm_cpu.cc:353
gem5::ArmKvmCPU::updateKvmStateCore
void updateKvmStateCore()
Definition: arm_cpu.cc:662
gem5::ArmKvmCPU::fiqAsserted
bool fiqAsserted
Cached state of the FIQ line.
Definition: arm_cpu.hh:161
gem5::ArmKvmCPU::updateThreadContext
void updateThreadContext()
Update the current thread context with the KVM state.
Definition: arm_cpu.cc:405
base.hh
gem5::ArmISA::MiscRegIndex
MiscRegIndex
Definition: misc.hh:59
gem5::ArmKvmCPU::stutterPC
void stutterPC(PCStateBase &pc) const
Modify a PCStatePtr's value so that its next PC is the current PC.
Definition: arm_cpu.hh:101
pcstate.hh
gem5::ArmKvmCPU::kvmCoreMiscRegs
static KvmCoreMiscRegInfo kvmCoreMiscRegs[]
Definition: arm_cpu.hh:130
gem5::ArmKvmCPU::isInvariantReg
bool isInvariantReg(uint64_t id)
Determine if a register is invariant.
Definition: arm_cpu.cc:514
gem5::ArmKvmCPU::kvmIntRegs
static KvmIntRegInfo kvmIntRegs[]
Definition: arm_cpu.hh:129
gem5::ArmKvmCPU::KvmIntRegInfo
Definition: arm_cpu.hh:74
gem5::ArmKvmCPU::_regIndexList
RegIndexVector _regIndexList
Cached copy of the list of co-processor registers supported by KVM.
Definition: arm_cpu.hh:167
gem5::ArmKvmCPU::KvmCoreMiscRegInfo
Definition: arm_cpu.hh:84
gem5::ArmKvmCPU::dumpKvmStateMisc
void dumpKvmStateMisc()
Definition: arm_cpu.cc:563
gem5::MipsISA::pc
Bitfield< 4 > pc
Definition: pra_constants.hh:243
gem5::X86ISA::PCState
Definition: pcstate.hh:50
gem5::ArmKvmCPU::KvmIntRegInfo::idx
const RegIndex idx
gem5 index
Definition: arm_cpu.hh:79
gem5::ArmKvmCPU::dump
void dump()
Definition: arm_cpu.cc:389
gem5::ArmKvmCPU::getRegList
const RegIndexVector & getRegList() const
Get a list of registers supported by getOneReg() and setOneReg().
Definition: arm_cpu.cc:414
gem5::PCStateBase
Definition: pcstate.hh:57
gem5::RegIndex
uint16_t RegIndex
Definition: types.hh:176
gem5::BaseKvmCPU::init
void init() override
Definition: base.cc:109
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::ArmKvmCPU::decodeVFPCtrlReg
ArmISA::MiscRegIndex decodeVFPCtrlReg(uint64_t id) const
Definition: arm_cpu.cc:490
gem5::ArmKvmCPU::KvmCoreMiscRegInfo::id
const uint64_t id
KVM ID.
Definition: arm_cpu.hh:87
gem5::ArmKvmCPU::KvmIntRegInfo::id
const uint64_t id
KVM ID.
Definition: arm_cpu.hh:77

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