gem5  v22.0.0.2
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gem5::ArmKvmCPU Class Reference

ARM implementation of a KVM-based hardware virtualized CPU. More...

#include <arm_cpu.hh>

Inheritance diagram for gem5::ArmKvmCPU:


struct  KvmCoreMiscRegInfo
struct  KvmIntRegInfo

Public Member Functions

 ArmKvmCPU (const ArmKvmCPUParams &params)
virtual ~ArmKvmCPU ()
void startup ()
void dump ()
- Public Member Functions inherited from gem5::BaseKvmCPU
 BaseKvmCPU (const BaseKvmCPUParams &params)
virtual ~BaseKvmCPU ()
void init () override
void startup () override
void serializeThread (CheckpointOut &cp, ThreadID tid) const override
void unserializeThread (CheckpointIn &cp, ThreadID tid) override
DrainState drain () override
void drainResume () override
void notifyFork () override
void switchOut () override
void takeOverFrom (BaseCPU *cpu) override
void verifyMemoryMode () const override
PortgetDataPort () override
PortgetInstPort () override
void wakeup (ThreadID tid=0) override
void activateContext (ThreadID thread_num) override
void suspendContext (ThreadID thread_num) override
void deallocateContext (ThreadID thread_num)
void haltContext (ThreadID thread_num) override
long getVCpuID () const
ThreadContextgetContext (int tn) override
Counter totalInsts () const override
Counter totalOps () const override
void finishMMIOPending ()
 Callback from KvmCPUPort to transition the CPU out of RunningMMIOPending when all timing requests have completed. More...
virtual void dump () const
 Dump the internal state to the terminal. More...
void kick () const
 Force an exit from KVM. More...

Protected Types

typedef std::vector< uint64_t > RegIndexVector
- Protected Types inherited from gem5::BaseKvmCPU
enum  Status {
  Idle, Running, RunningService, RunningMMIOPending,

Protected Member Functions

Tick kvmRun (Tick ticks)
 Request KVM to run the guest for a given number of ticks. More...
void updateKvmState ()
 Update the KVM state from the current thread context. More...
void updateThreadContext ()
 Update the current thread context with the KVM state. More...
void stutterPC (PCStateBase &pc) const
 Modify a PCStatePtr's value so that its next PC is the current PC. More...
const RegIndexVectorgetRegList () const
 Get a list of registers supported by getOneReg() and setOneReg(). More...
void kvmArmVCpuInit (uint32_t target)
void kvmArmVCpuInit (const struct kvm_vcpu_init &init)
ArmISA::MiscRegIndex decodeCoProcReg (uint64_t id) const
ArmISA::MiscRegIndex decodeVFPCtrlReg (uint64_t id) const
bool isInvariantReg (uint64_t id)
 Determine if a register is invariant. More...
- Protected Member Functions inherited from gem5::BaseKvmCPU
void tick ()
 Execute the CPU until the next event in the main event queue or until the guest needs service from gem5. More...
virtual uint64_t getHostCycles () const
 Get the value of the hardware cycle counter in the guest. More...
virtual Tick kvmRunDrain ()
 Request the CPU to run until draining completes. More...
struct kvm_run * getKvmRunState ()
 Get a pointer to the kvm_run structure containing all the input and output parameters from kvmRun(). More...
uint8_t * getGuestData (uint64_t offset) const
 Retrieve a pointer to guest data stored at the end of the kvm_run structure. More...
void kvmNonMaskableInterrupt ()
 Send a non-maskable interrupt to the guest. More...
void kvmInterrupt (const struct kvm_interrupt &interrupt)
 Send a normal interrupt to the guest. More...
std::string getAndFormatOneReg (uint64_t id) const
 Get and format one register for printout. More...
virtual bool archIsDrained () const
 Is the architecture specific code in a state that prevents draining? More...
Tick doMMIOAccess (Addr paddr, void *data, int size, bool write)
 Inject a memory mapped IO request into gem5. More...
int ioctl (int request, long p1) const
 vCPU ioctl interface. More...
int ioctl (int request, void *p1) const
int ioctl (int request) const
virtual void ioctlRun ()
 Execute the KVM_RUN ioctl. More...
void getRegisters (struct kvm_regs &regs) const
 Get/Set the register state of the guest vCPU. More...
void setRegisters (const struct kvm_regs &regs)
void getSpecialRegisters (struct kvm_sregs &regs) const
void setSpecialRegisters (const struct kvm_sregs &regs)
void getFPUState (struct kvm_fpu &state) const
 Get/Set the guest FPU/vector state. More...
void setFPUState (const struct kvm_fpu &state)
void setOneReg (uint64_t id, const void *addr)
 Get/Set single register using the KVM_(SET|GET)_ONE_REG API. More...
void setOneReg (uint64_t id, uint64_t value)
void setOneReg (uint64_t id, uint32_t value)
void getOneReg (uint64_t id, void *addr) const
uint64_t getOneRegU64 (uint64_t id) const
uint32_t getOneRegU32 (uint64_t id) const
void syncThreadContext ()
 Update a thread context if the KVM state is dirty with respect to the cached thread context. More...
EventQueuedeviceEventQueue ()
 Get a pointer to the event queue owning devices. More...
void syncKvmState ()
 Update the KVM if the thread context is dirty. More...
virtual Tick handleKvmExit ()
 Main kvmRun exit handler, calls the relevant handleKvmExit* depending on exit type. More...
virtual Tick handleKvmExitIO ()
 The guest performed a legacy IO request (out/inp on x86) More...
virtual Tick handleKvmExitHypercall ()
 The guest requested a monitor service using a hypercall. More...
virtual Tick handleKvmExitIRQWindowOpen ()
 The guest exited because an interrupt window was requested. More...
virtual Tick handleKvmExitUnknown ()
 An unknown architecture dependent error occurred when starting the vCPU. More...
virtual Tick handleKvmExitException ()
 An unhandled virtualization exception occured. More...
virtual Tick handleKvmExitFailEntry ()
 KVM failed to start the virtualized CPU. More...
void setSignalMask (const sigset_t *mask)
 Set the signal mask used in kvmRun() More...

Static Protected Attributes

static KvmIntRegInfo kvmIntRegs []
static KvmCoreMiscRegInfo kvmCoreMiscRegs []

Private Member Functions

bool getRegList (struct kvm_reg_list &regs) const
 Get a list of registers supported by getOneReg() and setOneReg(). More...
void dumpKvmStateCore ()
void dumpKvmStateMisc ()
void dumpKvmStateCoProc (uint64_t id)
void dumpKvmStateVFP (uint64_t id)
void updateKvmStateCore ()
void updateKvmStateMisc ()
void updateKvmStateCoProc (uint64_t id, bool show_warnings)
void updateKvmStateVFP (uint64_t id, bool show_warnings)
void updateTCStateCore ()
void updateTCStateMisc ()
void updateTCStateCoProc (uint64_t id, bool show_warnings)
void updateTCStateVFP (uint64_t id, bool show_warnings)

Private Attributes

bool irqAsserted
 Cached state of the IRQ line. More...
bool fiqAsserted
 Cached state of the FIQ line. More...
RegIndexVector _regIndexList
 Cached copy of the list of co-processor registers supported by KVM. More...

Static Private Attributes

static const std::set< uint64_t > invariant_regs
 List of co-processor registers that KVM requires to be identical on both the host and the guest. More...

Additional Inherited Members

- Public Attributes inherited from gem5::BaseKvmCPU
 A cached copy of a thread's state in the form of a SimpleThread object. More...
 ThreadContext object, provides an interface for external objects to modify this thread's state. More...
gem5::BaseKvmCPU::StatGroup stats
Counter ctrInsts
 Number of instructions executed by the CPU. More...
- Protected Attributes inherited from gem5::BaseKvmCPU
Status _status
 CPU run state. More...
KVMCpuPort dataPort
 Port for data requests. More...
KVMCpuPort instPort
 Unused dummy port for the instruction interface. More...
const bool alwaysSyncTC
 Be conservative and always synchronize the thread context on KVM entry/exit. More...
bool threadContextDirty
 Is the gem5 context dirty? Set to true to force an update of the KVM vCPU state upon the next call to kvmRun(). More...
bool kvmStateDirty
 Is the KVM state dirty? Set to true to force an update of the KVM vCPU state upon the next call to kvmRun(). More...
long vcpuID
 KVM internal ID of the vCPU. More...
pthread_t vcpuThread
 ID of the vCPU thread. More...

Detailed Description

ARM implementation of a KVM-based hardware virtualized CPU.

Architecture specific limitations:

Definition at line 63 of file arm_cpu.hh.

Member Typedef Documentation

◆ RegIndexVector

typedef std::vector<uint64_t> gem5::ArmKvmCPU::RegIndexVector

Definition at line 94 of file arm_cpu.hh.

Constructor & Destructor Documentation

◆ ArmKvmCPU()

gem5::ArmKvmCPU::ArmKvmCPU ( const ArmKvmCPUParams &  params)

Definition at line 342 of file

◆ ~ArmKvmCPU()

gem5::ArmKvmCPU::~ArmKvmCPU ( )

Definition at line 348 of file

Member Function Documentation

◆ decodeCoProcReg()

MiscRegIndex gem5::ArmKvmCPU::decodeCoProcReg ( uint64_t  id) const

◆ decodeVFPCtrlReg()

ArmISA::MiscRegIndex gem5::ArmKvmCPU::decodeVFPCtrlReg ( uint64_t  id) const

◆ dump()

void gem5::ArmKvmCPU::dump ( )

Definition at line 389 of file

References dumpKvmStateCore(), and dumpKvmStateMisc().

◆ dumpKvmStateCoProc()

void gem5::ArmKvmCPU::dumpKvmStateCoProc ( uint64_t  id)

◆ dumpKvmStateCore()

void gem5::ArmKvmCPU::dumpKvmStateCore ( )

◆ dumpKvmStateMisc()

void gem5::ArmKvmCPU::dumpKvmStateMisc ( )

◆ dumpKvmStateVFP()

void gem5::ArmKvmCPU::dumpKvmStateVFP ( uint64_t  id)

◆ getRegList() [1/2]

const ArmKvmCPU::RegIndexVector & gem5::ArmKvmCPU::getRegList ( ) const

Get a list of registers supported by getOneReg() and setOneReg().

Definition at line 414 of file

References _regIndexList, gem5::ArmISA::i, and gem5::VegaISA::p.

Referenced by dumpKvmStateMisc(), updateKvmStateMisc(), and updateTCStateMisc().

◆ getRegList() [2/2]

bool gem5::ArmKvmCPU::getRegList ( struct kvm_reg_list &  regs) const

Get a list of registers supported by getOneReg() and setOneReg().

False if the number of elements allocated in the list is too small to hold the complete register list (the required value is written into n in this case). True on success.

Definition at line 526 of file

References gem5::BaseKvmCPU::ioctl(), and panic.

◆ isInvariantReg()

bool gem5::ArmKvmCPU::isInvariantReg ( uint64_t  id)

Determine if a register is invariant.

Some registers must have the same value in both the host and the guest. Such registers are referred to as "invariant" registers in KVM. This is a restriction imposed by KVM as having different values in ID registers (e.g., the cache identification registers) would confuse the guest kernel.

Definition at line 514 of file

References invariant_regs.

Referenced by dumpKvmStateCoProc(), and updateKvmStateMisc().

◆ kvmArmVCpuInit() [1/2]

void gem5::ArmKvmCPU::kvmArmVCpuInit ( const struct kvm_vcpu_init &  init)

Definition at line 448 of file

References gem5::BaseKvmCPU::init(), gem5::BaseKvmCPU::ioctl(), and panic.

◆ kvmArmVCpuInit() [2/2]

void gem5::ArmKvmCPU::kvmArmVCpuInit ( uint32_t  target)

Definition at line 436 of file

References gem5::BaseKvmCPU::init().

Referenced by startup().

◆ kvmRun()

Tick gem5::ArmKvmCPU::kvmRun ( Tick  ticks)

Request KVM to run the guest for a given number of ticks.

The method returns the approximate number of ticks executed.

The returned number of ticks can be both larger or smaller than the requested number of ticks. A smaller number can, for example, occur when the guest executes MMIO. A larger number is typically due to performance counter inaccuracies.
This method is virtual in order to allow implementations to check for architecture specific events (e.g., interrupts) before entering the VM.
It is the response of the caller (normally tick()) to make sure that the KVM state is synchronized and that the TC is invalidated after entering KVM.
This method does not normally cause any state transitions. However, if it may suspend the CPU by suspending the thread, which leads to a transition to the Idle state. In such a case, kvm must not be entered.
ticksNumber of ticks to execute, set to 0 to exit immediately after finishing pending operations.
Number of ticks executed (see note)

Reimplemented from gem5::BaseKvmCPU.

Definition at line 368 of file

References gem5::ArmISA::Interrupts::checkRaw(), DPRINTF, fiqAsserted, gem5::ArmISA::INT_FIQ, gem5::ArmISA::INT_IRQ, irqAsserted, gem5::BaseKvmCPU::kvmRun(), gem5::KvmVM::setIRQLine(), gem5::BaseKvmCPU::vcpuID, and gem5::BaseKvmCPU::vm.

◆ startup()

void gem5::ArmKvmCPU::startup ( )

Definition at line 353 of file

References kvmArmVCpuInit(), and gem5::BaseKvmCPU::startup().

◆ stutterPC()

void gem5::ArmKvmCPU::stutterPC ( PCStateBase pc) const

Modify a PCStatePtr's value so that its next PC is the current PC.

This needs to be implemented in KVM base classes since modifying the next PC value is an ISA specific operation. This is only used in doMMIOAccess, for reasons explained in a comment there.

Implements gem5::BaseKvmCPU.

Definition at line 101 of file arm_cpu.hh.

References gem5::MipsISA::pc.

◆ updateKvmState()

void gem5::ArmKvmCPU::updateKvmState ( )

Update the KVM state from the current thread context.

The base CPU calls this method before starting the guest CPU when the contextDirty flag is set. The architecture dependent CPU implementation is expected to update all guest state (registers, special registers, and FPU state).

Implements gem5::BaseKvmCPU.

Definition at line 396 of file

References DPRINTF, updateKvmStateCore(), and updateKvmStateMisc().

◆ updateKvmStateCoProc()

void gem5::ArmKvmCPU::updateKvmStateCoProc ( uint64_t  id,
bool  show_warnings 

◆ updateKvmStateCore()

void gem5::ArmKvmCPU::updateKvmStateCore ( )

◆ updateKvmStateMisc()

void gem5::ArmKvmCPU::updateKvmStateMisc ( )

◆ updateKvmStateVFP()

void gem5::ArmKvmCPU::updateKvmStateVFP ( uint64_t  id,
bool  show_warnings 

◆ updateTCStateCoProc()

void gem5::ArmKvmCPU::updateTCStateCoProc ( uint64_t  id,
bool  show_warnings 

◆ updateTCStateCore()

void gem5::ArmKvmCPU::updateTCStateCore ( )

◆ updateTCStateMisc()

void gem5::ArmKvmCPU::updateTCStateMisc ( )

Definition at line 832 of file

References dumpKvmStateMisc(), getRegList(), updateTCStateCoProc(), updateTCStateVFP(), and warn.

Referenced by updateThreadContext().

◆ updateTCStateVFP()

void gem5::ArmKvmCPU::updateTCStateVFP ( uint64_t  id,
bool  show_warnings 

◆ updateThreadContext()

void gem5::ArmKvmCPU::updateThreadContext ( )

Update the current thread context with the KVM state.

The base CPU after the guest updates any of the KVM state. In practice, this happens after kvmRun is called. The architecture dependent code is expected to read the state of the guest CPU and update gem5's thread state.

Implements gem5::BaseKvmCPU.

Definition at line 405 of file

References DPRINTF, updateTCStateCore(), and updateTCStateMisc().

Member Data Documentation

◆ _regIndexList

RegIndexVector gem5::ArmKvmCPU::_regIndexList

Cached copy of the list of co-processor registers supported by KVM.

Definition at line 167 of file arm_cpu.hh.

Referenced by getRegList().

◆ fiqAsserted

bool gem5::ArmKvmCPU::fiqAsserted

Cached state of the FIQ line.

Definition at line 161 of file arm_cpu.hh.

Referenced by kvmRun().

◆ invariant_regs

const std::set< uint64_t > gem5::ArmKvmCPU::invariant_regs

List of co-processor registers that KVM requires to be identical on both the host and the guest.

KVM does not allow writes to these registers.

Definition at line 174 of file arm_cpu.hh.

Referenced by isInvariantReg().

◆ irqAsserted

bool gem5::ArmKvmCPU::irqAsserted

Cached state of the IRQ line.

Definition at line 159 of file arm_cpu.hh.

Referenced by kvmRun().

◆ kvmCoreMiscRegs

ArmKvmCPU::KvmCoreMiscRegInfo gem5::ArmKvmCPU::kvmCoreMiscRegs
Initial value:
= {
regCore32(KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr), MISCREG_CPSR, "CPSR"),
regCore32(KVM_REG_ARM_CORE_REG(svc_regs[2]), MISCREG_SPSR_SVC,
regCore32(KVM_REG_ARM_CORE_REG(abt_regs[2]), MISCREG_SPSR_ABT,
regCore32(KVM_REG_ARM_CORE_REG(und_regs[2]), MISCREG_SPSR_UND,
regCore32(KVM_REG_ARM_CORE_REG(irq_regs[2]), MISCREG_SPSR_IRQ,
regCore32(KVM_REG_ARM_CORE_REG(fiq_regs[2]), MISCREG_SPSR_FIQ,

Definition at line 130 of file arm_cpu.hh.

Referenced by dumpKvmStateCore(), updateKvmStateCore(), and updateTCStateCore().

◆ kvmIntRegs

ArmKvmCPU::KvmIntRegInfo gem5::ArmKvmCPU::kvmIntRegs

Definition at line 129 of file arm_cpu.hh.

Referenced by dumpKvmStateCore(), updateKvmStateCore(), and updateTCStateCore().

The documentation for this class was generated from the following files:
Definition: misc.hh:61
Definition: misc.hh:63
Definition: misc.hh:64
Definition: misc.hh:1096
Definition: misc.hh:65
Definition: misc.hh:67
Definition: misc.hh:69

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