ARM implementation of a KVM-based hardware virtualized CPU. More...

#include <arm_cpu.hh>

Inheritance diagram for gem5::ArmKvmCPU:

Classes
struct	KvmCoreMiscRegInfo

struct	KvmIntRegInfo

Public Member Functions
	ArmKvmCPU (const ArmKvmCPUParams &params)

virtual	~ArmKvmCPU ()

void	startup ()
	startup() is the final initialization call before simulation. More...

void	dump ()

Public Member Functions inherited from gem5::BaseKvmCPU
	BaseKvmCPU (const BaseKvmCPUParams &params)

virtual	~BaseKvmCPU ()

void	init () override
	init() is called after all C++ SimObjects have been created and all ports are connected. More...

void	startup () override
	startup() is the final initialization call before simulation. More...

void	serializeThread (CheckpointOut &cp, ThreadID tid) const override
	Serialize a single thread. More...

void	unserializeThread (CheckpointIn &cp, ThreadID tid) override
	Unserialize one thread. More...

DrainState	drain () override
	Draining is the process of clearing out the states of SimObjects.These are the SimObjects that are partially executed or are partially in flight. More...

void	drainResume () override
	Resume execution after a successful drain. More...

void	notifyFork () override
	Notify a child process of a fork. More...

void	switchOut () override
	Prepare for another CPU to take over execution. More...

void	takeOverFrom (BaseCPU *cpu) override
	Load the state of a CPU from the previous CPU object, invoked on all new CPUs that are about to be switched in. More...

void	verifyMemoryMode () const override
	Verify that the system is in a memory mode supported by the CPU. More...

Port &	getDataPort () override
	Purely virtual method that returns a reference to the data port. More...

Port &	getInstPort () override
	Purely virtual method that returns a reference to the instruction port. More...

void	wakeup (ThreadID tid=0) override

void	activateContext (ThreadID thread_num) override
	Notify the CPU that the indicated context is now active. More...

void	suspendContext (ThreadID thread_num) override
	Notify the CPU that the indicated context is now suspended. More...

void	deallocateContext (ThreadID thread_num)

void	haltContext (ThreadID thread_num) override
	Notify the CPU that the indicated context is now halted. More...

long	getVCpuID () const

ThreadContext *	getContext (int tn) override
	Given a thread num get tho thread context for it. More...

Counter	totalInsts () const override

Counter	totalOps () const override

void	finishMMIOPending ()
	Callback from KvmCPUPort to transition the CPU out of RunningMMIOPending when all timing requests have completed. More...

virtual void	dump () const
	Dump the internal state to the terminal. More...

void	kick () const
	Force an exit from KVM. More...

Public Member Functions inherited from gem5::BaseCPU
int	cpuId () const
	Reads this CPU's ID. More...

uint32_t	socketId () const
	Reads this CPU's Socket ID. More...

RequestorID	dataRequestorId () const
	Reads this CPU's unique data requestor ID. More...

RequestorID	instRequestorId () const
	Reads this CPU's unique instruction requestor ID. More...

Port &	getPort (const std::string &if_name, PortID idx=InvalidPortID) override
	Get a port on this CPU. More...

uint32_t	taskId () const
	Get cpu task id. More...

void	taskId (uint32_t id)
	Set cpu task id. More...

uint32_t	getPid () const

void	setPid (uint32_t pid)

void	workItemBegin ()

void	workItemEnd ()

Tick	instCount ()

BaseInterrupts *	getInterruptController (ThreadID tid)

void	postInterrupt (ThreadID tid, int int_num, int index)

void	clearInterrupt (ThreadID tid, int int_num, int index)

void	clearInterrupts (ThreadID tid)

bool	checkInterrupts (ThreadID tid) const

trace::InstTracer *	getTracer ()
	Provide access to the tracer pointer. More...

int	findContext (ThreadContext *tc)
	Given a Thread Context pointer return the thread num. More...

unsigned	numContexts ()
	Get the number of thread contexts available. More...

ThreadID	contextToThread (ContextID cid)
	Convert ContextID to threadID. More...

	PARAMS (BaseCPU)

	BaseCPU (const Params &params, bool is_checker=false)

virtual	~BaseCPU ()

void	regStats () override
	Callback to set stat parameters. More...

void	regProbePoints () override
	Register probe points for this object. More...

void	registerThreadContexts ()

void	deschedulePowerGatingEvent ()

void	schedulePowerGatingEvent ()

void	flushTLBs ()
	Flush all TLBs in the CPU. More...

bool	switchedOut () const
	Determine if the CPU is switched out. More...

unsigned int	cacheLineSize () const
	Get the cache line size of the system. More...

void	serialize (CheckpointOut &cp) const override
	Serialize this object to the given output stream. More...

void	unserialize (CheckpointIn &cp) override
	Reconstruct the state of this object from a checkpoint. More...

void	scheduleInstStop (ThreadID tid, Counter insts, std::string cause)
	Schedule an event that exits the simulation loops after a predefined number of instructions. More...

void	scheduleSimpointsInstStop (std::vector< Counter > inst_starts)
	Schedule simpoint events using the scheduleInstStop function. More...

void	scheduleInstStopAnyThread (Counter max_insts)
	Schedule an exit event when any threads in the core reach the max_insts instructions using the scheduleInstStop function. More...

uint64_t	getCurrentInstCount (ThreadID tid)
	Get the number of instructions executed by the specified thread on this CPU. More...

void	traceFunctions (Addr pc)

void	armMonitor (ThreadID tid, Addr address)

bool	mwait (ThreadID tid, PacketPtr pkt)

void	mwaitAtomic (ThreadID tid, ThreadContext tc, BaseMMU mmu)

AddressMonitor *	getCpuAddrMonitor (ThreadID tid)

virtual void	htmSendAbortSignal (ThreadID tid, uint64_t htm_uid, HtmFailureFaultCause cause)
	This function is used to instruct the memory subsystem that a transaction should be aborted and the speculative state should be thrown away. More...

virtual void	probeInstCommit (const StaticInstPtr &inst, Addr pc)
	Helper method to trigger PMU probes for a committed instruction. More...

Public Member Functions inherited from gem5::ClockedObject
	ClockedObject (const ClockedObjectParams &p)

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Public Member Functions inherited from gem5::SimObject
const Params &	params () const

	SimObject (const Params &p)

virtual	~SimObject ()

virtual void	loadState (CheckpointIn &cp)
	loadState() is called on each SimObject when restoring from a checkpoint. More...

virtual void	initState ()
	initState() is called on each SimObject when not restoring from a checkpoint. More...

virtual void	regProbeListeners ()
	Register probe listeners for this object. More...

ProbeManager *	getProbeManager ()
	Get the probe manager for this object. More...

DrainState	drain () override
	Provide a default implementation of the drain interface for objects that don't need draining. More...

virtual void	memWriteback ()
	Write back dirty buffers to memory using functional writes. More...

virtual void	memInvalidate ()
	Invalidate the contents of memory buffers. More...

void	serialize (CheckpointOut &cp) const override
	Serialize an object. More...

void	unserialize (CheckpointIn &cp) override
	Unserialize an object. More...

Public Member Functions inherited from gem5::EventManager
EventQueue *	eventQueue () const

void	schedule (Event &event, Tick when)

void	deschedule (Event &event)

void	reschedule (Event &event, Tick when, bool always=false)

void	schedule (Event *event, Tick when)

void	deschedule (Event *event)

void	reschedule (Event *event, Tick when, bool always=false)

void	wakeupEventQueue (Tick when=(Tick) -1)
	This function is not needed by the usual gem5 event loop but may be necessary in derived EventQueues which host gem5 on other schedulers. More...

void	setCurTick (Tick newVal)

	EventManager (EventManager &em)
	Event manger manages events in the event queue. More...

	EventManager (EventManager *em)

	EventManager (EventQueue *eq)

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section. More...

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object. More...

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Member Functions inherited from gem5::Drainable
DrainState	drainState () const
	Return the current drain state of an object. More...

Public Member Functions inherited from gem5::statistics::Group
	Group (Group parent, const char name=nullptr)
	Construct a new statistics group. More...

virtual	~Group ()

virtual void	resetStats ()
	Callback to reset stats. More...

virtual void	preDumpStats ()
	Callback before stats are dumped. More...

void	addStat (statistics::Info *info)
	Register a stat with this group. More...

const std::map< std::string, Group * > &	getStatGroups () const
	Get all child groups associated with this object. More...

const std::vector< Info * > &	getStats () const
	Get all stats associated with this object. More...

void	addStatGroup (const char name, Group block)
	Add a stat block as a child of this block. More...

const Info *	resolveStat (std::string name) const
	Resolve a stat by its name within this group. More...

void	mergeStatGroup (Group *block)
	Merge the contents (stats & children) of a block to this block. More...

	Group ()=delete

	Group (const Group &)=delete

Group &	operator= (const Group &)=delete

Public Member Functions inherited from gem5::Named
	Named (const std::string &name_)

virtual	~Named ()=default

virtual std::string	name () const

Public Member Functions inherited from gem5::Clocked
void	updateClockPeriod ()
	Update the tick to the current tick. More...

Tick	clockEdge (Cycles cycles=Cycles(0)) const
	Determine the tick when a cycle begins, by default the current one, but the argument also enables the caller to determine a future cycle. More...

Cycles	curCycle () const
	Determine the current cycle, corresponding to a tick aligned to a clock edge. More...

Tick	nextCycle () const
	Based on the clock of the object, determine the start tick of the first cycle that is at least one cycle in the future. More...

uint64_t	frequency () const

Tick	clockPeriod () const

double	voltage () const

Cycles	ticksToCycles (Tick t) const

Tick	cyclesToTicks (Cycles c) const

Protected Types
typedef std::vector< uint64_t >	RegIndexVector

Protected Types inherited from gem5::BaseKvmCPU
enum	Status { Idle , Running , RunningService , RunningMMIOPending , RunningServiceCompletion }

Protected Types inherited from gem5::BaseCPU
enum	CPUState { CPU_STATE_ON , CPU_STATE_SLEEP , CPU_STATE_WAKEUP }

Protected Member Functions
Tick	kvmRun (Tick ticks)
	Request KVM to run the guest for a given number of ticks. More...

void	updateKvmState ()
	Update the KVM state from the current thread context. More...

void	updateThreadContext ()
	Update the current thread context with the KVM state. More...

void	stutterPC (PCStateBase &pc) const
	Modify a PCStatePtr's value so that its next PC is the current PC. More...

const RegIndexVector &	getRegList () const
	Get a list of registers supported by getOneReg() and setOneReg(). More...

void	kvmArmVCpuInit (uint32_t target)

void	kvmArmVCpuInit (const struct kvm_vcpu_init &init)

ArmISA::MiscRegIndex	decodeCoProcReg (uint64_t id) const

ArmISA::MiscRegIndex	decodeVFPCtrlReg (uint64_t id) const

bool	isInvariantReg (uint64_t id)
	Determine if a register is invariant. More...

Protected Member Functions inherited from gem5::BaseKvmCPU
void	tick ()
	Execute the CPU until the next event in the main event queue or until the guest needs service from gem5. More...

virtual uint64_t	getHostCycles () const
	Get the value of the hardware cycle counter in the guest. More...

virtual Tick	kvmRunDrain ()
	Request the CPU to run until draining completes. More...

struct kvm_run *	getKvmRunState ()
	Get a pointer to the kvm_run structure containing all the input and output parameters from kvmRun(). More...

uint8_t *	getGuestData (uint64_t offset) const
	Retrieve a pointer to guest data stored at the end of the kvm_run structure. More...

void	kvmNonMaskableInterrupt ()
	Send a non-maskable interrupt to the guest. More...

void	kvmInterrupt (const struct kvm_interrupt &interrupt)
	Send a normal interrupt to the guest. More...

std::string	getAndFormatOneReg (uint64_t id) const
	Get and format one register for printout. More...

virtual bool	archIsDrained () const
	Is the architecture specific code in a state that prevents draining? More...

Tick	doMMIOAccess (Addr paddr, void *data, int size, bool write)
	Inject a memory mapped IO request into gem5. More...

int	ioctl (int request, long p1) const
	vCPU ioctl interface. More...

int	ioctl (int request, void *p1) const

int	ioctl (int request) const

virtual void	ioctlRun ()
	Execute the KVM_RUN ioctl. More...

void	getRegisters (struct kvm_regs &regs) const
	Get/Set the register state of the guest vCPU. More...

void	setRegisters (const struct kvm_regs &regs)

void	getSpecialRegisters (struct kvm_sregs &regs) const

void	setSpecialRegisters (const struct kvm_sregs &regs)

void	getFPUState (struct kvm_fpu &state) const
	Get/Set the guest FPU/vector state. More...

void	setFPUState (const struct kvm_fpu &state)

void	setOneReg (uint64_t id, const void *addr)
	Get/Set single register using the KVM_(SET\|GET)_ONE_REG API. More...

void	setOneReg (uint64_t id, uint64_t value)

void	setOneReg (uint64_t id, uint32_t value)

void	getOneReg (uint64_t id, void *addr) const

uint64_t	getOneRegU64 (uint64_t id) const

uint32_t	getOneRegU32 (uint64_t id) const

void	syncThreadContext ()
	Update a thread context if the KVM state is dirty with respect to the cached thread context. More...

EventQueue *	deviceEventQueue ()
	Get a pointer to the event queue owning devices. More...

void	syncKvmState ()
	Update the KVM if the thread context is dirty. More...

virtual Tick	handleKvmExit ()
	Main kvmRun exit handler, calls the relevant handleKvmExit* depending on exit type. More...

virtual Tick	handleKvmExitIO ()
	The guest performed a legacy IO request (out/inp on x86) More...

virtual Tick	handleKvmExitHypercall ()
	The guest requested a monitor service using a hypercall. More...

virtual Tick	handleKvmExitIRQWindowOpen ()
	The guest exited because an interrupt window was requested. More...

virtual Tick	handleKvmExitUnknown ()
	An unknown architecture dependent error occurred when starting the vCPU. More...

virtual Tick	handleKvmExitException ()
	An unhandled virtualization exception occured. More...

virtual Tick	handleKvmExitFailEntry ()
	KVM failed to start the virtualized CPU. More...

void	setSignalMask (const sigset_t *mask)
	Set the signal mask used in kvmRun() More...

Protected Member Functions inherited from gem5::BaseCPU
void	updateCycleCounters (CPUState state)
	base method keeping track of cycle progression More...

void	enterPwrGating ()

probing::PMUUPtr	pmuProbePoint (const char *name)
	Helper method to instantiate probe points belonging to this object. More...

Protected Member Functions inherited from gem5::Drainable
	Drainable ()

virtual	~Drainable ()

void	signalDrainDone () const
	Signal that an object is drained. More...

Protected Member Functions inherited from gem5::Clocked
	Clocked (ClockDomain &clk_domain)
	Create a clocked object and set the clock domain based on the parameters. More...

	Clocked (Clocked &)=delete

Clocked &	operator= (Clocked &)=delete

virtual	~Clocked ()
	Virtual destructor due to inheritance. More...

void	resetClock () const
	Reset the object's clock using the current global tick value. More...

virtual void	clockPeriodUpdated ()
	A hook subclasses can implement so they can do any extra work that's needed when the clock rate is changed. More...

Static Protected Attributes
static KvmIntRegInfo	kvmIntRegs []

static KvmCoreMiscRegInfo	kvmCoreMiscRegs []

Static Protected Attributes inherited from gem5::BaseCPU
static std::unique_ptr< GlobalStats >	globalStats
	Pointer to the global stat structure. More...

Private Member Functions
bool	getRegList (struct kvm_reg_list &regs) const
	Get a list of registers supported by getOneReg() and setOneReg(). More...

void	dumpKvmStateCore ()

void	dumpKvmStateMisc ()

void	dumpKvmStateCoProc (uint64_t id)

void	dumpKvmStateVFP (uint64_t id)

void	updateKvmStateCore ()

void	updateKvmStateMisc ()

void	updateKvmStateCoProc (uint64_t id, bool show_warnings)

void	updateKvmStateVFP (uint64_t id, bool show_warnings)

void	updateTCStateCore ()

void	updateTCStateMisc ()

void	updateTCStateCoProc (uint64_t id, bool show_warnings)

void	updateTCStateVFP (uint64_t id, bool show_warnings)

Private Attributes
bool	irqAsserted
	Cached state of the IRQ line. More...

bool	fiqAsserted
	Cached state of the FIQ line. More...

RegIndexVector	_regIndexList
	Cached copy of the list of co-processor registers supported by KVM. More...

Static Private Attributes
static const std::set< uint64_t >	invariant_regs
	List of co-processor registers that KVM requires to be identical on both the host and the guest. More...

Additional Inherited Members
Public Types inherited from gem5::ClockedObject
using	Params = ClockedObjectParams
	Parameters of ClockedObject. More...

Public Types inherited from gem5::SimObject
typedef SimObjectParams	Params

Static Public Member Functions inherited from gem5::BaseCPU
static int	numSimulatedCPUs ()

static Counter	numSimulatedInsts ()

static Counter	numSimulatedOps ()

Static Public Member Functions inherited from gem5::SimObject
static void	serializeAll (const std::string &cpt_dir)
	Create a checkpoint by serializing all SimObjects in the system. More...

static SimObject *	find (const char *name)
	Find the SimObject with the given name and return a pointer to it. More...

static void	setSimObjectResolver (SimObjectResolver *resolver)
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...

static SimObjectResolver *	getSimObjectResolver ()
	There is a single object name resolver, and it is only set when simulation is restoring from checkpoints. More...

Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section. More...

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it. More...

Public Attributes inherited from gem5::BaseKvmCPU
SimpleThread *	thread
	A cached copy of a thread's state in the form of a SimpleThread object. More...

ThreadContext *	tc
	ThreadContext object, provides an interface for external objects to modify this thread's state. More...

KvmVM *	vm

gem5::BaseKvmCPU::StatGroup	stats

Counter	ctrInsts
	Number of instructions executed by the CPU. More...

Public Attributes inherited from gem5::BaseCPU
ThreadID	numThreads
	Number of threads we're actually simulating (<= SMT_MAX_THREADS). More...

System *	system

gem5::BaseCPU::BaseCPUStats	baseStats

Cycles	syscallRetryLatency

Public Attributes inherited from gem5::ClockedObject
PowerState *	powerState

Static Public Attributes inherited from gem5::BaseCPU
static const uint32_t	invldPid = std::numeric_limits<uint32_t>::max()
	Invalid or unknown Pid. More...

Protected Attributes inherited from gem5::BaseKvmCPU
Status	_status
	CPU run state. More...

KVMCpuPort	dataPort
	Port for data requests. More...

KVMCpuPort	instPort
	Unused dummy port for the instruction interface. More...

const bool	alwaysSyncTC
	Be conservative and always synchronize the thread context on KVM entry/exit. More...

bool	threadContextDirty
	Is the gem5 context dirty? Set to true to force an update of the KVM vCPU state upon the next call to kvmRun(). More...

bool	kvmStateDirty
	Is the KVM state dirty? Set to true to force an update of the KVM vCPU state upon the next call to kvmRun(). More...

long	vcpuID
	KVM internal ID of the vCPU. More...

pthread_t	vcpuThread
	ID of the vCPU thread. More...

Protected Attributes inherited from gem5::BaseCPU
Tick	instCnt
	Instruction count used for SPARC misc register. More...

int	_cpuId

const uint32_t	_socketId
	Each cpu will have a socket ID that corresponds to its physical location in the system. More...

RequestorID	_instRequestorId
	instruction side request id that must be placed in all requests More...

RequestorID	_dataRequestorId
	data side request id that must be placed in all requests More...

uint32_t	_taskId
	An intrenal representation of a task identifier within gem5. More...

uint32_t	_pid
	The current OS process ID that is executing on this processor. More...

bool	_switchedOut
	Is the CPU switched out or active? More...

const unsigned int	_cacheLineSize
	Cache the cache line size that we get from the system. More...

std::vector< BaseInterrupts * >	interrupts

std::vector< ThreadContext * >	threadContexts

trace::InstTracer *	tracer

Cycles	previousCycle

CPUState	previousState

const Cycles	pwrGatingLatency

const bool	powerGatingOnIdle

EventFunctionWrapper	enterPwrGatingEvent

probing::PMUUPtr	ppRetiredInsts
	Instruction commit probe point. More...

probing::PMUUPtr	ppRetiredInstsPC

probing::PMUUPtr	ppRetiredLoads
	Retired load instructions. More...

probing::PMUUPtr	ppRetiredStores
	Retired store instructions. More...

probing::PMUUPtr	ppRetiredBranches
	Retired branches (any type) More...

probing::PMUUPtr	ppAllCycles
	CPU cycle counter even if any thread Context is suspended. More...

probing::PMUUPtr	ppActiveCycles
	CPU cycle counter, only counts if any thread contexts is active. More...

ProbePointArg< bool > *	ppSleeping
	ProbePoint that signals transitions of threadContexts sets. More...

Protected Attributes inherited from gem5::SimObject
const SimObjectParams &	_params
	Cached copy of the object parameters. More...

Protected Attributes inherited from gem5::EventManager
EventQueue *	eventq
	A pointer to this object's event queue. More...

Detailed Description

ARM implementation of a KVM-based hardware virtualized CPU.

Architecture specific limitations:

LPAE is currently not supported by gem5. We therefore panic if LPAE is enabled when returning to gem5.
The co-processor based interface to the architected timer is unsupported. We can't support this due to limitations in the KVM API on ARM.
M5 ops are currently not supported. This requires either a kernel hack or a memory mapped device that handles the guest<->m5 interface.

Definition at line 63 of file arm_cpu.hh.

Member Typedef Documentation

◆ RegIndexVector

typedef std::vector<uint64_t> gem5::ArmKvmCPU::RegIndexVector

protected

Definition at line 94 of file arm_cpu.hh.

Constructor & Destructor Documentation

◆ ArmKvmCPU()

gem5::ArmKvmCPU::ArmKvmCPU ( const ArmKvmCPUParams & params )

Definition at line 342 of file arm_cpu.cc.

◆ ~ArmKvmCPU()

gem5::ArmKvmCPU::~ArmKvmCPU ( )

virtual

Definition at line 348 of file arm_cpu.cc.

Member Function Documentation

◆ decodeCoProcReg()

MiscRegIndex gem5::ArmKvmCPU::decodeCoProcReg ( uint64_t id ) const

protected

Definition at line 455 of file arm_cpu.cc.

References gem5::ArmISA::decodeCP14Reg(), gem5::ArmISA::decodeCP15Reg(), gem5::ArmISA::NUM_MISCREGS, gem5::ArmISA::opc2, and warn.

Referenced by dumpKvmStateCoProc(), updateKvmStateCoProc(), and updateTCStateCoProc().

◆ decodeVFPCtrlReg()

ArmISA::MiscRegIndex gem5::ArmKvmCPU::decodeVFPCtrlReg ( uint64_t id ) const

protected

Definition at line 490 of file arm_cpu.cc.

References gem5::ArmISA::MISCREG_FPEXC, gem5::ArmISA::MISCREG_FPSCR, gem5::ArmISA::MISCREG_FPSID, gem5::ArmISA::MISCREG_MVFR0, gem5::ArmISA::MISCREG_MVFR1, gem5::ArmISA::NUM_MISCREGS, and warn_once.

Referenced by dumpKvmStateVFP(), updateKvmStateVFP(), and updateTCStateVFP().

◆ dump()

void gem5::ArmKvmCPU::dump ( )

Definition at line 389 of file arm_cpu.cc.

References dumpKvmStateCore(), and dumpKvmStateMisc().

◆ dumpKvmStateCoProc()

void gem5::ArmKvmCPU::dumpKvmStateCoProc ( uint64_t id )

private

Definition at line 599 of file arm_cpu.cc.

References decodeCoProcReg(), gem5::BaseKvmCPU::getAndFormatOneReg(), gem5::BaseKvmCPU::getOneRegU32(), inform, isInvariantReg(), gem5::ArmISA::miscRegName, gem5::Named::name(), gem5::ArmISA::NUM_MISCREGS, gem5::ThreadContext::readMiscReg(), gem5::ThreadContext::readMiscRegNoEffect(), and gem5::BaseKvmCPU::tc.

Referenced by dumpKvmStateMisc().

◆ dumpKvmStateCore()

void gem5::ArmKvmCPU::dumpKvmStateCore ( )

private

Definition at line 541 of file arm_cpu.cc.

References gem5::BaseKvmCPU::getOneRegU32(), inform, kvmCoreMiscRegs, kvmIntRegs, gem5::ArmISA::miscRegName, gem5::ArmISA::NUM_MISCREGS, gem5::ArmISA::cc_reg::NumRegs, gem5::MipsISA::pc, and gem5::PowerISA::ri.

Referenced by dump(), updateKvmStateCore(), and updateTCStateCore().

◆ dumpKvmStateMisc()

void gem5::ArmKvmCPU::dumpKvmStateMisc ( )

private

Definition at line 563 of file arm_cpu.cc.

References dumpKvmStateCoProc(), dumpKvmStateVFP(), gem5::BaseKvmCPU::getAndFormatOneReg(), getRegList(), and inform.

Referenced by dump(), updateKvmStateMisc(), and updateTCStateMisc().

◆ dumpKvmStateVFP()

void gem5::ArmKvmCPU::dumpKvmStateVFP ( uint64_t id )

private

Definition at line 641 of file arm_cpu.cc.

References decodeVFPCtrlReg(), gem5::BaseKvmCPU::getAndFormatOneReg(), inform, gem5::ArmISA::miscRegName, and gem5::ArmISA::NUM_MISCREGS.

Referenced by dumpKvmStateMisc().

◆ getRegList() [1/2]

const ArmKvmCPU::RegIndexVector & gem5::ArmKvmCPU::getRegList ( ) const

protected

Get a list of registers supported by getOneReg() and setOneReg().

Definition at line 414 of file arm_cpu.cc.

References _regIndexList, gem5::ArmISA::i, and gem5::VegaISA::p.

Referenced by dumpKvmStateMisc(), updateKvmStateMisc(), and updateTCStateMisc().

◆ getRegList() [2/2]

bool gem5::ArmKvmCPU::getRegList ( struct kvm_reg_list & regs ) const

private

Get a list of registers supported by getOneReg() and setOneReg().

Returns: False if the number of elements allocated in the list is too small to hold the complete register list (the required value is written into n in this case). True on success.

Definition at line 526 of file arm_cpu.cc.

References gem5::BaseKvmCPU::ioctl(), and panic.

◆ isInvariantReg()

bool gem5::ArmKvmCPU::isInvariantReg ( uint64_t id )

protected

Determine if a register is invariant.

Some registers must have the same value in both the host and the guest. Such registers are referred to as "invariant" registers in KVM. This is a restriction imposed by KVM as having different values in ID registers (e.g., the cache identification registers) would confuse the guest kernel.

Definition at line 514 of file arm_cpu.cc.

References invariant_regs.

Referenced by dumpKvmStateCoProc(), and updateKvmStateMisc().

◆ kvmArmVCpuInit() [1/2]

void gem5::ArmKvmCPU::kvmArmVCpuInit ( const struct kvm_vcpu_init & init )

protected

Definition at line 448 of file arm_cpu.cc.

References gem5::BaseKvmCPU::init(), gem5::BaseKvmCPU::ioctl(), and panic.

◆ kvmArmVCpuInit() [2/2]

void gem5::ArmKvmCPU::kvmArmVCpuInit ( uint32_t target )

protected

Definition at line 436 of file arm_cpu.cc.

References gem5::BaseKvmCPU::init().

Referenced by startup().

◆ kvmRun()

Tick gem5::ArmKvmCPU::kvmRun ( Tick ticks )

protectedvirtual

Request KVM to run the guest for a given number of ticks.

The method returns the approximate number of ticks executed.

Note: The returned number of ticks can be both larger or smaller than the requested number of ticks. A smaller number can, for example, occur when the guest executes MMIO. A larger number is typically due to performance counter inaccuracies.; This method is virtual in order to allow implementations to check for architecture specific events (e.g., interrupts) before entering the VM.; It is the response of the caller (normally tick()) to make sure that the KVM state is synchronized and that the TC is invalidated after entering KVM.; This method does not normally cause any state transitions. However, if it may suspend the CPU by suspending the thread, which leads to a transition to the Idle state. In such a case, kvm must not be entered.

Parameters

ticks Number of ticks to execute, set to 0 to exit immediately after finishing pending operations.

Returns: Number of ticks executed (see note)

Reimplemented from gem5::BaseKvmCPU.

Definition at line 368 of file arm_cpu.cc.

References gem5::ArmISA::Interrupts::checkRaw(), DPRINTF, fiqAsserted, gem5::ArmISA::INT_FIQ, gem5::ArmISA::INT_IRQ, gem5::BaseCPU::interrupts, irqAsserted, gem5::BaseKvmCPU::kvmRun(), gem5::KvmVM::setIRQLine(), gem5::BaseKvmCPU::vcpuID, and gem5::BaseKvmCPU::vm.

◆ startup()

void gem5::ArmKvmCPU::startup ( )

virtual

startup() is the final initialization call before simulation.

All state is initialized (including unserialized state, if any, such as the curTick() value), so this is the appropriate place to schedule initial event(s) for objects that need them.

Reimplemented from gem5::SimObject.

Definition at line 353 of file arm_cpu.cc.

References kvmArmVCpuInit(), and gem5::BaseKvmCPU::startup().

◆ stutterPC()

void gem5::ArmKvmCPU::stutterPC ( PCStateBase & pc ) const

inlineprotectedvirtual

Modify a PCStatePtr's value so that its next PC is the current PC.

This needs to be implemented in KVM base classes since modifying the next PC value is an ISA specific operation. This is only used in doMMIOAccess, for reasons explained in a comment there.

Implements gem5::BaseKvmCPU.

Definition at line 101 of file arm_cpu.hh.

References gem5::MipsISA::pc.

◆ updateKvmState()

void gem5::ArmKvmCPU::updateKvmState ( )

protectedvirtual

Update the KVM state from the current thread context.

The base CPU calls this method before starting the guest CPU when the contextDirty flag is set. The architecture dependent CPU implementation is expected to update all guest state (registers, special registers, and FPU state).

Implements gem5::BaseKvmCPU.

Definition at line 396 of file arm_cpu.cc.

References DPRINTF, updateKvmStateCore(), and updateKvmStateMisc().

◆ updateKvmStateCoProc()

void gem5::ArmKvmCPU::updateKvmStateCoProc	(	uint64_t	id,
		bool	show_warnings
	)

private

Definition at line 726 of file arm_cpu.cc.

References decodeCoProcReg(), hack, gem5::KVM_REG64_TTBR0(), gem5::KVM_REG64_TTBR1(), gem5::ArmISA::MISCREG_TTBR0, gem5::ArmISA::MISCREG_TTBR1, gem5::ArmISA::miscRegName, gem5::ArmISA::NUM_MISCREGS, gem5::ThreadContext::readMiscRegNoEffect(), gem5::X86ISA::reg, gem5::BaseKvmCPU::setOneReg(), gem5::BaseKvmCPU::tc, and warn.

Referenced by updateKvmStateMisc().

◆ updateKvmStateCore()

void gem5::ArmKvmCPU::updateKvmStateCore ( )

private

Definition at line 662 of file arm_cpu.cc.

References DPRINTF, dumpKvmStateCore(), gem5::ArmISA::flatIntRegClass, gem5::ThreadContext::getReg(), gem5::PCStateBase::instAddr(), kvmCoreMiscRegs, kvmIntRegs, gem5::ArmISA::NUM_MISCREGS, gem5::ArmISA::cc_reg::NumRegs, gem5::ThreadContext::pcState(), gem5::ThreadContext::readMiscReg(), gem5::PowerISA::ri, gem5::BaseKvmCPU::setOneReg(), and gem5::BaseKvmCPU::tc.

Referenced by updateKvmState().

◆ updateKvmStateMisc()

void gem5::ArmKvmCPU::updateKvmStateMisc ( )

private

Definition at line 688 of file arm_cpu.cc.

References DPRINTF, dumpKvmStateMisc(), getRegList(), isInvariantReg(), updateKvmStateCoProc(), updateKvmStateVFP(), and warn.

Referenced by updateKvmState().

◆ updateKvmStateVFP()

void gem5::ArmKvmCPU::updateKvmStateVFP	(	uint64_t	id,
		bool	show_warnings
	)

private

Definition at line 760 of file arm_cpu.cc.

References decodeVFPCtrlReg(), gem5::X86ISA::floatRegClass, gem5::ThreadContext::getReg(), gem5::ArmISA::miscRegName, gem5::ArmISA::NUM_MISCREGS, gem5::ThreadContext::readMiscReg(), gem5::BaseKvmCPU::setOneReg(), gem5::BaseKvmCPU::tc, and warn.

Referenced by updateKvmStateMisc().

◆ updateTCStateCoProc()

void gem5::ArmKvmCPU::updateTCStateCoProc	(	uint64_t	id,
		bool	show_warnings
	)

private

◆ updateTCStateCore()

void gem5::ArmKvmCPU::updateTCStateCore ( )

private

◆ updateTCStateMisc()

void gem5::ArmKvmCPU::updateTCStateMisc ( )

private

Definition at line 831 of file arm_cpu.cc.

References dumpKvmStateMisc(), getRegList(), updateTCStateCoProc(), updateTCStateVFP(), and warn.

Referenced by updateThreadContext().

◆ updateTCStateVFP()

void gem5::ArmKvmCPU::updateTCStateVFP	(	uint64_t	id,
		bool	show_warnings
	)

private

Definition at line 900 of file arm_cpu.cc.

References decodeVFPCtrlReg(), gem5::X86ISA::floatRegClass, gem5::BaseKvmCPU::getOneRegU64(), gem5::ArmISA::miscRegName, gem5::ArmISA::NUM_MISCREGS, gem5::ThreadContext::setMiscReg(), gem5::ThreadContext::setReg(), gem5::BaseKvmCPU::tc, and warn.

Referenced by updateTCStateMisc().

◆ updateThreadContext()

void gem5::ArmKvmCPU::updateThreadContext ( )

protectedvirtual

Update the current thread context with the KVM state.

The base CPU after the guest updates any of the KVM state. In practice, this happens after kvmRun is called. The architecture dependent code is expected to read the state of the guest CPU and update gem5's thread state.

Implements gem5::BaseKvmCPU.

Definition at line 405 of file arm_cpu.cc.

References DPRINTF, updateTCStateCore(), and updateTCStateMisc().

Member Data Documentation

◆ _regIndexList

RegIndexVector gem5::ArmKvmCPU::_regIndexList

mutableprivate

Cached copy of the list of co-processor registers supported by KVM.

Definition at line 167 of file arm_cpu.hh.

Referenced by getRegList().

◆ fiqAsserted

bool gem5::ArmKvmCPU::fiqAsserted

private

Cached state of the FIQ line.

Definition at line 161 of file arm_cpu.hh.

Referenced by kvmRun().

◆ invariant_regs

const std::set< uint64_t > gem5::ArmKvmCPU::invariant_regs

staticprivate

List of co-processor registers that KVM requires to be identical on both the host and the guest.

KVM does not allow writes to these registers.

Definition at line 174 of file arm_cpu.hh.

Referenced by isInvariantReg().

◆ irqAsserted

bool gem5::ArmKvmCPU::irqAsserted

private

Cached state of the IRQ line.

Definition at line 159 of file arm_cpu.hh.

Referenced by kvmRun().

◆ kvmCoreMiscRegs

ArmKvmCPU::KvmCoreMiscRegInfo gem5::ArmKvmCPU::kvmCoreMiscRegs

staticprotected

Initial value:

= {
    regCore32(KVM_REG_ARM_CORE_REG(usr_regs.ARM_cpsr), MISCREG_CPSR, "CPSR"),
    regCore32(KVM_REG_ARM_CORE_REG(svc_regs[2]), MISCREG_SPSR_SVC,
            "SPSR(SVC)"),
    regCore32(KVM_REG_ARM_CORE_REG(abt_regs[2]), MISCREG_SPSR_ABT,
            "SPSR(ABT)"),
    regCore32(KVM_REG_ARM_CORE_REG(und_regs[2]), MISCREG_SPSR_UND,
            "SPSR(UND)"),
    regCore32(KVM_REG_ARM_CORE_REG(irq_regs[2]), MISCREG_SPSR_IRQ,
            "SPSR(IRQ)"),
    regCore32(KVM_REG_ARM_CORE_REG(fiq_regs[2]), MISCREG_SPSR_FIQ,
            "SPSR(FIQ)"),
    { 0, NUM_MISCREGS }
}

Definition at line 130 of file arm_cpu.hh.

Referenced by dumpKvmStateCore(), updateKvmStateCore(), and updateTCStateCore().

◆ kvmIntRegs

ArmKvmCPU::KvmIntRegInfo gem5::ArmKvmCPU::kvmIntRegs

staticprotected

Definition at line 129 of file arm_cpu.hh.

Referenced by dumpKvmStateCore(), updateKvmStateCore(), and updateTCStateCore().

The documentation for this class was generated from the following files:

arch/arm/kvm/arm_cpu.hh
arch/arm/kvm/arm_cpu.cc

Classes

Public Member Functions

Protected Types

Protected Member Functions

Static Protected Attributes

Private Member Functions

Private Attributes

Static Private Attributes

Additional Inherited Members

Detailed Description

Member Typedef Documentation

◆ RegIndexVector

Constructor & Destructor Documentation

◆ ArmKvmCPU()

◆ ~ArmKvmCPU()

Member Function Documentation

◆ decodeCoProcReg()

◆ decodeVFPCtrlReg()

◆ dump()

◆ dumpKvmStateCoProc()

◆ dumpKvmStateCore()

◆ dumpKvmStateMisc()

◆ dumpKvmStateVFP()

◆ getRegList() [1/2]

◆ getRegList() [2/2]

◆ isInvariantReg()

◆ kvmArmVCpuInit() [1/2]

◆ kvmArmVCpuInit() [2/2]

◆ kvmRun()

◆ startup()

◆ stutterPC()

◆ updateKvmState()

◆ updateKvmStateCoProc()

◆ updateKvmStateCore()

◆ updateKvmStateMisc()

◆ updateKvmStateVFP()

◆ updateTCStateCoProc()

◆ updateTCStateCore()

◆ updateTCStateMisc()

◆ updateTCStateVFP()

◆ updateThreadContext()

Member Data Documentation

◆ _regIndexList

◆ fiqAsserted

◆ invariant_regs

◆ irqAsserted

◆ kvmCoreMiscRegs

◆ kvmIntRegs