39#ifndef __MEM_CACHE_PROBE_ARG_HH__
40#define __MEM_CACHE_PROBE_ARG_HH__
Information provided to probes on a cache event.
PacketPtr pkt
Packet that triggered the cache access.
CacheAccessProbeArg(PacketPtr _pkt, CacheAccessor &_cache)
CacheAccessor & cache
Accessor for the cache.
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Declaration of the Packet class.
Provides generic cache lookup functions.
virtual bool coalesce() const =0
Determine if cache is coalescing writes.
virtual bool hasBeenPrefetched(Addr addr, bool is_secure, RequestorID requestor) const =0
Determine if address has been prefetched by the requestor.
virtual bool inCache(Addr addr, bool is_secure) const =0
Determine if address is in cache.
virtual bool inMissQueue(Addr addr, bool is_secure) const =0
Determine if address is in cache miss queue.
virtual bool hasBeenPrefetched(Addr addr, bool is_secure) const =0
Determine if address has been prefetched.
A data contents update is composed of the updated block's address, the old contents,...
bool hwPrefetched
Set if the update is from a prefetch or evicting a prefetched block that was never used.
CacheDataUpdateProbeArg(Addr _addr, bool is_secure, RequestorID _requestorID, CacheAccessor &_accessor)
std::vector< uint64_t > newData
The new data contents.
bool isSecure
Whether the block belongs to the secure address space.
CacheAccessor & accessor
Accessor for the cache.
Addr addr
The updated block's address.
const RequestorID requestorID
Block original requestor.
std::vector< uint64_t > oldData
The stale data contents.