gem5 v24.0.0.0
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cache_probe_arg.hh
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1/*
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36 */
37
38
39#ifndef __MEM_CACHE_PROBE_ARG_HH__
40#define __MEM_CACHE_PROBE_ARG_HH__
41
42#include "mem/packet.hh"
43
44namespace gem5
45{
46
55{
57 virtual bool inCache(Addr addr, bool is_secure) const = 0;
58
60 virtual bool hasBeenPrefetched(Addr addr, bool is_secure) const = 0;
61
63 virtual bool hasBeenPrefetched(Addr addr, bool is_secure,
64 RequestorID requestor) const = 0;
65
67 virtual bool inMissQueue(Addr addr, bool is_secure) const = 0;
68
70 virtual bool coalesce() const = 0;
71};
72
78{
79 public:
84
86 :pkt(_pkt), cache(_cache)
87 {
88 }
89};
90
97{
113
114 CacheDataUpdateProbeArg(Addr _addr, bool is_secure,
115 RequestorID _requestorID,
116 CacheAccessor &_accessor)
117 : addr(_addr), isSecure(is_secure), requestorID(_requestorID),
118 oldData(), newData(), accessor(_accessor)
119 {
120 }
121};
122
123} // namespace gem5
124
125#endif //__MEM_CACHE_PROBE_ARG_HH__
Information provided to probes on a cache event.
PacketPtr pkt
Packet that triggered the cache access.
CacheAccessProbeArg(PacketPtr _pkt, CacheAccessor &_cache)
CacheAccessor & cache
Accessor for the cache.
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
STL vector class.
Definition stl.hh:37
Bitfield< 3 > addr
Definition types.hh:84
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition types.hh:147
uint16_t RequestorID
Definition request.hh:95
Declaration of the Packet class.
Provides generic cache lookup functions.
virtual bool coalesce() const =0
Determine if cache is coalescing writes.
virtual bool hasBeenPrefetched(Addr addr, bool is_secure, RequestorID requestor) const =0
Determine if address has been prefetched by the requestor.
virtual bool inCache(Addr addr, bool is_secure) const =0
Determine if address is in cache.
virtual bool inMissQueue(Addr addr, bool is_secure) const =0
Determine if address is in cache miss queue.
virtual bool hasBeenPrefetched(Addr addr, bool is_secure) const =0
Determine if address has been prefetched.
A data contents update is composed of the updated block's address, the old contents,...
bool hwPrefetched
Set if the update is from a prefetch or evicting a prefetched block that was never used.
CacheDataUpdateProbeArg(Addr _addr, bool is_secure, RequestorID _requestorID, CacheAccessor &_accessor)
std::vector< uint64_t > newData
The new data contents.
bool isSecure
Whether the block belongs to the secure address space.
CacheAccessor & accessor
Accessor for the cache.
Addr addr
The updated block's address.
const RequestorID requestorID
Block original requestor.
std::vector< uint64_t > oldData
The stale data contents.

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