#include <timer_sp804.hh>

Inheritance diagram for gem5::Sp804::Timer:

Public Types
enum	{ LoadReg = 0x00 , CurrentReg = 0x04 , ControlReg = 0x08 , IntClear = 0x0C , RawISR = 0x10 , MaskedISR = 0x14 , BGLoad = 0x18 , Size = 0x20 }

Public Member Functions
	BitUnion32 (CTRL) Bitfield< 0 > oneShot

void	counterAtZero ()
	Called when the counter reaches 0.

void	restartCounter (uint32_t val)
	Restart the counter ticking at val.

	Timer (std::string __name, Sp804 parent, ArmInterruptPin _interrupt, Tick clock)

std::string	name () const

void	read (PacketPtr pkt, Addr daddr)
	Handle read for a single timer.

void	write (PacketPtr pkt, Addr daddr)
	Handle write for a single timer.

void	serialize (CheckpointOut &cp) const override
	Serialize an object.

void	unserialize (CheckpointIn &cp) override
	Unserialize an object.

Public Member Functions inherited from gem5::Serializable
	Serializable ()

virtual	~Serializable ()

void	serializeSection (CheckpointOut &cp, const char *name) const
	Serialize an object into a new section.

void	serializeSection (CheckpointOut &cp, const std::string &name) const

void	unserializeSection (CheckpointIn &cp, const char *name)
	Unserialize an a child object.

void	unserializeSection (CheckpointIn &cp, const std::string &name)

Public Attributes
Bitfield< 1 >	timerSize

Bitfield< 3, 2 >	timerPrescale

Bitfield< 5 >	intEnable

Bitfield< 6 >	timerMode

Bitfield< 7 >	timerEnable

EndBitUnion(CTRL) protected Sp804 *	parent
	Pointer to parent class.

ArmInterruptPin *const	interrupt
	Pointer to the interrupt pin.

const Tick	clock
	Number of ticks in a clock input.

CTRL	control
	Control register as specified above.

bool	rawInt
	If timer has caused an interrupt.

bool	pendingInt
	If an interrupt is currently pending.

uint32_t	loadValue
	Value to load into counter when periodic mode reaches 0.

EventFunctionWrapper	zeroEvent

Additional Inherited Members
Static Public Member Functions inherited from gem5::Serializable
static const std::string &	currentSection ()
	Gets the fully-qualified name of the active section.

static void	generateCheckpointOut (const std::string &cpt_dir, std::ofstream &outstream)
	Generate a checkpoint file so that the serialization can be routed to it.

Detailed Description

Definition at line 62 of file timer_sp804.hh.

Member Enumeration Documentation

◆ anonymous enum

anonymous enum

Enumerator
LoadReg
CurrentReg
ControlReg
IntClear
RawISR
MaskedISR
BGLoad
Size

Definition at line 66 of file timer_sp804.hh.

Constructor & Destructor Documentation

◆ Timer()

gem5::Sp804::Timer::Timer	(	std::string	__name,
		Sp804 *	parent,
		ArmInterruptPin *	_interrupt,
		Tick	clock )

Definition at line 61 of file timer_sp804.cc.

References counterAtZero().

Member Function Documentation

◆ BitUnion32()

gem5::Sp804::Timer::BitUnion32 ( CTRL )

◆ counterAtZero()

void gem5::Sp804::Timer::counterAtZero ( )

Called when the counter reaches 0.

Definition at line 203 of file timer_sp804.cc.

References DPRINTF.

Referenced by Timer().

◆ name()

std::string gem5::Sp804::Timer::name ( ) const

inline

Definition at line 125 of file timer_sp804.hh.

References gem5::Named::_name.

◆ read()

void gem5::Sp804::Timer::read	(	PacketPtr	pkt,
		Addr	daddr )

Handle read for a single timer.

Definition at line 91 of file timer_sp804.cc.

References gem5::curTick(), DPRINTF, gem5::Packet::getLE(), panic, gem5::Packet::setLE(), and timerPrescale.

Referenced by gem5::Sp804::read().

◆ restartCounter()

void gem5::Sp804::Timer::restartCounter ( uint32_t val )

Restart the counter ticking at val.

Parameters

val	the value to start at (pre-16 bit masking if en)

Definition at line 182 of file timer_sp804.cc.

References gem5::bits(), gem5::curTick(), DPRINTF, and gem5::X86ISA::val.

◆ serialize()

void gem5::Sp804::Timer::serialize ( CheckpointOut & cp ) const

overridevirtual

Serialize an object.

Output an object's state into the current checkpoint section.

Parameters

cp	Checkpoint state

Implements gem5::Serializable.

Definition at line 230 of file timer_sp804.cc.

References DPRINTF, and SERIALIZE_SCALAR.

◆ unserialize()

void gem5::Sp804::Timer::unserialize ( CheckpointIn & cp )

overridevirtual

Unserialize an object.

Read an object's state from the current checkpoint section.

Parameters

cp	Checkpoint state

Implements gem5::Serializable.

Definition at line 252 of file timer_sp804.cc.

References DPRINTF, and UNSERIALIZE_SCALAR.

◆ write()

void gem5::Sp804::Timer::write	(	PacketPtr	pkt,
		Addr	daddr )

Handle write for a single timer.

Definition at line 145 of file timer_sp804.cc.

References DPRINTF, gem5::Packet::getLE(), and panic.

Referenced by gem5::Sp804::write().

Member Data Documentation

◆ clock

const Tick gem5::Sp804::Timer::clock

Number of ticks in a clock input.

Definition at line 97 of file timer_sp804.hh.

◆ control

CTRL gem5::Sp804::Timer::control

Control register as specified above.

Definition at line 100 of file timer_sp804.hh.

◆ intEnable

Bitfield<5> gem5::Sp804::Timer::intEnable

Definition at line 82 of file timer_sp804.hh.

◆ interrupt

ArmInterruptPin* const gem5::Sp804::Timer::interrupt

Pointer to the interrupt pin.

Definition at line 94 of file timer_sp804.hh.

◆ loadValue

uint32_t gem5::Sp804::Timer::loadValue

Value to load into counter when periodic mode reaches 0.

Definition at line 111 of file timer_sp804.hh.

◆ parent

EndBitUnion (CTRL) protected Sp804* gem5::Sp804::Timer::parent

Pointer to parent class.

Definition at line 91 of file timer_sp804.hh.

◆ pendingInt

bool gem5::Sp804::Timer::pendingInt

If an interrupt is currently pending.

Logical and of CTRL.intEnable and rawInt

Definition at line 108 of file timer_sp804.hh.

◆ rawInt

bool gem5::Sp804::Timer::rawInt

If timer has caused an interrupt.

This is irrespective of interrupt enable

Definition at line 104 of file timer_sp804.hh.

◆ timerEnable

Bitfield<7> gem5::Sp804::Timer::timerEnable

Definition at line 84 of file timer_sp804.hh.

◆ timerMode

Bitfield<6> gem5::Sp804::Timer::timerMode

Definition at line 83 of file timer_sp804.hh.

◆ timerPrescale

Bitfield<3,2> gem5::Sp804::Timer::timerPrescale

Definition at line 81 of file timer_sp804.hh.

Referenced by read().

◆ timerSize

Bitfield<1> gem5::Sp804::Timer::timerSize

Definition at line 80 of file timer_sp804.hh.

◆ zeroEvent

EventFunctionWrapper gem5::Sp804::Timer::zeroEvent

Definition at line 115 of file timer_sp804.hh.

The documentation for this class was generated from the following files:

dev/arm/timer_sp804.hh
dev/arm/timer_sp804.cc

Public Types

Public Member Functions

Public Attributes

Additional Inherited Members

Detailed Description

Member Enumeration Documentation

◆ anonymous enum

Constructor & Destructor Documentation

◆ Timer()

Member Function Documentation

◆ BitUnion32()

◆ counterAtZero()

◆ name()

◆ read()

◆ restartCounter()

◆ serialize()

◆ unserialize()

◆ write()

Member Data Documentation

◆ clock

◆ control

◆ intEnable

◆ interrupt

◆ loadValue

◆ parent

◆ pendingInt

◆ rawInt

◆ timerEnable

◆ timerMode

◆ timerPrescale

◆ timerSize

◆ zeroEvent