gem5  v21.1.0.2
timer_sp804.hh
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37 
38 #ifndef __DEV_ARM_SP804_HH__
39 #define __DEV_ARM_SP804_HH__
40 
41 #include <cstdint>
42 
43 #include "base/bitunion.hh"
44 #include "base/types.hh"
45 #include "dev/arm/amba_device.hh"
46 #include "params/Sp804.hh"
47 #include "sim/eventq.hh"
48 #include "sim/serialize.hh"
49 
54 namespace gem5
55 {
56 
57 class BaseGic;
58 
59 class Sp804 : public AmbaPioDevice
60 {
61  protected:
62  class Timer : public Serializable
63  {
64 
65  public:
66  enum
67  {
68  LoadReg = 0x00,
69  CurrentReg = 0x04,
70  ControlReg = 0x08,
71  IntClear = 0x0C,
72  RawISR = 0x10,
73  MaskedISR = 0x14,
74  BGLoad = 0x18,
75  Size = 0x20
76  };
77 
78  BitUnion32(CTRL)
79  Bitfield<0> oneShot;
80  Bitfield<1> timerSize;
81  Bitfield<3,2> timerPrescale;
82  Bitfield<5> intEnable;
83  Bitfield<6> timerMode;
84  Bitfield<7> timerEnable;
86 
87  protected:
88  std::string _name;
89 
91  Sp804 *parent;
92 
95 
97  const Tick clock;
98 
100  CTRL control;
101 
104  bool rawInt;
105 
109 
111  uint32_t loadValue;
112 
114  void counterAtZero();
116 
117  public:
120  void restartCounter(uint32_t val);
121 
122  Timer(std::string __name, Sp804 *parent, ArmInterruptPin *_interrupt,
123  Tick clock);
124 
125  std::string name() const { return _name; }
126 
128  void read(PacketPtr pkt, Addr daddr);
129 
131  void write(PacketPtr pkt, Addr daddr);
132 
133  void serialize(CheckpointOut &cp) const override;
134  void unserialize(CheckpointIn &cp) override;
135  };
136 
140 
141  public:
142  using Params = Sp804Params;
143 
148  Sp804(const Params &p);
149 
155  Tick read(PacketPtr pkt) override;
156 
162  Tick write(PacketPtr pkt) override;
163 
164 
165  void serialize(CheckpointOut &cp) const override;
166  void unserialize(CheckpointIn &cp) override;
167 };
168 
169 } // namespace gem5
170 
171 #endif // __DEV_ARM_SP804_HH__
gem5::Sp804::Timer::restartCounter
void restartCounter(uint32_t val)
Restart the counter ticking at val.
Definition: timer_sp804.cc:182
gem5::Sp804::Timer::zeroEvent
EventFunctionWrapper zeroEvent
Definition: timer_sp804.hh:115
gem5::Sp804::Timer::MaskedISR
@ MaskedISR
Definition: timer_sp804.hh:73
gem5::Sp804::Timer::interrupt
ArmInterruptPin *const interrupt
Pointer to the interrupt pin.
Definition: timer_sp804.hh:94
gem5::Sp804::Timer::RawISR
@ RawISR
Definition: timer_sp804.hh:72
gem5::Sp804::Timer::BitUnion32
BitUnion32(CTRL) Bitfield< 0 > oneShot
gem5::Sp804::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: timer_sp804.cc:277
serialize.hh
gem5::Sp804::Timer::name
std::string name() const
Definition: timer_sp804.hh:125
gem5::Sp804::Timer::timerEnable
Bitfield< 7 > timerEnable
Definition: timer_sp804.hh:84
gem5::Sp804::Timer::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: timer_sp804.cc:230
gem5::Sp804::Timer::clock
const Tick clock
Number of ticks in a clock input.
Definition: timer_sp804.hh:97
amba_device.hh
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::Sp804::Timer::write
void write(PacketPtr pkt, Addr daddr)
Handle write for a single timer.
Definition: timer_sp804.cc:145
gem5::Sp804
Definition: timer_sp804.hh:59
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:775
gem5::Sp804::Timer::loadValue
uint32_t loadValue
Value to load into counter when periodic mode reaches 0.
Definition: timer_sp804.hh:111
gem5::Sp804::Timer::read
void read(PacketPtr pkt, Addr daddr)
Handle read for a single timer.
Definition: timer_sp804.cc:91
gem5::AmbaPioDevice::Params
AmbaPioDeviceParams Params
Definition: amba_device.hh:84
gem5::Sp804::Timer::counterAtZero
void counterAtZero()
Called when the counter reaches 0.
Definition: timer_sp804.cc:203
gem5::AmbaPioDevice
Definition: amba_device.hh:78
gem5::Sp804::Sp804
Sp804(const Params &p)
The constructor for RealView just registers itself with the MMU.
Definition: timer_sp804.cc:54
gem5::Serializable
Basic support for object serialization.
Definition: serialize.hh:169
gem5::Sp804::Timer
Definition: timer_sp804.hh:62
gem5::Sp804::read
Tick read(PacketPtr pkt) override
Handle a read to the device.
Definition: timer_sp804.cc:72
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:283
EndBitUnion
EndBitUnion(PciCommandRegister) union PCIConfig
Definition: pcireg.h:65
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::Sp804::Timer::IntClear
@ IntClear
Definition: timer_sp804.hh:71
bitunion.hh
gem5::Sp804::Timer::timerSize
Bitfield< 1 > timerSize
Definition: timer_sp804.hh:80
gem5::Sp804::Timer::control
CTRL control
Control register as specified above.
Definition: timer_sp804.hh:100
gem5::Sp804::Timer::rawInt
bool rawInt
If timer has caused an interrupt.
Definition: timer_sp804.hh:104
gem5::Sp804::Timer::ControlReg
@ ControlReg
Definition: timer_sp804.hh:70
gem5::Sp804::Timer::BGLoad
@ BGLoad
Definition: timer_sp804.hh:74
gem5::Sp804::Timer::timerMode
Bitfield< 6 > timerMode
Definition: timer_sp804.hh:83
gem5::Sp804::Timer::LoadReg
@ LoadReg
Definition: timer_sp804.hh:68
gem5::Sp804::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: timer_sp804.cc:284
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::Sp804::Timer::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: timer_sp804.cc:252
gem5::Sp804::Timer::parent
EndBitUnion(CTRL) protected Sp804 * parent
Pointer to parent class.
Definition: timer_sp804.hh:85
gem5::EventFunctionWrapper
Definition: eventq.hh:1115
gem5::Sp804::Timer::Size
@ Size
Definition: timer_sp804.hh:75
gem5::Sp804::timer1
Timer timer1
Definition: timer_sp804.hh:139
gem5::Sp804::timer0
Timer timer0
Timers that do the actual work.
Definition: timer_sp804.hh:138
types.hh
gem5::Sp804::Timer::Timer
Timer(std::string __name, Sp804 *parent, ArmInterruptPin *_interrupt, Tick clock)
Definition: timer_sp804.cc:61
gem5::Sp804::write
Tick write(PacketPtr pkt) override
All writes are simply ignored.
Definition: timer_sp804.cc:127
gem5::Sp804::Timer::CurrentReg
@ CurrentReg
Definition: timer_sp804.hh:69
gem5::Sp804::Timer::timerPrescale
Bitfield< 3, 2 > timerPrescale
Definition: timer_sp804.hh:81
gem5::ArmInterruptPin
Generic representation of an Arm interrupt pin.
Definition: base_gic.hh:200
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::Sp804::Timer::intEnable
Bitfield< 5 > intEnable
Definition: timer_sp804.hh:82
gem5::Named::_name
const std::string _name
Definition: named.hh:41
gem5::Sp804::Timer::pendingInt
bool pendingInt
If an interrupt is currently pending.
Definition: timer_sp804.hh:108
eventq.hh

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