gem5::VegaISA::GPUISA Class Reference

#include <gpu_isa.hh>

Public Member Functions
	GPUISA (Wavefront &wf)
template<typename T >
T	readConstVal (int opIdx) const
ScalarRegU32	readMiscReg (int opIdx) const
void	writeMiscReg (int opIdx, ScalarRegU32 operandVal)
bool	hasScalarUnit () const
void	advancePC (GPUDynInstPtr gpuDynInst)

Private Member Functions
ScalarRegU32	readPosConstReg (int opIdx) const
ScalarRegI32	readNegConstReg (int opIdx) const

Private Attributes
Wavefront &	wavefront
StatusReg	statusReg
ScalarRegU32	m0

Static Private Attributes
static const std::array< const ScalarRegU32, NumPosConstRegs >	posConstRegs
static const std::array< const ScalarRegI32, NumNegConstRegs >	negConstRegs

Detailed Description

Definition at line 51 of file gpu_isa.hh.

Constructor & Destructor Documentation

GPUISA()

gem5::VegaISA::GPUISA::GPUISA

(

Wavefront &

wf

)

Definition at line 44 of file gpu_isa.cc.

Member Function Documentation

advancePC()

void gem5::VegaISA::GPUISA::advancePC

(

GPUDynInstPtr

gpuDynInst

)

Definition at line 83 of file gpu_isa.cc.

References gem5::Wavefront::pc(), and wavefront.

hasScalarUnit()

bool gem5::VegaISA::GPUISA::hasScalarUnit ( ) const

inline

Definition at line 76 of file gpu_isa.hh.

readConstVal()

template<typename T >

T gem5::VegaISA::GPUISA::readConstVal ( int opIdx ) const

inline

Definition at line 57 of file gpu_isa.hh.

References gem5::VegaISA::isNegConstVal(), gem5::VegaISA::isPosConstVal(), panic_if, readNegConstReg(), readPosConstReg(), and gem5::X86ISA::val.

readMiscReg()

ScalarRegU32 gem5::VegaISA::GPUISA::readMiscReg

(

int

opIdx

)

const

Definition at line 49 of file gpu_isa.cc.

References fatal, m0, gem5::VegaISA::REG_M0, gem5::VegaISA::REG_SCC, gem5::VegaISA::REG_ZERO, gem5::VegaISA::StatusReg::SCC, and statusReg.

readNegConstReg()

ScalarRegI32 gem5::VegaISA::GPUISA::readNegConstReg ( int opIdx ) const

inlineprivate

Definition at line 85 of file gpu_isa.hh.

References negConstRegs, and gem5::VegaISA::REG_INT_CONST_NEG_MIN.

Referenced by readConstVal().

readPosConstReg()

ScalarRegU32 gem5::VegaISA::GPUISA::readPosConstReg ( int opIdx ) const

inlineprivate

Definition at line 80 of file gpu_isa.hh.

References posConstRegs, and gem5::VegaISA::REG_INT_CONST_POS_MIN.

Referenced by readConstVal().

writeMiscReg()

void gem5::VegaISA::GPUISA::writeMiscReg	(	int	opIdx,
		ScalarRegU32	operandVal )

Definition at line 66 of file gpu_isa.cc.

References fatal, m0, gem5::VegaISA::REG_M0, gem5::VegaISA::REG_SCC, gem5::VegaISA::StatusReg::SCC, and statusReg.

Member Data Documentation

m0

ScalarRegU32 gem5::VegaISA::GPUISA::m0

private

Definition at line 101 of file gpu_isa.hh.

Referenced by readMiscReg(), and writeMiscReg().

negConstRegs

const std::array< const ScalarRegI32, NumNegConstRegs > gem5::VegaISA::GPUISA::negConstRegs

staticprivate

Initial value:

= { {
            -1, -2, -3, -4, -5, -6, -7, -8, -9, -10, -11, -12, -13, -14, -15,
            -16
        } }

Definition at line 93 of file gpu_isa.hh.

Referenced by readNegConstReg().

posConstRegs

const std::array< const ScalarRegU32, NumPosConstRegs > gem5::VegaISA::GPUISA::posConstRegs

staticprivate

Initial value:

= { {
            1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19,
            20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36,
            37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53,
            54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64
        } }

Definition at line 91 of file gpu_isa.hh.

Referenced by readPosConstReg().

statusReg

StatusReg gem5::VegaISA::GPUISA::statusReg

private

Definition at line 99 of file gpu_isa.hh.

Referenced by readMiscReg(), and writeMiscReg().

wavefront

Wavefront& gem5::VegaISA::GPUISA::wavefront

private

Definition at line 96 of file gpu_isa.hh.

Referenced by advancePC().

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The documentation for this class was generated from the following files:

• arch/amdgpu/vega/gpu_isa.hh
• arch/amdgpu/vega/gpu_isa.cc