gem5  v22.1.0.0
data64.hh
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37 
38 #ifndef __ARCH_ARM_INSTS_DATA64_HH__
39 #define __ARCH_ARM_INSTS_DATA64_HH__
40 
42 #include "base/trace.hh"
43 
44 namespace gem5
45 {
46 
47 namespace ArmISA
48 {
49 
50 class DataXImmOp : public ArmStaticInst
51 {
52  protected:
54  uint64_t imm;
55 
56  DataXImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
57  RegIndex _dest, RegIndex _op1, uint64_t _imm) :
58  ArmStaticInst(mnem, _machInst, __opClass),
59  dest(_dest), op1(_op1), imm(_imm)
60  {}
61 
62  std::string generateDisassembly(
63  Addr pc, const loader::SymbolTable *symtab) const override;
64 };
65 
67 {
68  protected:
70  uint64_t imm;
71 
72  DataXImmOnlyOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
73  RegIndex _dest, uint64_t _imm) :
74  ArmStaticInst(mnem, _machInst, __opClass),
75  dest(_dest), imm(_imm)
76  {}
77 
78  std::string generateDisassembly(
79  Addr pc, const loader::SymbolTable *symtab) const override;
80 };
81 
82 class DataXSRegOp : public ArmStaticInst
83 {
84  protected:
86  int32_t shiftAmt;
87  ArmShiftType shiftType;
88 
89  DataXSRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
90  RegIndex _dest, RegIndex _op1, RegIndex _op2,
91  int32_t _shiftAmt, ArmShiftType _shiftType) :
92  ArmStaticInst(mnem, _machInst, __opClass),
93  dest(_dest), op1(_op1), op2(_op2),
94  shiftAmt(_shiftAmt), shiftType(_shiftType)
95  {}
96 
97  std::string generateDisassembly(
98  Addr pc, const loader::SymbolTable *symtab) const override;
99 };
100 
102 {
103  protected:
106  int32_t shiftAmt;
107 
108  DataXERegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
109  RegIndex _dest, RegIndex _op1, RegIndex _op2,
110  ArmExtendType _extendType, int32_t _shiftAmt) :
111  ArmStaticInst(mnem, _machInst, __opClass),
112  dest(_dest), op1(_op1), op2(_op2),
113  extendType(_extendType), shiftAmt(_shiftAmt)
114  {}
115 
116  std::string generateDisassembly(
117  Addr pc, const loader::SymbolTable *symtab) const override;
118 };
119 
121 {
122  protected:
124 
125  DataX1RegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
126  RegIndex _dest, RegIndex _op1) :
127  ArmStaticInst(mnem, _machInst, __opClass), dest(_dest), op1(_op1)
128  {}
129 
130  std::string generateDisassembly(
131  Addr pc, const loader::SymbolTable *symtab) const override;
132 };
133 
135 {
136  protected:
138  uint64_t imm;
139 
140  DataX1RegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
141  RegIndex _dest, RegIndex _op1, uint64_t _imm) :
142  ArmStaticInst(mnem, _machInst, __opClass), dest(_dest), op1(_op1),
143  imm(_imm)
144  {}
145 
146  std::string generateDisassembly(
147  Addr pc, const loader::SymbolTable *symtab) const override;
148 };
149 
151 {
152  protected:
154  uint64_t imm1, imm2;
155 
156  DataX1Reg2ImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
157  RegIndex _dest, RegIndex _op1, uint64_t _imm1,
158  uint64_t _imm2) :
159  ArmStaticInst(mnem, _machInst, __opClass), dest(_dest), op1(_op1),
160  imm1(_imm1), imm2(_imm2)
161  {}
162 
163  std::string generateDisassembly(
164  Addr pc, const loader::SymbolTable *symtab) const override;
165 };
166 
168 {
169  protected:
171 
172  DataX2RegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
173  RegIndex _dest, RegIndex _op1, RegIndex _op2) :
174  ArmStaticInst(mnem, _machInst, __opClass),
175  dest(_dest), op1(_op1), op2(_op2)
176  {}
177 
178  std::string generateDisassembly(
179  Addr pc, const loader::SymbolTable *symtab) const override;
180 };
181 
183 {
184  protected:
186  uint64_t imm;
187 
188  DataX2RegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
189  RegIndex _dest, RegIndex _op1, RegIndex _op2,
190  uint64_t _imm) :
191  ArmStaticInst(mnem, _machInst, __opClass),
192  dest(_dest), op1(_op1), op2(_op2), imm(_imm)
193  {}
194 
195  std::string generateDisassembly(
196  Addr pc, const loader::SymbolTable *symtab) const override;
197 };
198 
200 {
201  protected:
203 
204  DataX3RegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
205  RegIndex _dest, RegIndex _op1, RegIndex _op2,
206  RegIndex _op3) :
207  ArmStaticInst(mnem, _machInst, __opClass),
208  dest(_dest), op1(_op1), op2(_op2), op3(_op3)
209  {}
210 
211  std::string generateDisassembly(
212  Addr pc, const loader::SymbolTable *symtab) const override;
213 };
214 
216 {
217  protected:
219  uint64_t imm;
221  uint8_t defCc;
222 
223  DataXCondCompImmOp(const char *mnem, ExtMachInst _machInst,
224  OpClass __opClass, RegIndex _op1, uint64_t _imm,
225  ConditionCode _condCode, uint8_t _defCc) :
226  ArmStaticInst(mnem, _machInst, __opClass),
227  op1(_op1), imm(_imm), condCode(_condCode), defCc(_defCc)
228  {}
229 
230  std::string generateDisassembly(
231  Addr pc, const loader::SymbolTable *symtab) const override;
232 };
233 
235 {
236  protected:
239  uint8_t defCc;
240 
241  DataXCondCompRegOp(const char *mnem, ExtMachInst _machInst,
242  OpClass __opClass, RegIndex _op1, RegIndex _op2,
243  ConditionCode _condCode, uint8_t _defCc) :
244  ArmStaticInst(mnem, _machInst, __opClass),
245  op1(_op1), op2(_op2), condCode(_condCode), defCc(_defCc)
246  {}
247 
248  std::string generateDisassembly(
249  Addr pc, const loader::SymbolTable *symtab) const override;
250 };
251 
253 {
254  protected:
257 
258  DataXCondSelOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
259  RegIndex _dest, RegIndex _op1, RegIndex _op2,
260  ConditionCode _condCode) :
261  ArmStaticInst(mnem, _machInst, __opClass),
262  dest(_dest), op1(_op1), op2(_op2), condCode(_condCode)
263  {}
264 
265  std::string generateDisassembly(
266  Addr pc, const loader::SymbolTable *symtab) const override;
267 };
268 
269 } // namespace ArmISA
270 } // namespace gem5
271 
272 #endif //__ARCH_ARM_INSTS_PREDINST_HH__
DataX1Reg2ImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, uint64_t _imm1, uint64_t _imm2)
Definition: data64.hh:156
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:113
DataX1RegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, uint64_t _imm)
Definition: data64.hh:140
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:100
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:88
DataX1RegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1)
Definition: data64.hh:125
DataX2RegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, uint64_t _imm)
Definition: data64.hh:188
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:140
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:126
DataX2RegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2)
Definition: data64.hh:172
DataX3RegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, RegIndex _op3)
Definition: data64.hh:204
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:155
DataXCondCompImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _op1, uint64_t _imm, ConditionCode _condCode, uint8_t _defCc)
Definition: data64.hh:223
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:171
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:184
DataXCondCompRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _op1, RegIndex _op2, ConditionCode _condCode, uint8_t _defCc)
Definition: data64.hh:241
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:199
ConditionCode condCode
Definition: data64.hh:256
DataXCondSelOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, ConditionCode _condCode)
Definition: data64.hh:258
ArmExtendType extendType
Definition: data64.hh:105
DataXERegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, ArmExtendType _extendType, int32_t _shiftAmt)
Definition: data64.hh:108
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:78
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:57
DataXImmOnlyOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, uint64_t _imm)
Definition: data64.hh:72
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:47
DataXImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, uint64_t _imm)
Definition: data64.hh:56
std::string generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const override
Internal function to generate disassembly string.
Definition: data64.cc:68
DataXSRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, RegIndex _dest, RegIndex _op1, RegIndex _op2, int32_t _shiftAmt, ArmShiftType _shiftType)
Definition: data64.hh:89
ArmShiftType shiftType
Definition: data64.hh:87
ConditionCode
Definition: cc.hh:92
Bitfield< 4 > pc
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint16_t RegIndex
Definition: types.hh:176
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147

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