gem5 v24.0.0.0
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exit_gen.cc
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1/*
2 * Copyright (c) 2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 */
37
38#include "base/logging.hh"
39#include "base/trace.hh"
40#include "debug/TrafficGen.hh"
41#include "exit_gen.hh"
42#include "sim/sim_exit.hh"
43
44namespace gem5
45{
46
47void
49{
50 DPRINTF(TrafficGen, "%s has encountered the exit state and will "
51 "terminate the simulation.\n", name());
52 exitSimLoop(name() + " has encountered the exit state and will "
53 "terminate the simulation.\n");
54}
55
58{
59 panic("Simulation should have exited");
60 return NULL;
61}
62
63Tick
64ExitGen::nextPacketTick(bool elastic, Tick delay) const
65{
66 return MaxTick;
67}
68
69} // namespace gem5
#define DPRINTF(x,...)
Definition trace.hh:210
std::string name() const
Get the name, useful for DPRINTFs.
Definition base_gen.hh:107
Tick nextPacketTick(bool elastic, Tick delay) const
Determine the tick when the next packet is available.
Definition exit_gen.cc:64
void enter()
Enter this generator state.
Definition exit_gen.cc:48
PacketPtr getNextPacket()
Get the next generated packet.
Definition exit_gen.cc:57
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition packet.hh:295
The traffic generator is a module that generates stimuli for the memory system, based on a collection...
Declaration of the exit generator that ends the simulation.
#define panic(...)
This implements a cprintf based panic() function.
Definition logging.hh:188
Copyright (c) 2024 - Pranith Kumar Copyright (c) 2020 Inria All rights reserved.
Definition binary32.hh:36
uint64_t Tick
Tick count type.
Definition types.hh:58
void exitSimLoop(const std::string &message, int exit_code, Tick when, Tick repeat, bool serialize)
Schedule an event to exit the simulation loop (returning to Python) at the end of the current cycle (...
Definition sim_events.cc:88
const Tick MaxTick
Definition types.hh:60

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