gem5  v22.1.0.0
base_gen.hh
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2012-2013, 2017-2018 ARM Limited
3  * All rights reserved
4  *
5  * The license below extends only to copyright in the software and shall
6  * not be construed as granting a license to any other intellectual
7  * property including but not limited to intellectual property relating
8  * to a hardware implementation of the functionality of the software
9  * licensed here under. You may use the software subject to the license
10  * terms below provided that you ensure that this notice is replicated
11  * unmodified and in its entirety in all distributions of the software,
12  * modified or unmodified, in source code or in binary form.
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions are
16  * met: redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer;
18  * redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution;
21  * neither the name of the copyright holders nor the names of its
22  * contributors may be used to endorse or promote products derived from
23  * this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36  */
37 
43 #ifndef __CPU_TRAFFIC_GEN_BASE_GEN_HH__
44 #define __CPU_TRAFFIC_GEN_BASE_GEN_HH__
45 
46 #include <cstdint>
47 #include <string>
48 
49 #include "base/types.hh"
50 #include "mem/packet.hh"
51 #include "mem/request.hh"
52 
53 namespace gem5
54 {
55 
56 class BaseTrafficGen;
57 class SimObject;
58 
64 class BaseGen
65 {
66 
67  protected:
68 
70  const std::string _name;
71 
74 
83  PacketPtr getPacket(Addr addr, unsigned size, const MemCmd& cmd,
85 
86  public:
87 
89  const Tick duration;
90 
98  BaseGen(SimObject &obj, RequestorID requestor_id, Tick _duration);
99 
100  virtual ~BaseGen() { }
101 
107  std::string name() const { return _name; }
108 
112  virtual void enter() = 0;
113 
119  virtual PacketPtr getNextPacket() = 0;
120 
124  virtual void exit() { };
125 
135  virtual Tick nextPacketTick(bool elastic, Tick delay) const = 0;
136 
137 };
138 
139 class StochasticGen : public BaseGen
140 {
141  public:
143  RequestorID requestor_id, Tick _duration,
144  Addr start_addr, Addr end_addr,
145  Addr _blocksize, Addr cacheline_size,
146  Tick min_period, Tick max_period,
147  uint8_t read_percent, Addr data_limit);
148 
149  protected:
152 
154  const Addr endAddr;
155 
158 
161 
165 
169  const uint8_t readPercent;
170 
173 };
174 
175 } // namespace gem5
176 
177 #endif
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
Base class for all generators, with the shared functionality and virtual functions for entering,...
Definition: base_gen.hh:65
PacketPtr getPacket(Addr addr, unsigned size, const MemCmd &cmd, Request::FlagsType flags=0)
Generate a new request and associated packet.
Definition: base_gen.cc:55
const Tick duration
Time to spend in this state.
Definition: base_gen.hh:89
virtual void exit()
Exit this generator state.
Definition: base_gen.hh:124
virtual Tick nextPacketTick(bool elastic, Tick delay) const =0
Determine the tick when the next packet is available.
virtual PacketPtr getNextPacket()=0
Get the next generated packet.
BaseGen(SimObject &obj, RequestorID requestor_id, Tick _duration)
Create a base generator.
Definition: base_gen.cc:48
const RequestorID requestorId
The RequestorID used for generating requests.
Definition: base_gen.hh:73
const std::string _name
Name to use for status and debug printing.
Definition: base_gen.hh:70
std::string name() const
Get the name, useful for DPRINTFs.
Definition: base_gen.hh:107
virtual void enter()=0
Enter this generator state.
virtual ~BaseGen()
Definition: base_gen.hh:100
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:294
uint64_t FlagsType
Definition: request.hh:100
Abstract superclass for simulation objects.
Definition: sim_object.hh:148
const Addr startAddr
Start of address range.
Definition: base_gen.hh:151
const Tick minPeriod
Request generation period.
Definition: base_gen.hh:163
const Addr dataLimit
Maximum amount of data to manipulate.
Definition: base_gen.hh:172
const Addr cacheLineSize
Cache line size in the simulated system.
Definition: base_gen.hh:160
const Addr endAddr
End of address range.
Definition: base_gen.hh:154
StochasticGen(SimObject &obj, RequestorID requestor_id, Tick _duration, Addr start_addr, Addr end_addr, Addr _blocksize, Addr cacheline_size, Tick min_period, Tick max_period, uint8_t read_percent, Addr data_limit)
Definition: base_gen.cc:78
const Tick maxPeriod
Definition: base_gen.hh:164
const Addr blocksize
Blocksize and address increment.
Definition: base_gen.hh:157
const uint8_t readPercent
Percent of generated transactions that should be reads.
Definition: base_gen.hh:169
uint8_t flags
Definition: helpers.cc:66
Bitfield< 3 > addr
Definition: types.hh:84
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
uint64_t Tick
Tick count type.
Definition: types.hh:58
uint16_t RequestorID
Definition: request.hh:95
Declaration of the Packet class.
Declaration of a request, the overall memory request consisting of the parts of the request that are ...

Generated on Wed Dec 21 2022 10:22:32 for gem5 by doxygen 1.9.1