gem5  v22.1.0.0
gpu_compute_driver.hh
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31 
40 #ifndef __GPU_COMPUTE_GPU_COMPUTE_DRIVER_HH__
41 #define __GPU_COMPUTE_GPU_COMPUTE_DRIVER_HH__
42 
43 #include <cassert>
44 #include <cstdint>
45 #include <set>
46 #include <unordered_map>
47 
48 #include "base/addr_range_map.hh"
49 #include "base/types.hh"
50 #include "enums/GfxVersion.hh"
51 #include "mem/request.hh"
52 #include "sim/emul_driver.hh"
53 
54 namespace gem5
55 {
56 
57 struct GPUComputeDriverParams;
58 class GPUCommandProcessor;
59 class PortProxy;
60 class ThreadContext;
61 
62 class GPUComputeDriver final : public EmulatedDriver
63 {
64  public:
65  typedef GPUComputeDriverParams Params;
66  GPUComputeDriver(const Params &p);
67  int ioctl(ThreadContext *tc, unsigned req, Addr ioc_buf) override;
68 
69  int open(ThreadContext *tc, int mode, int flags) override;
70  Addr mmap(ThreadContext *tc, Addr start, uint64_t length,
71  int prot, int tgt_flags, int tgt_fd, off_t offset) override;
72  virtual void signalWakeupEvent(uint32_t event_id);
73  void sleepCPU(ThreadContext *tc, uint32_t milliSecTimeout);
83  void setMtype(RequestPtr req);
84 
85  int
87  {
88  switch (gfxVersion) {
89  case GfxVersion::gfx801:
90  case GfxVersion::gfx803:
91  case GfxVersion::gfx902:
92  return 4;
93  case GfxVersion::gfx900:
94  // gfx900 supports large BAR, so it has a larger doorbell
95  return 8;
96  default:
97  fatal("Invalid GPU type\n");
98  }
99  return 4;
100  }
101 
102  class DriverWakeupEvent : public Event
103  {
104  public:
106  ThreadContext *thrd_cntxt)
107  : driver(gpu_driver), tc(thrd_cntxt) {}
108  void process() override;
109  const char *description() const override;
110  void scheduleWakeup(Tick wakeup_delay);
111  private:
114  };
115 
117  {
118  public:
120  mailBoxPtr(0), tc(nullptr), threadWaiting(false), setEvent(false)
121  {}
122  // Mail box pointer for this address. Current implementation does not
123  // use this mailBoxPtr to notify events but directly calls
124  // signalWakeupEvent from dispatcher (GPU) to notifiy events. So,
125  // currently this mailBoxPtr is not used. But a future implementation
126  // may communicate to the driver using mailBoxPtr.
128  // Thread context waiting on this even. We do not support multiple
129  // threads waiting on an event currently.
131  // threadWaiting = true, if some thread context is waiting on this
132  // event. A thread context waiting on this event is put to sleep.
134  // setEvent = true, if this event is triggered but when this event
135  // triggered, no thread context was waiting on it. In the future, some
136  // thread context will try to wait on this event but since event has
137  // already happened, we will not allow that thread context to go to
138  // sleep. The above mentioned scneario can happen when the waiting
139  // thread and wakeup thread race on this event and the wakeup thread
140  // beat the waiting thread at the driver.
141  bool setEvent;
142  };
143  typedef class EventTableEntry ETEntry;
144 
145  private:
150  uint32_t queueId;
151  bool isdGPU;
152  GfxVersion gfxVersion;
155  uint32_t eventSlotIndex;
156  //Event table that keeps track of events. It is indexed with event ID.
157  std::unordered_map<uint32_t, ETEntry> ETable;
158 
163 
168  {
169  SHARED = 0,
171  CACHED = 2,
173  };
174 
176 
177  // TCEvents map keeps trak of the events that can wakeup this thread. When
178  // multiple events can wake up this thread, this data structure helps to
179  // reset all events when one of those events wake up this thread. the
180  // signal events that can wake up this thread are stored in signalEvents
181  // whereas the timer wakeup event is stored in timerEvent.
182  class EventList
183  {
184  public:
185  EventList() : driver(nullptr), timerEvent(nullptr, nullptr) {}
186  EventList(GPUComputeDriver *gpu_driver, ThreadContext *thrd_cntxt)
187  : driver(gpu_driver), timerEvent(gpu_driver, thrd_cntxt)
188  { }
189  void clearEvents() {
190  assert(driver);
191  for (auto event : signalEvents) {
192  assert(event < driver->eventSlotIndex);
193  driver->ETable[event].tc = nullptr;
194  driver->ETable[event].threadWaiting = false;
195  }
196  signalEvents.clear();
197  if (timerEvent.scheduled()) {
199  }
200  }
203  // The set of events that can wake up the same thread.
204  std::set<uint32_t> signalEvents;
205  };
206  std::unordered_map<ThreadContext *, EventList> TCEvents;
207 
212  void registerUncacheableMemory(Addr start, Addr length);
213 
229  Addr gpuVmApeBase(int gpuNum) const;
230  Addr gpuVmApeLimit(Addr apeBase) const;
231  Addr scratchApeBase(int gpuNum) const;
232  Addr scratchApeBaseV9() const;
233  Addr scratchApeLimit(Addr apeBase) const;
234  Addr ldsApeBase(int gpuNum) const;
235  Addr ldsApeBaseV9() const;
236  Addr ldsApeLimit(Addr apeBase) const;
237 
245  Addr length);
246  Addr deallocateGpuVma(Addr start);
247 
248  void allocateQueue(PortProxy &mem_proxy, Addr ioc_buf_addr);
249 
250 };
251 
252 } // namespace gem5
253 
254 #endif // __GPU_COMPUTE_GPU_COMPUTE_DRIVER_HH__
Defines global host-dependent types: Counter, Tick, and (indirectly) {int,uint}{8,...
The AddrRangeMap uses an STL map to implement an interval tree for address decoding.
EmulatedDriver is an abstract base class for fake SE-mode device drivers.
Definition: emul_driver.hh:56
const char * description() const override
Return a C string describing the event.
DriverWakeupEvent(GPUComputeDriver *gpu_driver, ThreadContext *thrd_cntxt)
EventList(GPUComputeDriver *gpu_driver, ThreadContext *thrd_cntxt)
void allocateGpuVma(Request::CacheCoherenceFlags mtype, Addr start, Addr length)
Allocate/deallocate GPUVM VMAs for tracking virtual address allocations and properties on DGPUs.
void setMtype(RequestPtr req)
Called by the compute units right before a request is issued to ruby.
MtypeFlags
Mtype bits {Cached, Read Write, Shared} for caches.
virtual void signalWakeupEvent(uint32_t event_id)
void registerUncacheableMemory(Addr start, Addr length)
Register a region of host memory as uncacheable from the perspective of the dGPU.
int open(ThreadContext *tc, int mode, int flags) override
Create an FD entry for the KFD inside of the owning process.
int ioctl(ThreadContext *tc, unsigned req, Addr ioc_buf) override
Abstract method, invoked when the user program calls ioctl() on the file descriptor returned by a pre...
void sleepCPU(ThreadContext *tc, uint32_t milliSecTimeout)
Addr scratchApeLimit(Addr apeBase) const
GPUComputeDriver(const Params &p)
Addr deallocateGpuVma(Addr start)
Addr scratchApeBase(int gpuNum) const
std::unordered_map< ThreadContext *, EventList > TCEvents
Addr gpuVmApeBase(int gpuNum) const
The aperture (APE) base/limit pairs are set statically at startup by the real KFD.
void allocateQueue(PortProxy &mem_proxy, Addr ioc_buf_addr)
Forward relevant parameters to packet processor; queueId is used to link doorbell.
Request::CacheCoherenceFlags defaultMtype
GPUComputeDriverParams Params
class EventTableEntry ETEntry
std::unordered_map< uint32_t, ETEntry > ETable
Addr mmap(ThreadContext *tc, Addr start, uint64_t length, int prot, int tgt_flags, int tgt_fd, off_t offset) override
Currently, mmap() will simply setup a mapping for the associated device's packet processor's doorbell...
GPUCommandProcessor * device
GPU that is controlled by this driver.
AddrRangeMap< Request::CacheCoherenceFlags, 1 > gpuVmas
VMA structures for GPUVM memory.
Addr ldsApeBase(int gpuNum) const
Addr ldsApeLimit(Addr apeBase) const
Addr gpuVmApeLimit(Addr apeBase) const
This object is a proxy for a port or other object which implements the functional response protocol,...
Definition: port_proxy.hh:87
ThreadContext is the external interface to all thread state for anything outside of the CPU.
void deschedule(Event &event)
Definition: eventq.hh:1028
bool scheduled() const
Determine if the current event is scheduled.
Definition: eventq.hh:465
#define fatal(...)
This implements a cprintf based fatal() function.
Definition: logging.hh:190
uint8_t flags
Definition: helpers.cc:66
Bitfield< 4, 0 > mode
Definition: misc_types.hh:74
Bitfield< 23, 0 > offset
Definition: types.hh:144
Bitfield< 10, 5 > event
Bitfield< 54 > p
Definition: pagetable.hh:70
Bitfield< 7 > prot
Definition: misc.hh:587
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
std::shared_ptr< Request > RequestPtr
Definition: request.hh:92
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
uint64_t Tick
Tick count type.
Definition: types.hh:58
Declaration of a request, the overall memory request consisting of the parts of the request that are ...

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