gem5  v21.1.0.2
ide_disk.hh
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40 
45 #ifndef __DEV_STORAGE_IDE_DISK_HH__
46 #define __DEV_STORAGE_IDE_DISK_HH__
47 
48 #include "base/statistics.hh"
49 #include "dev/io_device.hh"
51 #include "dev/storage/ide_atareg.h"
52 #include "dev/storage/ide_ctrl.hh"
53 #include "dev/storage/ide_wdcreg.h"
54 #include "params/IdeDisk.hh"
55 #include "sim/eventq.hh"
56 
57 namespace gem5
58 {
59 
60 class ChunkGenerator;
61 
62 #define DMA_BACKOFF_PERIOD 200
63 
64 #define MAX_DMA_SIZE 0x20000 // 128K
65 #define MAX_SINGLE_DMA_SIZE 0x10000
66 #define MAX_MULTSECT (128)
67 
68 #define PRD_BASE_MASK 0xfffffffe
69 #define PRD_COUNT_MASK 0xfffe
70 #define PRD_EOT_MASK 0x8000
71 
72 struct PrdEntry_t
73 {
74  uint32_t baseAddr;
75  uint16_t byteCount;
76  uint16_t endOfTable;
77 };
78 
80 {
81  public:
83 
84  uint32_t getBaseAddr()
85  {
86  return (entry.baseAddr & PRD_BASE_MASK);
87  }
88 
89  uint32_t getByteCount()
90  {
91  return ((entry.byteCount == 0) ? MAX_SINGLE_DMA_SIZE :
93  }
94 
95  uint16_t getEOT()
96  {
97  return (entry.endOfTable & PRD_EOT_MASK);
98  }
99 };
100 
101 #define DATA_OFFSET (0)
102 #define ERROR_OFFSET (1)
103 #define FEATURES_OFFSET (1)
104 #define NSECTOR_OFFSET (2)
105 #define SECTOR_OFFSET (3)
106 #define LCYL_OFFSET (4)
107 #define HCYL_OFFSET (5)
108 #define SELECT_OFFSET (6)
109 #define DRIVE_OFFSET (6)
110 #define STATUS_OFFSET (7)
111 #define COMMAND_OFFSET (7)
112 
113 #define CONTROL_OFFSET (2)
114 #define ALTSTAT_OFFSET (2)
115 
116 #define SELECT_DEV_BIT 0x10
117 #define CONTROL_RST_BIT 0x04
118 #define CONTROL_IEN_BIT 0x02
119 #define STATUS_BSY_BIT 0x80
120 #define STATUS_DRDY_BIT 0x40
121 #define STATUS_DRQ_BIT 0x08
122 #define STATUS_SEEK_BIT 0x10
123 #define STATUS_DF_BIT 0x20
124 #define DRIVE_LBA_BIT 0x40
125 
126 #define DEV0 (0)
127 #define DEV1 (1)
128 
130 {
131  uint16_t data;
132  uint8_t error;
133  uint8_t sec_count;
134  uint8_t sec_num;
135  uint8_t cyl_low;
136  uint8_t cyl_high;
137  union
138  {
139  uint8_t drive;
140  uint8_t head;
141  };
142  uint8_t command;
143 };
144 
146 {
147  None = 0,
154 };
155 
157 {
158  ACT_NONE = 0,
173 };
174 
176 {
177  // Device idle
181 
182  // Software reset
184 
185  // Non-data commands
187 
188  // PIO data-in (data to host)
192 
193  // PIO data-out (data from host)
197 
198  // DMA protocol
202 };
203 
205 {
206  Dma_Idle = 0,
209 };
210 
211 class IdeController;
212 
216 class IdeDisk : public SimObject
217 {
218  protected:
223 
224  protected:
227 
228  private:
232  uint8_t *dataBuffer;
234  uint32_t cmdBytes;
236  uint32_t cmdBytesLeft;
238  uint32_t drqBytesLeft;
240  uint32_t curSector;
244  uint8_t status;
246  bool nIENBit;
252  bool dmaRead;
256  uint32_t curPrdAddr;
260  int devID;
265 
267  {
269 
276  } ideDiskStats;
277 
278  public:
279  typedef IdeDiskParams Params;
280  IdeDisk(const Params &p);
281 
285  ~IdeDisk();
286 
290  void reset(int id);
291 
296  void
298  {
299  panic_if(ctrl, "Cannot change the controller once set!\n");
300  ctrl = c;
301  chunkBytes = chunk_bytes;
302  }
303 
304  // Device register read/write
305  void readCommand(const Addr offset, int size, uint8_t *data);
306  void readControl(const Addr offset, int size, uint8_t *data);
307  void writeCommand(const Addr offset, int size, const uint8_t *data);
308  void writeControl(const Addr offset, int size, const uint8_t *data);
309 
310  // Start/abort functions
311  void startDma(const uint32_t &prdTableBase);
312  void abortDma();
313 
314  private:
315  void startCommand();
316 
317  // Interrupt management
318  void intrPost();
319  void intrClear();
320 
321  // DMA stuff
322  void doDmaTransfer();
324 
325  void doDmaDataRead();
326 
327  void doDmaRead();
330 
331  void doDmaDataWrite();
332 
333  void doDmaWrite();
336 
337  void dmaPrdReadDone();
339 
340  void dmaReadDone();
342 
343  void dmaWriteDone();
345 
346  // Disk image read/write
347  void readDisk(uint32_t sector, uint8_t *data);
348  void writeDisk(uint32_t sector, uint8_t *data);
349 
350  // State machine management
351  void updateState(DevAction_t action);
352 
353  // Utility functions
354  bool isBSYSet() { return (status & STATUS_BSY_BIT); }
355  bool isIENSet() { return nIENBit; }
356  bool isDEVSelect();
357 
358  void setComplete()
359  {
360  // clear out the status byte
361  status = 0;
362  // set the DRDY bit
364  // set the SEEK bit
366  }
367 
368  uint32_t getLBABase()
369  {
370  return (Addr)(((cmdReg.head & 0xf) << 24) | (cmdReg.cyl_high << 16) |
371  (cmdReg.cyl_low << 8) | (cmdReg.sec_num));
372  }
373 
374  inline Addr pciToDma(Addr pciAddr);
375 
376  void serialize(CheckpointOut &cp) const override;
377  void unserialize(CheckpointIn &cp) override;
378 };
379 
380 } // namespace gem5
381 
382 #endif // __DEV_STORAGE_IDE_DISK_HH__
gem5::statistics::Scalar
This is a simple scalar statistic, like a counter.
Definition: statistics.hh:1927
gem5::IdeDisk::updateState
void updateState(DevAction_t action)
Definition: ide_disk.cc:761
gem5::IdeDisk::pciToDma
Addr pciToDma(Addr pciAddr)
Definition: ide_disk.cc:197
gem5::PrdTableEntry::getByteCount
uint32_t getByteCount()
Definition: ide_disk.hh:89
gem5::IdeDisk::IdeDisk
IdeDisk(const Params &p)
Definition: ide_disk.cc:65
gem5::IdeDisk::setComplete
void setComplete()
Definition: ide_disk.hh:358
gem5::IdeDisk::intrPending
bool intrPending
Interrupt pending.
Definition: ide_disk.hh:262
gem5::ACT_DATA_READY
@ ACT_DATA_READY
Definition: ide_disk.hh:164
io_device.hh
gem5::CommandReg_t::cyl_low
uint8_t cyl_low
Definition: ide_disk.hh:135
gem5::PrdTableEntry::entry
PrdEntry_t entry
Definition: ide_disk.hh:82
gem5::IdeDisk::doDmaWrite
void doDmaWrite()
Definition: ide_disk.cc:498
gem5::ACT_DATA_READ_BYTE
@ ACT_DATA_READ_BYTE
Definition: ide_disk.hh:165
gem5::IdeDisk::IdeDiskStats::dmaWriteBytes
statistics::Scalar dmaWriteBytes
Definition: ide_disk.hh:274
gem5::IdeDisk::isBSYSet
bool isBSYSet()
Definition: ide_disk.hh:354
gem5::IdeDisk::curSector
uint32_t curSector
Current sector in access.
Definition: ide_disk.hh:240
data
const char data[]
Definition: circlebuf.test.cc:48
gem5::CommandReg_t::command
uint8_t command
Definition: ide_disk.hh:142
gem5::IdeDisk::curPrd
PrdTableEntry curPrd
PRD entry.
Definition: ide_disk.hh:258
gem5::ACT_DATA_READ_SHORT
@ ACT_DATA_READ_SHORT
Definition: ide_disk.hh:166
gem5::ReadWait
@ ReadWait
Definition: ide_disk.hh:149
gem5::IdeDisk::IdeDiskStats::dmaWriteTxs
statistics::Scalar dmaWriteTxs
Definition: ide_disk.hh:275
gem5::None
@ None
Definition: ide_disk.hh:147
gem5::IdeDisk::reset
void reset(int id)
Reset the device state.
Definition: ide_disk.cc:147
gem5::Events_t
Events_t
Definition: ide_disk.hh:145
gem5::IdeDisk::unserialize
void unserialize(CheckpointIn &cp) override
Unserialize an object.
Definition: ide_disk.cc:1139
gem5::IdeDisk::startCommand
void startCommand()
Definition: ide_disk.cc:612
gem5::CheckpointIn
Definition: serialize.hh:68
gem5::IdeDisk::IdeDiskStats::dmaWriteFullPages
statistics::Scalar dmaWriteFullPages
Definition: ide_disk.hh:273
ide_atareg.h
gem5::IdeDisk::~IdeDisk
~IdeDisk()
Delete the data buffer.
Definition: ide_disk.cc:140
gem5::PrdEntry_t::byteCount
uint16_t byteCount
Definition: ide_disk.hh:75
gem5::IdeDisk::doDmaTransfer
void doDmaTransfer()
Definition: ide_disk.cc:338
gem5::IdeDisk::dmaWriteCG
ChunkGenerator * dmaWriteCG
Definition: ide_disk.hh:334
disk_image.hh
gem5::IdeDisk::driveID
struct ataparams driveID
Drive identification structure for this disk.
Definition: ide_disk.hh:230
gem5::IdeDisk::isDEVSelect
bool isDEVSelect()
Definition: ide_disk.cc:191
gem5::IdeDisk::curPrdAddr
uint32_t curPrdAddr
PRD table base address.
Definition: ide_disk.hh:256
gem5::Data_Ready_INTRQ_In
@ Data_Ready_INTRQ_In
Definition: ide_disk.hh:190
gem5::CommandReg_t::data
uint16_t data
Definition: ide_disk.hh:131
gem5::IdeDisk::readCommand
void readCommand(const Addr offset, int size, uint8_t *data)
Definition: ide_disk.cc:210
gem5::CommandReg_t::cyl_high
uint8_t cyl_high
Definition: ide_disk.hh:136
gem5::IdeDisk::chunkBytes
Addr chunkBytes
Size of chunks to DMA.
Definition: ide_disk.hh:254
gem5::IdeDisk::setController
void setController(IdeController *c, Addr chunk_bytes)
Set the controller for this device.
Definition: ide_disk.hh:297
gem5::CommandReg_t::sec_count
uint8_t sec_count
Definition: ide_disk.hh:133
gem5::ACT_CMD_WRITE
@ ACT_CMD_WRITE
Definition: ide_disk.hh:159
PRD_COUNT_MASK
#define PRD_COUNT_MASK
Definition: ide_disk.hh:69
gem5::Device_Idle_NS
@ Device_Idle_NS
Definition: ide_disk.hh:180
gem5::ACT_SRST_CLEAR
@ ACT_SRST_CLEAR
Definition: ide_disk.hh:172
gem5::IdeDisk::startDma
void startDma(const uint32_t &prdTableBase)
Definition: ide_disk.cc:582
gem5::IdeDisk::intrClear
void intrClear()
Definition: ide_disk.cc:743
gem5::DmaRead
@ DmaRead
Definition: ide_disk.hh:152
gem5::IdeDisk::IdeDiskStats::IdeDiskStats
IdeDiskStats(statistics::Group *parent)
Definition: ide_disk.cc:395
gem5::IdeDisk::cmdBytesLeft
uint32_t cmdBytesLeft
Number of bytes left in command data transfer.
Definition: ide_disk.hh:236
gem5::DiskImage
Basic interface for accessing a disk image.
Definition: disk_image.hh:52
gem5::PrdTableEntry::getBaseAddr
uint32_t getBaseAddr()
Definition: ide_disk.hh:84
gem5::IdeDisk::doDmaDataWrite
void doDmaDataWrite()
Definition: ide_disk.cc:475
gem5::ChunkGenerator
This class takes an arbitrary memory region (address/length pair) and generates a series of appropria...
Definition: chunk_generator.hh:59
MAX_SINGLE_DMA_SIZE
#define MAX_SINGLE_DMA_SIZE
Definition: ide_disk.hh:65
gem5::IdeDisk::doDmaDataRead
void doDmaDataRead()
Definition: ide_disk.cc:383
gem5::Transfer_Data_Dma
@ Transfer_Data_Dma
Definition: ide_disk.hh:200
gem5::Data_Ready_INTRQ_Out
@ Data_Ready_INTRQ_Out
Definition: ide_disk.hh:195
gem5::PrdEntry_t
Definition: ide_disk.hh:72
gem5::IdeDisk::dmaRead
bool dmaRead
Dma transaction is a read.
Definition: ide_disk.hh:252
gem5::IdeDisk::devState
DevState_t devState
Device state.
Definition: ide_disk.hh:248
gem5::Device_Idle_S
@ Device_Idle_S
Definition: ide_disk.hh:178
gem5::IdeDisk::dmaReadCG
ChunkGenerator * dmaReadCG
Definition: ide_disk.hh:328
gem5::ACT_DATA_WRITE_BYTE
@ ACT_DATA_WRITE_BYTE
Definition: ide_disk.hh:167
gem5::IdeDisk::doDmaRead
void doDmaRead()
Definition: ide_disk.cc:413
gem5::IdeDisk::nIENBit
bool nIENBit
Interrupt enable bit.
Definition: ide_disk.hh:246
STATUS_BSY_BIT
#define STATUS_BSY_BIT
Definition: ide_disk.hh:119
PRD_BASE_MASK
#define PRD_BASE_MASK
Definition: ide_disk.hh:68
gem5::Dma_Start
@ Dma_Start
Definition: ide_disk.hh:207
gem5::ACT_SELECT_WRITE
@ ACT_SELECT_WRITE
Definition: ide_disk.hh:162
gem5::Prepare_Data_Out
@ Prepare_Data_Out
Definition: ide_disk.hh:194
gem5::IdeDisk::dmaWriteWaitEvent
EventFunctionWrapper dmaWriteWaitEvent
Definition: ide_disk.hh:335
gem5::Prepare_Data_In
@ Prepare_Data_In
Definition: ide_disk.hh:189
gem5::IdeDisk::dmaReadDone
void dmaReadDone()
Definition: ide_disk.cc:452
gem5::Prepare_Data_Dma
@ Prepare_Data_Dma
Definition: ide_disk.hh:199
gem5::IdeDisk::dmaState
DmaState_t dmaState
Dma state.
Definition: ide_disk.hh:250
gem5::Transfer
@ Transfer
Definition: ide_disk.hh:148
gem5::CommandReg_t::error
uint8_t error
Definition: ide_disk.hh:132
gem5::CommandReg_t::head
uint8_t head
Definition: ide_disk.hh:140
gem5::MipsISA::p
Bitfield< 0 > p
Definition: pra_constants.hh:326
statistics.hh
gem5::IdeDisk::cmdBytes
uint32_t cmdBytes
Number of bytes in command data transfer.
Definition: ide_disk.hh:234
gem5::DmaWrite
@ DmaWrite
Definition: ide_disk.hh:153
gem5::IdeDisk::IdeDiskStats::dmaReadTxs
statistics::Scalar dmaReadTxs
Definition: ide_disk.hh:272
ataparams
Definition: ide_atareg.h:67
gem5::IdeDisk::dmaReadEvent
EventFunctionWrapper dmaReadEvent
Definition: ide_disk.hh:341
STATUS_SEEK_BIT
#define STATUS_SEEK_BIT
Definition: ide_disk.hh:122
gem5::ArmISA::offset
Bitfield< 23, 0 > offset
Definition: types.hh:144
gem5::IdeController
Device model for an Intel PIIX4 IDE controller.
Definition: ide_ctrl.hh:52
gem5::DevState_t
DevState_t
Definition: ide_disk.hh:175
gem5::IdeDisk::devID
int devID
Device ID (device0=0/device1=1)
Definition: ide_disk.hh:260
gem5::IdeDisk::writeCommand
void writeCommand(const Addr offset, int size, const uint8_t *data)
Definition: ide_disk.cc:266
gem5::SimObject
Abstract superclass for simulation objects.
Definition: sim_object.hh:146
gem5::ACT_DATA_WRITE_SHORT
@ ACT_DATA_WRITE_SHORT
Definition: ide_disk.hh:168
gem5::ArmISA::c
Bitfield< 29 > c
Definition: misc_types.hh:53
gem5::Device_Srst
@ Device_Srst
Definition: ide_disk.hh:183
gem5::Dma_Transfer
@ Dma_Transfer
Definition: ide_disk.hh:208
gem5::IdeDisk::Params
IdeDiskParams Params
Definition: ide_disk.hh:279
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::Transfer_Data_Out
@ Transfer_Data_Out
Definition: ide_disk.hh:196
PRD_EOT_MASK
#define PRD_EOT_MASK
Definition: ide_disk.hh:70
gem5::DevAction_t
DevAction_t
Definition: ide_disk.hh:156
gem5::CommandReg_t::sec_num
uint8_t sec_num
Definition: ide_disk.hh:134
gem5::IdeDisk::getLBABase
uint32_t getLBABase()
Definition: ide_disk.hh:368
gem5::PrdEntry_t::baseAddr
uint32_t baseAddr
Definition: ide_disk.hh:74
gem5::ACT_SRST_SET
@ ACT_SRST_SET
Definition: ide_disk.hh:171
gem5::IdeDisk::image
DiskImage * image
The image that contains the data of this disk.
Definition: ide_disk.hh:222
gem5::IdeDisk::isIENSet
bool isIENSet()
Definition: ide_disk.hh:355
gem5::IdeDisk::dmaPrdReadDone
void dmaPrdReadDone()
Definition: ide_disk.cc:359
gem5::IdeDisk::ideDiskStats
gem5::IdeDisk::IdeDiskStats ideDiskStats
gem5::IdeDisk::status
uint8_t status
Status register.
Definition: ide_disk.hh:244
gem5::EventFunctionWrapper
Definition: eventq.hh:1115
gem5::IdeDisk::dmaReadWaitEvent
EventFunctionWrapper dmaReadWaitEvent
Definition: ide_disk.hh:329
gem5::Transfer_Data_In
@ Transfer_Data_In
Definition: ide_disk.hh:191
gem5::ACT_STAT_READ
@ ACT_STAT_READ
Definition: ide_disk.hh:163
panic_if
#define panic_if(cond,...)
Conditional panic macro that checks the supplied condition and only panics if the condition is true a...
Definition: logging.hh:203
gem5::IdeDisk::writeDisk
void writeDisk(uint32_t sector, uint8_t *data)
Definition: ide_disk.cc:568
gem5::Dma_Idle
@ Dma_Idle
Definition: ide_disk.hh:206
gem5::Device_Idle_SI
@ Device_Idle_SI
Definition: ide_disk.hh:179
gem5::IdeDisk::readDisk
void readDisk(uint32_t sector, uint8_t *data)
Definition: ide_disk.cc:558
gem5::CommandReg_t::drive
uint8_t drive
Definition: ide_disk.hh:139
gem5::CommandReg_t
Definition: ide_disk.hh:129
gem5::IdeDisk::dmaPrdReadEvent
EventFunctionWrapper dmaPrdReadEvent
Definition: ide_disk.hh:338
gem5::IdeDisk::drqBytesLeft
uint32_t drqBytesLeft
Number of bytes left in DRQ block.
Definition: ide_disk.hh:238
gem5::IdeDisk::dmaWriteDone
void dmaWriteDone()
Definition: ide_disk.cc:539
gem5::IdeDisk::IdeDiskStats::dmaReadFullPages
statistics::Scalar dmaReadFullPages
Definition: ide_disk.hh:270
STATUS_DRDY_BIT
#define STATUS_DRDY_BIT
Definition: ide_disk.hh:120
ide_ctrl.hh
gem5::IdeDisk::readControl
void readControl(const Addr offset, int size, uint8_t *data)
Definition: ide_disk.cc:256
gem5::statistics::Group
Statistics container.
Definition: group.hh:93
gem5::IdeDisk::intrPost
void intrPost()
Definition: ide_disk.cc:728
gem5::ACT_DMA_READY
@ ACT_DMA_READY
Definition: ide_disk.hh:169
gem5::ACT_CMD_COMPLETE
@ ACT_CMD_COMPLETE
Definition: ide_disk.hh:160
gem5::CheckpointOut
std::ostream CheckpointOut
Definition: serialize.hh:66
gem5::IdeDisk::IdeDiskStats::dmaReadBytes
statistics::Scalar dmaReadBytes
Definition: ide_disk.hh:271
gem5::IdeDisk::ctrl
IdeController * ctrl
The IDE controller for this disk.
Definition: ide_disk.hh:220
gem5::IdeDisk
IDE Disk device model.
Definition: ide_disk.hh:216
gem5::IdeDisk::abortDma
void abortDma()
Definition: ide_disk.cc:600
gem5::Command_Execution
@ Command_Execution
Definition: ide_disk.hh:186
gem5::Device_Dma_Abort
@ Device_Dma_Abort
Definition: ide_disk.hh:201
gem5::IdeDisk::IdeDiskStats
Definition: ide_disk.hh:266
gem5::PrdTableEntry::getEOT
uint16_t getEOT()
Definition: ide_disk.hh:95
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: decoder.cc:40
gem5::ACT_DMA_DONE
@ ACT_DMA_DONE
Definition: ide_disk.hh:170
gem5::IdeDisk::serialize
void serialize(CheckpointOut &cp) const override
Serialize an object.
Definition: ide_disk.cc:1061
gem5::IdeDisk::dmaTransferEvent
EventFunctionWrapper dmaTransferEvent
Definition: ide_disk.hh:323
gem5::DmaState_t
DmaState_t
Definition: ide_disk.hh:204
gem5::ACT_NONE
@ ACT_NONE
Definition: ide_disk.hh:158
gem5::ACT_CMD_ERROR
@ ACT_CMD_ERROR
Definition: ide_disk.hh:161
gem5::IdeDisk::dataBuffer
uint8_t * dataBuffer
Data buffer for transfers.
Definition: ide_disk.hh:232
ide_wdcreg.h
gem5::PrdTableEntry
Definition: ide_disk.hh:79
gem5::IdeDisk::dmaAborted
bool dmaAborted
DMA Aborted.
Definition: ide_disk.hh:264
gem5::IdeDisk::cmdReg
CommandReg_t cmdReg
Command block registers.
Definition: ide_disk.hh:242
gem5::IdeDisk::diskDelay
int diskDelay
The disk delay in microseconds.
Definition: ide_disk.hh:226
gem5::IdeDisk::writeControl
void writeControl(const Addr offset, int size, const uint8_t *data)
Definition: ide_disk.cc:314
gem5::PrdRead
@ PrdRead
Definition: ide_disk.hh:151
gem5::IdeDisk::dmaWriteEvent
EventFunctionWrapper dmaWriteEvent
Definition: ide_disk.hh:344
gem5::PrdEntry_t::endOfTable
uint16_t endOfTable
Definition: ide_disk.hh:76
gem5::WriteWait
@ WriteWait
Definition: ide_disk.hh:150
eventq.hh

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