lupio_pic.hh

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#ifndef __DEV_LUPIO_LUPIO_PIC_HH__
#define __DEV_LUPIO_LUPIO_PIC_HH__
 
#include "arch/riscv/interrupts.hh"
#include "dev/io_device.hh"
#include "dev/platform.hh"
#include "params/LupioPIC.hh"
#include "sim/system.hh"
 
#define LUPIO_PIC_NSRC 32
 
namespace gem5
{
 
class LupioPIC : public BasicPioDevice
{
  protected:
    System *system;
    int nSrc;
    int nThread;
    // Type of interrupt
    int intType;
 
    const ByteOrder byteOrder = ByteOrder::little;
 
  // Register map
  private:
    enum
    {
        LUPIO_PIC_PRIO = 0x0,
        LUPIO_PIC_MASK = 0x4,
        LUPIO_PIC_PEND = 0x8,
        LUPIO_PIC_ENAB = 0xC,
 
        // Max offset
        LUPIO_PIC_MAX = 0x10,
    };
 
    uint32_t pending = 0;
    // Register for masking or unmasking up to 32 sources
    uint32_t mask[LUPIO_PIC_NSRC];
    // Regitser to determine which input IRQ is routed to the
    // corresponding processor
    uint32_t enable[LUPIO_PIC_NSRC];
 
  protected:
    uint64_t lupioPicRead(const uint8_t addr);
    void lupioPicWrite(const uint8_t addr, uint64_t val64);
    void lupioPicUpdateIRQ();
 
  public:
    PARAMS(LupioPIC);
    LupioPIC(const Params &params);
 
    void post(int src_id);
    void clear(int src_id);
    Tick read(PacketPtr pkt) override;
    Tick write(PacketPtr pkt) override;
};
 
} // namespace gem5
 
#endif // __DEV_LUPIO_LUPIO_PIC_HH_