gem5  v22.0.0.2
lupio_pic.cc
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28 
29 #include "dev/lupio/lupio_pic.hh"
30 
31 #include "cpu/base.hh"
32 #include "debug/LupioPIC.hh"
33 #include "mem/packet_access.hh"
34 #include "params/LupioPIC.hh"
35 #include "sim/system.hh"
36 
37 namespace gem5
38 {
39 
40 LupioPIC::LupioPIC(const Params &params) :
41  BasicPioDevice(params, params.pio_size),
42  system(params.system),
43  nSrc(params.n_src),
44  nThread(params.num_threads),
45  intType(params.int_type),
46  mask{0},
47  enable{0}
48 {
49  // CPU0 receives all IRQ sources by default
50  enable[0] = 0xFFFFFFFF;
51  DPRINTF(LupioPIC, "LupioPIC initalized\n");
52 }
53 
54 void
56 {
57  for (int cpu = 0; cpu < nThread; cpu++) {
58  auto tc = system->threads[cpu];
59 
60  if (enable[cpu] & mask[cpu] & pending) {
61  tc->getCpuPtr()->postInterrupt(tc->threadId(), intType, 0);
62  } else {
63  tc->getCpuPtr()->clearInterrupt(tc->threadId(), intType, 0);
64  }
65  }
66 }
67 
68 void
69 LupioPIC::post(int src_id)
70 {
71  gem5_assert(src_id < nSrc && src_id >= 0);
72 
73  uint32_t irq_mask = 1UL << src_id;
74  pending |= irq_mask;
76 }
77 
78 void
79 LupioPIC::clear(int src_id)
80 {
81  gem5_assert(src_id < nSrc && src_id >= 0);
82 
83  uint32_t irq_mask = 1UL << src_id;
84  pending &= ~irq_mask;
86 }
87 
88 uint64_t
90 {
91  uint32_t r = 0;
92 
93  int cpu = addr >> LUPIO_PIC_MAX;
94  int reg = (addr >> 2) & (LUPIO_PIC_MAX - 1);
95 
96  switch (reg) {
97  case LUPIO_PIC_PRIO:
98  // Value will be 32 if there is no unmasked pending IRQ
99  r = ctz32(pending & mask[cpu] & enable[cpu]);
100  DPRINTF(LupioPIC, "Read PIC_PRIO: %d\n", r);
101  break;
102  case LUPIO_PIC_MASK:
103  r = mask[cpu];
104  DPRINTF(LupioPIC, "Read PIC_MASK: %d\n", r);
105  break;
106  case LUPIO_PIC_PEND:
107  r = (enable[cpu] & pending);
108  DPRINTF(LupioPIC, "Read PIC_PEND: %d\n", r);
109  break;
110  case LUPIO_PIC_ENAB:
111  r = enable[cpu];
112  break;
113 
114  default:
115  panic("Unexpected read to the LupioPIC device at address %#llx!",
116  addr);
117  break;
118  }
119  return r;
120 }
121 
122 void
123 LupioPIC::lupioPicWrite(uint8_t addr, uint64_t val64)
124 {
125  uint32_t val = val64;
126 
127  int cpu = addr >> LUPIO_PIC_MAX;
128  int reg = (addr >> 2) & (LUPIO_PIC_MAX - 1);
129 
130  switch (reg) {
131  case LUPIO_PIC_MASK:
132  mask[cpu] = val;
133  DPRINTF(LupioPIC, "Write PIC_MASK: %d\n", mask[cpu]);
135  break;
136  case LUPIO_PIC_ENAB:
137  enable[cpu] = val;
138  DPRINTF(LupioPIC, "Write PIC_ENAB: %d\n", enable[cpu]);
140  break;
141 
142  default:
143  panic("Unexpected write to the LupioPIC device at address %#llx!",
144  addr);
145  break;
146  }
147 }
148 
149 Tick
151 {
152  Addr pic_addr = pkt->getAddr() - pioAddr;
153 
155  "Read request - addr: %#x, size: %#x\n", pic_addr, pkt->getSize());
156 
157  uint64_t read_val = lupioPicRead(pic_addr);
158  DPRINTF(LupioPIC, "Packet Read: %#x\n", read_val);
159  pkt->setUintX(read_val, byteOrder);
160  pkt->makeResponse();
161 
162  return pioDelay;
163 }
164 
165 Tick
167 {
168  Addr pic_addr = pkt->getAddr() - pioAddr;
169 
170  DPRINTF(LupioPIC, "Write register %#x value %#x\n", pic_addr,
171  pkt->getUintX(byteOrder));
172 
173  lupioPicWrite(pic_addr, pkt->getUintX(byteOrder));
174  DPRINTF(LupioPIC, "Packet Write Value: %d\n", pkt->getUintX(byteOrder));
175 
176  pkt->makeResponse();
177 
178  return pioDelay;
179 }
180 } // namespace gem5
gem5::BasicPioDevice::pioAddr
Addr pioAddr
Address that the device listens to.
Definition: io_device.hh:151
gem5::LupioPIC::LUPIO_PIC_MAX
@ LUPIO_PIC_MAX
Definition: lupio_pic.hh:70
gem5::Packet::getUintX
uint64_t getUintX(ByteOrder endian) const
Get the data in the packet byte swapped from the specified endianness and zero-extended to 64 bits.
Definition: packet.cc:348
system.hh
gem5::LupioPIC::pending
uint32_t pending
Definition: lupio_pic.hh:73
gem5::LupioPIC::lupioPicWrite
void lupioPicWrite(const uint8_t addr, uint64_t val64)
Function to update interrupt requests.
Definition: lupio_pic.cc:123
gem5::LupioPIC::post
void post(int src_id)
Definition: lupio_pic.cc:69
sc_dt::int_type
int64 int_type
Definition: sc_nbdefs.hh:240
lupio_pic.hh
gem5::X86ISA::val
Bitfield< 63 > val
Definition: misc.hh:769
gem5::X86ISA::system
Bitfield< 15 > system
Definition: misc.hh:997
gem5::LupioPIC::byteOrder
const ByteOrder byteOrder
Definition: lupio_pic.hh:58
gem5::VegaISA::r
Bitfield< 5 > r
Definition: pagetable.hh:60
gem5::LupioPIC::enable
uint32_t enable[LUPIO_PIC_NSRC]
Definition: lupio_pic.hh:78
gem5::mask
constexpr uint64_t mask(unsigned nbits)
Generate a 64-bit mask of 'nbits' 1s, right justified.
Definition: bitfield.hh:63
gem5::PioDevice::Params
PioDeviceParams Params
Definition: io_device.hh:134
gem5::X86ISA::enable
Bitfield< 11 > enable
Definition: misc.hh:1051
DPRINTF
#define DPRINTF(x,...)
Definition: trace.hh:186
gem5::Packet
A Packet is used to encapsulate a transfer between two objects in the memory system (e....
Definition: packet.hh:291
gem5::Tick
uint64_t Tick
Tick count type.
Definition: types.hh:58
gem5::LupioPIC::LUPIO_PIC_PEND
@ LUPIO_PIC_PEND
Definition: lupio_pic.hh:66
gem5::LupioPIC::LUPIO_PIC_ENAB
@ LUPIO_PIC_ENAB
Definition: lupio_pic.hh:67
gem5::BasicPioDevice::pioDelay
Tick pioDelay
Delay that the device experinces on an access.
Definition: io_device.hh:157
gem5::LupioPIC::read
Tick read(PacketPtr pkt) override
Implement BasicPioDevice virtual functions.
Definition: lupio_pic.cc:150
gem5::Addr
uint64_t Addr
Address type This will probably be moved somewhere else in the near future.
Definition: types.hh:147
gem5::LupioPIC::nThread
int nThread
Definition: lupio_pic.hh:54
gem5::LupioPIC::clear
void clear(int src_id)
Definition: lupio_pic.cc:79
packet_access.hh
gem5::LupioPIC::LupioPIC
LupioPIC(const Params &params)
Definition: lupio_pic.cc:40
gem5::X86ISA::reg
Bitfield< 5, 3 > reg
Definition: types.hh:92
gem5::LupioPIC::lupioPicRead
uint64_t lupioPicRead(const uint8_t addr)
Function to return information about interrupt requests to the LupIO-PIC.
Definition: lupio_pic.cc:89
base.hh
gem5::System::threads
Threads threads
Definition: system.hh:314
gem5::ctz32
constexpr int ctz32(uint32_t value)
Count trailing zeros in a 32-bit value.
Definition: bitfield.hh:392
gem5::LupioPIC
LupioPIC: A programmable interrupt controller virtual device that can manage input IRQs coming from u...
Definition: lupio_pic.hh:49
gem5::Packet::makeResponse
void makeResponse()
Take a request packet and modify it in place to be suitable for returning as a response to that reque...
Definition: packet.hh:1044
gem5::LupioPIC::intType
int intType
Definition: lupio_pic.hh:56
gem5::LupioPIC::system
System * system
Definition: lupio_pic.hh:52
gem5_assert
#define gem5_assert(cond,...)
The assert macro will function like a normal assert, but will use panic instead of straight abort().
Definition: logging.hh:318
gem5::Packet::getAddr
Addr getAddr() const
Definition: packet.hh:790
gem5::LupioPIC::mask
uint32_t mask[LUPIO_PIC_NSRC]
Definition: lupio_pic.hh:75
gem5
Reference material can be found at the JEDEC website: UFS standard http://www.jedec....
Definition: gpu_translation_state.hh:37
gem5::BasicPioDevice
Definition: io_device.hh:147
gem5::Packet::setUintX
void setUintX(uint64_t w, ByteOrder endian)
Set the value in the word w after truncating it to the length of the packet and then byteswapping it ...
Definition: packet.cc:357
gem5::LupioPIC::LUPIO_PIC_PRIO
@ LUPIO_PIC_PRIO
Definition: lupio_pic.hh:64
gem5::LupioPIC::LUPIO_PIC_MASK
@ LUPIO_PIC_MASK
Definition: lupio_pic.hh:65
gem5::Packet::getSize
unsigned getSize() const
Definition: packet.hh:800
gem5::LupioPIC::write
Tick write(PacketPtr pkt) override
Pure virtual function that the device must implement.
Definition: lupio_pic.cc:166
panic
#define panic(...)
This implements a cprintf based panic() function.
Definition: logging.hh:178
gem5::LupioPIC::lupioPicUpdateIRQ
void lupioPicUpdateIRQ()
Function to post and clear interrupts.
Definition: lupio_pic.cc:55
gem5::X86ISA::addr
Bitfield< 3 > addr
Definition: types.hh:84

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